TW417050B - Method and apparatus for distributing a cycle clock to a plurality of bus nodes in a bus bridge - Google Patents

Method and apparatus for distributing a cycle clock to a plurality of bus nodes in a bus bridge Download PDF

Info

Publication number
TW417050B
TW417050B TW087118508A TW87118508A TW417050B TW 417050 B TW417050 B TW 417050B TW 087118508 A TW087118508 A TW 087118508A TW 87118508 A TW87118508 A TW 87118508A TW 417050 B TW417050 B TW 417050B
Authority
TW
Taiwan
Prior art keywords
bus
bridge
cycle
subsystem
individual
Prior art date
Application number
TW087118508A
Other languages
English (en)
Chinese (zh)
Inventor
Samir N Hulyalkar
Original Assignee
Philips Electronics Na
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Electronics Na filed Critical Philips Electronics Na
Application granted granted Critical
Publication of TW417050B publication Critical patent/TW417050B/zh

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40052High-speed IEEE 1394 serial bus
    • H04L12/40058Isochronous transmission
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40052High-speed IEEE 1394 serial bus
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10Distribution of clock signals, e.g. skew
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4286Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a handshaking protocol, e.g. RS232C link
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0638Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0652Synchronisation among time division multiple access [TDMA] nodes, e.g. time triggered protocol [TTP]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40052High-speed IEEE 1394 serial bus
    • H04L12/40091Bus bridging
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0012High speed serial bus, e.g. IEEE P1394

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Small-Scale Networks (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
TW087118508A 1997-12-30 1998-11-06 Method and apparatus for distributing a cycle clock to a plurality of bus nodes in a bus bridge TW417050B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/000,672 US6032261A (en) 1997-12-30 1997-12-30 Bus bridge with distribution of a common cycle clock to all bridge portals to provide synchronization of local buses, and method of operation thereof

Publications (1)

Publication Number Publication Date
TW417050B true TW417050B (en) 2001-01-01

Family

ID=21692544

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087118508A TW417050B (en) 1997-12-30 1998-11-06 Method and apparatus for distributing a cycle clock to a plurality of bus nodes in a bus bridge

Country Status (8)

Country Link
US (1) US6032261A (enExample)
EP (1) EP0961977B1 (enExample)
JP (1) JP2001515682A (enExample)
KR (1) KR100646122B1 (enExample)
CN (1) CN1143221C (enExample)
DE (1) DE69835807T2 (enExample)
TW (1) TW417050B (enExample)
WO (1) WO1999035587A1 (enExample)

Families Citing this family (84)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10254827A (ja) * 1997-03-06 1998-09-25 Canon Inc 拡張カードおよび拡張カードのアクセス制御方法およびコンピュータが読み出し可能なプログラムを格納した記憶媒体
JP3397124B2 (ja) * 1998-03-12 2003-04-14 ソニー株式会社 同期方法及びブリッジ
US6252886B1 (en) * 1998-07-06 2001-06-26 Sony Corporation Bandwidth reservation
JP2000032030A (ja) * 1998-07-14 2000-01-28 Sony Corp バスネットワークの同期通信設定方法およびそれを利用するバスネットワーク、並びに情報提供媒体
JP3815063B2 (ja) * 1998-07-14 2006-08-30 ソニー株式会社 バスネットワークの同期通信設定の解除方法およびそれを利用するバスネットワーク、並びに情報提供媒体
EP0986248A1 (en) * 1998-09-07 2000-03-15 Deutsche Thomson-Brandt Gmbh Method and apparatus for timestamping a bitstream to be recorded
JP2000124914A (ja) * 1998-10-19 2000-04-28 Sony Corp 情報処理装置および方法、並びに提供媒体
US6418494B1 (en) * 1998-10-30 2002-07-09 Cybex Computer Products Corporation Split computer architecture to separate user and processor while retaining original user interface
JP3175826B2 (ja) * 1998-11-24 2001-06-11 日本電気株式会社 ネットワーク構成方法およびネットワーク管理ノード
US6510150B1 (en) * 1998-12-21 2003-01-21 Koninklijke Philips Electronics N.V. Method of MAC synchronization in TDMA-based wireless networks
JP2000216800A (ja) * 1999-01-27 2000-08-04 Sony Corp デ―タ中継装置および方法、並びに提供媒体
US6598084B1 (en) * 1999-02-16 2003-07-22 Sony Corporation Methods and apparatus for processing, transmitting, and receiving data from a modular electronic medical device
US6377782B1 (en) * 1999-03-01 2002-04-23 Mediacell, Inc. Method and apparatus for communicating between a client device and a linear broadband network
US6389547B1 (en) * 1999-03-19 2002-05-14 Sony Corporation Method and apparatus to synchronize a bus bridge to a master clock
JP3353824B2 (ja) 1999-04-22 2002-12-03 日本電気株式会社 ネットワーク同期システム及びネットワーク同期方法
WO2000065781A1 (en) * 1999-04-23 2000-11-02 Sony Electronics Inc. Method of and apparatus for implementing and sending an asynchronous control mechanism packet
US6366805B1 (en) * 1999-05-26 2002-04-02 Viasys Healthcare Inc. Time frame synchronization of medical monitoring signals
US6628607B1 (en) 1999-07-09 2003-09-30 Apple Computer, Inc. Method and apparatus for loop breaking on a serial bus
US6633943B1 (en) 1999-09-21 2003-10-14 Sony Corporation Method and system for the simplification of leaf-limited bridges
AU7614200A (en) * 1999-09-23 2001-04-24 Digital Harmony Technologies, Inc. Method and apparatus for distributed synchronization signal
JP3424620B2 (ja) * 1999-09-24 2003-07-07 日本電気株式会社 アイソクロナスパケット転送方法,該転送用制御プログラムの記録媒体,ブリッジ及びパケット転送制御lsi
JP3843667B2 (ja) * 1999-10-15 2006-11-08 セイコーエプソン株式会社 データ転送制御装置及び電子機器
US6691096B1 (en) 1999-10-28 2004-02-10 Apple Computer, Inc. General purpose data container method and apparatus for implementing AV/C descriptors
US6671768B1 (en) 1999-11-01 2003-12-30 Apple Computer, Inc. System and method for providing dynamic configuration ROM using double image buffers for use with serial bus devices
US6813663B1 (en) 1999-11-02 2004-11-02 Apple Computer, Inc. Method and apparatus for supporting and presenting multiple serial bus nodes using distinct configuration ROM images
US6618750B1 (en) 1999-11-02 2003-09-09 Apple Computer, Inc. Method and apparatus for determining communication paths
US6636914B1 (en) 1999-11-05 2003-10-21 Apple Computer, Inc. Method and apparatus for arbitration and fairness on a full-duplex bus using dual phases
US6587904B1 (en) 1999-11-05 2003-07-01 Apple Computer, Inc. Method and apparatus for preventing loops in a full-duplex bus
US6457086B1 (en) * 1999-11-16 2002-09-24 Apple Computers, Inc. Method and apparatus for accelerating detection of serial bus device speed signals
US6751697B1 (en) * 1999-11-29 2004-06-15 Sony Corporation Method and system for a multi-phase net refresh on a bus bridge interconnect
GB9930849D0 (en) * 1999-12-24 2000-02-16 Koninkl Philips Electronics Nv Data communications
JP3454217B2 (ja) * 1999-12-28 2003-10-06 日本電気株式会社 通信経路制御方法、機器制御装置、及びブリッジ
EP1113626B1 (en) * 1999-12-30 2009-04-22 Sony Deutschland GmbH Interface link layer device to build a distributed network
US7266617B1 (en) * 2000-01-18 2007-09-04 Apple Inc. Method and apparatus for border node behavior on a full-duplex bus
US6639918B1 (en) 2000-01-18 2003-10-28 Apple Computer, Inc. Method and apparatus for border node behavior on a full-duplex bus
JP2001230821A (ja) * 2000-02-16 2001-08-24 Sony Corp データ中継装置および方法、並びに提供媒体
US7050453B1 (en) 2000-02-17 2006-05-23 Apple Computer, Inc. Method and apparatus for ensuring compatibility on a high performance serial bus
AU2001237673A1 (en) * 2000-02-18 2001-08-27 Bridgeco Ag Reference time distribution over a network
US6895009B1 (en) * 2000-04-07 2005-05-17 Omneon Video Networks Method of generating timestamps for isochronous data
US6718497B1 (en) 2000-04-21 2004-04-06 Apple Computer, Inc. Method and apparatus for generating jitter test patterns on a high performance serial bus
US6618785B1 (en) 2000-04-21 2003-09-09 Apple Computer, Inc. Method and apparatus for automatic detection and healing of signal pair crossover on a high performance serial bus
JP2001313646A (ja) * 2000-04-27 2001-11-09 Sony Corp 電子機器およびその物理層回路のステート制御方法
US20020019904A1 (en) * 2000-05-11 2002-02-14 Katz Abraham Yehuda Three-dimensional switch providing packet routing between multiple multimedia buses
US20020018477A1 (en) * 2000-05-18 2002-02-14 Firemedia Communications (Israel) Ltd. Bandwidth and path allocation method for a switched fabric connecting multiple multimedia buses
US6822946B1 (en) * 2000-08-24 2004-11-23 Motorola, Inc Wireless bridge for a broadband network
EP1198085B1 (en) 2000-10-10 2011-06-08 Sony Deutschland GmbH Cycle synchronization between interconnected sub-networks
EP1199840A1 (en) * 2000-10-19 2002-04-24 THOMSON multimedia Method for connecting an IEEE1394 remote device to a cluster of IEEE1394 devices through a wireless link
MXPA03003415A (es) * 2000-10-19 2003-08-07 Thomson Licensing Sa Metodo para enlazar diversas lineas de comunicacion utilizando enlaces inalambricos.
EP1199839A1 (en) * 2000-10-19 2002-04-24 THOMSON multimedia Method for making bridge aware nodes communicate over hiperlan 2 bridges
JP4097891B2 (ja) * 2000-11-27 2008-06-11 三菱電機株式会社 Ieee1394を用いた同期システム
DE10211281B4 (de) * 2001-03-15 2007-02-01 Robert Bosch Gmbh Verfahren und Vorrichtung zur Synchronisation der Zykluszeit von mehreren Bussen sowie entsprechendes Bussystem
US6975653B2 (en) * 2001-06-12 2005-12-13 Agilent Technologies, Inc. Synchronizing clocks across sub-nets
US7269137B2 (en) * 2001-08-24 2007-09-11 Canon Kabushiki Kaisha Method for setting up an isochronous data stream connection, with the application of a predetermined, total isochronous delay on one or more routing paths
US6880025B2 (en) * 2001-12-27 2005-04-12 Koninklijke Philips Electronics N.V. Efficient timeout message management in IEEE 1394 bridged serial bus network
US6898658B2 (en) * 2001-12-27 2005-05-24 Koninklijke Philips Electronics N.V. Method to prevent net update oscillation
AU2003229090A1 (en) * 2002-05-31 2003-12-19 Acs State And Local Solutions, Inc. Systems and methods for collecting information at an emergency vehicle
US7321623B2 (en) 2002-10-01 2008-01-22 Avocent Corporation Video compression system
TW200805292A (en) * 2003-05-09 2008-01-16 Lg Electronics Inc Method of recording management information, apparatus for recording management data, method of reproducing data, apparatus for reproducing data, and recording medium
US7668099B2 (en) * 2003-06-13 2010-02-23 Apple Inc. Synthesis of vertical blanking signal
US20040255338A1 (en) * 2003-06-13 2004-12-16 Apple Computer, Inc. Interface for sending synchronized audio and video data
US7353284B2 (en) * 2003-06-13 2008-04-01 Apple Inc. Synchronized transmission of audio and video data from a computer to a client via an interface
US8275910B1 (en) 2003-07-02 2012-09-25 Apple Inc. Source packet bridge
JP4178552B2 (ja) * 2003-07-24 2008-11-12 株式会社安川電機 マスター・スレーブ同期通信方式
US9560371B2 (en) * 2003-07-30 2017-01-31 Avocent Corporation Video compression system
US7788567B1 (en) 2003-11-18 2010-08-31 Apple Inc. Symbol encoding for tolerance to single byte errors
US7995606B1 (en) 2003-12-03 2011-08-09 Apple Inc. Fly-by and ack-accelerated arbitration for broadcast packets
US7237135B1 (en) 2003-12-29 2007-06-26 Apple Inc. Cyclemaster synchronization in a distributed bridge
US7308517B1 (en) * 2003-12-29 2007-12-11 Apple Inc. Gap count analysis for a high speed serialized bus
US7802085B2 (en) * 2004-02-18 2010-09-21 Intel Corporation Apparatus and method for distributing private keys to an entity with minimal secret, unique information
US7457461B2 (en) * 2004-06-25 2008-11-25 Avocent Corporation Video compression noise immunity
US7693286B2 (en) * 2004-07-14 2010-04-06 Intel Corporation Method of delivering direct proof private keys in signed groups to devices using a distribution CD
US7697691B2 (en) * 2004-07-14 2010-04-13 Intel Corporation Method of delivering Direct Proof private keys to devices using an on-line service
US7792303B2 (en) * 2004-07-14 2010-09-07 Intel Corporation Method of delivering direct proof private keys to devices using a distribution CD
CN100395740C (zh) * 2004-11-03 2008-06-18 明基电通股份有限公司 通用型串行传输系统、打印机及其控制方法
US8924728B2 (en) * 2004-11-30 2014-12-30 Intel Corporation Apparatus and method for establishing a secure session with a device without exposing privacy-sensitive information
KR100597436B1 (ko) * 2004-12-15 2006-07-10 한국전자통신연구원 무선 1394 시스템의 사이클 타임 동기화 장치 및 그 방법
US20080214153A1 (en) * 2005-09-14 2008-09-04 Jorey Ramer Mobile User Profile Creation based on User Browse Behaviors
KR100652013B1 (ko) * 2005-11-17 2006-12-01 한국전자통신연구원 무선 ieee1394 프로토콜을 사용하는 이종 네트워크환경에서의 시간 동기화 방법
US7783820B2 (en) * 2005-12-30 2010-08-24 Avocent Corporation Packet-switched split computer having disassociated peripheral controller and plural data buses
US8014530B2 (en) 2006-03-22 2011-09-06 Intel Corporation Method and apparatus for authenticated, recoverable key distribution with no database secrets
TW200814780A (en) * 2006-04-28 2008-03-16 Avocent Corp DVC delta commands
JP2019175309A (ja) * 2018-03-29 2019-10-10 セイコーエプソン株式会社 回路装置、電子機器及びケーブルハーネス
WO2020024199A1 (en) * 2018-08-02 2020-02-06 Texas Instruments Incorporated High speed flexled digital interface
US12026510B1 (en) * 2023-01-10 2024-07-02 SiMa Technologies, Inc. Using cycle counts to serve compute elements executing statically scheduled instructions for a machine learning accelerator

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2266033B (en) * 1992-03-09 1995-07-12 Racal Datacom Ltd Communications bus and controller
US5799207A (en) * 1995-03-28 1998-08-25 Industrial Technology Research Institute Non-blocking peripheral access architecture having a register configure to indicate a path selection for data transfer between a master, memory, and an I/O device
US5883621A (en) * 1996-06-21 1999-03-16 Sony Corporation Device control with topology map in a digital network
US5848367A (en) * 1996-09-13 1998-12-08 Sony Corporation System and method for sharing a non-volatile memory element as a boot device
US5838876A (en) * 1996-09-24 1998-11-17 Sony Corporation Frame-accurate edit and playback in digital stream recording
JP3719789B2 (ja) * 1996-10-04 2005-11-24 株式会社東芝 通信端末装置及び中継装置
JPH10178438A (ja) * 1996-12-18 1998-06-30 Sony Corp データ通信システム、データ通信装置および方法
US5940608A (en) * 1997-02-11 1999-08-17 Micron Technology, Inc. Method and apparatus for generating an internal clock signal that is synchronized to an external clock signal
US5831805A (en) * 1997-02-13 1998-11-03 Sony Corporation Local power failure detection and clock disabling circuit
US5909559A (en) * 1997-04-04 1999-06-01 Texas Instruments Incorporated Bus bridge device including data bus of first width for a first processor, memory controller, arbiter circuit and second processor having a different second data width

Also Published As

Publication number Publication date
CN1143221C (zh) 2004-03-24
WO1999035587A1 (en) 1999-07-15
CN1254426A (zh) 2000-05-24
KR100646122B1 (ko) 2006-11-17
US6032261A (en) 2000-02-29
DE69835807T2 (de) 2007-04-12
KR20000075817A (ko) 2000-12-26
DE69835807D1 (de) 2006-10-19
JP2001515682A (ja) 2001-09-18
EP0961977B1 (en) 2006-09-06
EP0961977A1 (en) 1999-12-08

Similar Documents

Publication Publication Date Title
TW417050B (en) Method and apparatus for distributing a cycle clock to a plurality of bus nodes in a bus bridge
USRE39216E1 (en) Asynchronous processor access to a switch table in a network with isochronous capability
US4922244A (en) Queueing protocol
US7177307B2 (en) Device and method for transmission in a switch
JP2560992B2 (ja) データ通信方式
CN105512081B (zh) 用于以可转换的数据速率进行串行数据传输的方法和装置
CA1280217C (en) Method and apparatus for utilization of dual latency stations for performance improvement of token ring networks
WO2001089121A2 (en) Synchronization of asynchronous networks using media access control (mac) layer synchronization symbols
JP2004147348A (ja) スイッチング機構における等時性データのローカルループバック
Kunzman et al. 1394 high performance serial bus: The digital interface for ATV
CN111971648A (zh) 异步多时钟域数据流接合及再同步系统和方法
JP4571671B2 (ja) 通信モジュールのメッセージメモリのデータへアクセスする方法および装置
CN101919186A (zh) 用于可变速率复合比特流的电信复用器
JP2008509464A (ja) メッセージハンドラ、および通信モジュールが有するメッセージメモリ中のデータへのアクセスを制御する方法
WO2013154558A1 (en) Reconfiguration of an optical connection infrastructure
TW293975B (enExample)
US20090300254A1 (en) Method for Connecting a Flexray user having a Microcontroller to a Flexray Communications line Via a Flexray Communications Control Device, and Flexray Communications Control Device, Flexray User, and Flexray Communications System for Realizing this Method
CN101283548B (zh) 在FlexRay通信组件和FlexRay用户之间的用户接口和用于通过这种接口传输消息的方法
CN100574288C (zh) 用于串行通信总线的数据链路层设备
CN102355396B (zh) 高精度时间协议端口的创建方法、边界时钟设备和普通时钟设备
WO2008128544A1 (en) Low cost digital real-time link system
Cena et al. A multistage hierarchical distributed arbitration technique for priority-based real-time communication systems
Raghavan et al. A gigabyte-per-second parallel fiber optic network interface for multimedia applications
EP1069799B1 (en) QOS aware expansion mechanism
TWI253259B (en) ATM communication system and method with UTOPIA communication interface expansion

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees