KR100646122B1 - 버스 브리지에서 복수의 버스 노드들에 사이클 클럭을 분배하는 방법 및 장치 - Google Patents

버스 브리지에서 복수의 버스 노드들에 사이클 클럭을 분배하는 방법 및 장치 Download PDF

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Publication number
KR100646122B1
KR100646122B1 KR1019997007890A KR19997007890A KR100646122B1 KR 100646122 B1 KR100646122 B1 KR 100646122B1 KR 1019997007890 A KR1019997007890 A KR 1019997007890A KR 19997007890 A KR19997007890 A KR 19997007890A KR 100646122 B1 KR100646122 B1 KR 100646122B1
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South Korea
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cycle
bus
bridge
subsystem
portal
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KR1019997007890A
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Korean (ko)
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KR20000075817A (ko
Inventor
훌리알카르사미르엔.
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코닌클리케 필립스 일렉트로닉스 엔.브이.
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Publication of KR20000075817A publication Critical patent/KR20000075817A/ko
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H04L12/40058—Isochronous transmission
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4286—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a handshaking protocol, e.g. RS232C link
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0652—Synchronisation among time division multiple access [TDMA] nodes, e.g. time triggered protocol [TTP]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H04L12/40091—Bus bridging
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0012—High speed serial bus, e.g. IEEE P1394

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Small-Scale Networks (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
KR1019997007890A 1997-12-30 1998-10-08 버스 브리지에서 복수의 버스 노드들에 사이클 클럭을 분배하는 방법 및 장치 Expired - Fee Related KR100646122B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US09/000,672 1997-12-30
US09/000,672 US6032261A (en) 1997-12-30 1997-12-30 Bus bridge with distribution of a common cycle clock to all bridge portals to provide synchronization of local buses, and method of operation thereof
US9/000,672 1997-12-30
PCT/IB1998/001577 WO1999035587A1 (en) 1997-12-30 1998-10-08 Method and apparatus for distributing a cycle clock to a plurality of bus nodes in a bus bridge

Publications (2)

Publication Number Publication Date
KR20000075817A KR20000075817A (ko) 2000-12-26
KR100646122B1 true KR100646122B1 (ko) 2006-11-17

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KR1019997007890A Expired - Fee Related KR100646122B1 (ko) 1997-12-30 1998-10-08 버스 브리지에서 복수의 버스 노드들에 사이클 클럭을 분배하는 방법 및 장치

Country Status (8)

Country Link
US (1) US6032261A (enExample)
EP (1) EP0961977B1 (enExample)
JP (1) JP2001515682A (enExample)
KR (1) KR100646122B1 (enExample)
CN (1) CN1143221C (enExample)
DE (1) DE69835807T2 (enExample)
TW (1) TW417050B (enExample)
WO (1) WO1999035587A1 (enExample)

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Also Published As

Publication number Publication date
US6032261A (en) 2000-02-29
CN1254426A (zh) 2000-05-24
EP0961977B1 (en) 2006-09-06
EP0961977A1 (en) 1999-12-08
TW417050B (en) 2001-01-01
DE69835807D1 (de) 2006-10-19
CN1143221C (zh) 2004-03-24
JP2001515682A (ja) 2001-09-18
KR20000075817A (ko) 2000-12-26
DE69835807T2 (de) 2007-04-12
WO1999035587A1 (en) 1999-07-15

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