TW375792B - Device isolation technology - Google Patents

Device isolation technology

Info

Publication number
TW375792B
TW375792B TW085114836A TW85114836A TW375792B TW 375792 B TW375792 B TW 375792B TW 085114836 A TW085114836 A TW 085114836A TW 85114836 A TW85114836 A TW 85114836A TW 375792 B TW375792 B TW 375792B
Authority
TW
Taiwan
Prior art keywords
reaction chamber
temperature
gas
device isolation
silicon
Prior art date
Application number
TW085114836A
Other languages
English (en)
Inventor
In-Ok Park
Tae-Youn Park
Original Assignee
Hyundai Electronics Ind
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Ind filed Critical Hyundai Electronics Ind
Application granted granted Critical
Publication of TW375792B publication Critical patent/TW375792B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/907—Continuous processing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/913—Diverse treatments performed in unitary chamber

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Formation Of Insulating Films (AREA)
  • Element Separation (AREA)
  • Chemical Vapour Deposition (AREA)
TW085114836A 1995-12-02 1996-12-02 Device isolation technology TW375792B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950046244A KR0171982B1 (ko) 1995-12-02 1995-12-02 반도체 소자의 필드 산화막 형성방법

Publications (1)

Publication Number Publication Date
TW375792B true TW375792B (en) 1999-12-01

Family

ID=19437483

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085114836A TW375792B (en) 1995-12-02 1996-12-02 Device isolation technology

Country Status (6)

Country Link
US (1) US5926724A (zh)
JP (1) JPH09312287A (zh)
KR (1) KR0171982B1 (zh)
CN (1) CN1101595C (zh)
DE (1) DE19649917B4 (zh)
TW (1) TW375792B (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106206282A (zh) * 2015-04-29 2016-12-07 北大方正集团有限公司 半导体器件上形成场氧化层的制备方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1188419A (en) * 1981-12-14 1985-06-04 Yung-Chau Yen Nonvolatile multilayer gate semiconductor memory device
JPS61210638A (ja) * 1985-03-15 1986-09-18 Seiko Instr & Electronics Ltd 半導体装置の製造方法
JPS61247055A (ja) * 1985-04-24 1986-11-04 Seiko Instr & Electronics Ltd 半導体装置の製造方法
US4901133A (en) * 1986-04-02 1990-02-13 Texas Instruments Incorporated Multilayer semi-insulating film for hermetic wafer passivation and method for making same
US4951601A (en) * 1986-12-19 1990-08-28 Applied Materials, Inc. Multi-chamber integrated process system
US4818235A (en) * 1987-02-10 1989-04-04 Industry Technology Research Institute Isolation structures for integrated circuits
US4897364A (en) * 1989-02-27 1990-01-30 Motorola, Inc. Method for locos isolation using a framed oxidation mask and a polysilicon buffer layer
JPH03257935A (ja) * 1990-03-08 1991-11-18 Matsushita Electron Corp 半導体装置の製造方法
US5135886A (en) * 1990-12-06 1992-08-04 At&T Bell Laboratories Integrated circuit fabrication utilizing amorphous layers
US5192707A (en) * 1991-07-31 1993-03-09 Sgs-Thomson Microelectronics, Inc. Method of forming isolated regions of oxide
JPH07130836A (ja) * 1993-11-01 1995-05-19 Matsushita Electric Ind Co Ltd 素子分離の形成方法
DE69424759T2 (de) * 1993-12-28 2001-02-08 Applied Materials, Inc. Gasphasenabscheidungsverfahren in einer einzigen Kammer für Dünnfilmtransistoren
JPH07201840A (ja) * 1993-12-28 1995-08-04 Fujitsu Ltd 半導体装置の製造方法
US5643825A (en) * 1994-12-29 1997-07-01 Advanced Micro Devices, Inc. Integrated circuit isolation process

Also Published As

Publication number Publication date
CN1101595C (zh) 2003-02-12
DE19649917B4 (de) 2010-06-02
JPH09312287A (ja) 1997-12-02
KR0171982B1 (ko) 1999-03-30
DE19649917A1 (de) 1997-06-05
US5926724A (en) 1999-07-20
CN1160286A (zh) 1997-09-24
KR970053365A (ko) 1997-07-31

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees