TW374930B - A RAM device having a self-refresh mode - Google Patents
A RAM device having a self-refresh modeInfo
- Publication number
- TW374930B TW374930B TW087108919A TW87108919A TW374930B TW 374930 B TW374930 B TW 374930B TW 087108919 A TW087108919 A TW 087108919A TW 87108919 A TW87108919 A TW 87108919A TW 374930 B TW374930 B TW 374930B
- Authority
- TW
- Taiwan
- Prior art keywords
- voltage
- power supply
- self
- supply voltage
- refresh mode
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4094—Bit-line management or control circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019970027271A KR100253081B1 (ko) | 1997-06-25 | 1997-06-25 | 셀프-리프레시 모드를 가지는 다이나믹 랜덤 액세스 메모리 장치 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW374930B true TW374930B (en) | 1999-11-21 |
Family
ID=19511166
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW087108919A TW374930B (en) | 1997-06-25 | 1998-06-05 | A RAM device having a self-refresh mode |
Country Status (4)
Country | Link |
---|---|
US (1) | US5995434A (zh) |
JP (1) | JP4036536B2 (zh) |
KR (1) | KR100253081B1 (zh) |
TW (1) | TW374930B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI581263B (zh) * | 2013-04-23 | 2017-05-01 | 英凡薩斯公司 | 利用預先資料反相之記憶力優化記憶體 |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR19990013146A (ko) * | 1997-07-31 | 1999-02-25 | 윤종용 | 리프레시 동작모드시 소비되는 동작전류를 감소시키기 위한 반도체 메모리 장치 |
DE19836736C1 (de) * | 1998-08-13 | 1999-12-30 | Siemens Ag | Kombinierte Vorlade- und Homogenisierschaltung |
KR100355226B1 (ko) * | 1999-01-12 | 2002-10-11 | 삼성전자 주식회사 | 뱅크별로 선택적인 셀프 리프레쉬가 가능한 동적 메모리장치 |
TW463481B (en) * | 1999-04-28 | 2001-11-11 | Fujitsu Ltd | Cell search method, communication synchronization apparatus, portable terminal apparatus, and recording medium |
KR100616496B1 (ko) * | 1999-06-28 | 2006-08-25 | 주식회사 하이닉스반도체 | 동작모드에 따라 파워라인 연결 방식을 달리한 반도체메모리소자의 파워공급 제어장치 |
KR100387720B1 (ko) | 1999-06-29 | 2003-06-18 | 주식회사 하이닉스반도체 | 반도체 메모리 소자의 셀프 리프레쉬 장치 및 방법 |
KR20010059290A (ko) * | 1999-12-30 | 2001-07-06 | 박종섭 | 비트라인 프리차지전압 조절장치 |
KR100355227B1 (ko) * | 2000-01-06 | 2002-10-11 | 삼성전자 주식회사 | 데이터 수신기 |
KR100370168B1 (ko) * | 2000-12-29 | 2003-02-05 | 주식회사 하이닉스반도체 | 비트라인 프리차지 회로 |
US6693837B2 (en) * | 2002-04-23 | 2004-02-17 | Micron Technology, Inc. | System and method for quick self-refresh exit with transitional refresh |
KR100483003B1 (ko) * | 2002-07-27 | 2005-04-15 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 |
US6711093B1 (en) * | 2002-08-29 | 2004-03-23 | Micron Technology, Inc. | Reducing digit equilibrate current during self-refresh mode |
KR100776003B1 (ko) | 2003-11-13 | 2007-11-15 | 삼성전자주식회사 | 프로젝션 텔레비젼 및 그 제조방법 |
US6914841B1 (en) | 2004-01-30 | 2005-07-05 | Infineon Technologies Ag | System and method for refreshing a dynamic memory device |
US7478253B2 (en) * | 2004-05-21 | 2009-01-13 | Intel Corporation | Reduction of power consumption in electrical devices |
US7224631B2 (en) * | 2004-08-31 | 2007-05-29 | Micron Technology, Inc. | Non-skipping auto-refresh in a DRAM |
KR100573826B1 (ko) * | 2005-03-24 | 2006-04-26 | 주식회사 하이닉스반도체 | 반도체 기억 소자의 센스 앰프 구동 회로 및 구동 방법 |
KR100702124B1 (ko) * | 2005-04-01 | 2007-03-30 | 주식회사 하이닉스반도체 | 내부전압 공급회로 |
KR20060127366A (ko) * | 2005-06-07 | 2006-12-12 | 주식회사 하이닉스반도체 | 내부전압 구동 회로 |
KR101143395B1 (ko) * | 2005-09-13 | 2012-05-22 | 에스케이하이닉스 주식회사 | 반도체 메모리의 주변회로 전원 공급 장치 |
KR100649973B1 (ko) * | 2005-09-14 | 2006-11-27 | 주식회사 하이닉스반도체 | 내부 전압 발생 장치 |
US7903477B2 (en) | 2008-02-29 | 2011-03-08 | Mosaid Technologies Incorporated | Pre-charge voltage generation and power saving modes |
KR100945931B1 (ko) * | 2008-03-18 | 2010-03-05 | 주식회사 하이닉스반도체 | 비트라인 프리차지 전압 발생회로 |
JP2010170596A (ja) * | 2009-01-20 | 2010-08-05 | Elpida Memory Inc | 半導体記憶装置 |
KR20160045461A (ko) * | 2014-10-17 | 2016-04-27 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그의 구동방법 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR0154755B1 (ko) * | 1995-07-07 | 1998-12-01 | 김광호 | 가변플레이트전압 발생회로를 구비하는 반도체 메모리장치 |
US5689467A (en) * | 1995-11-30 | 1997-11-18 | Texas Instruments Incorporated | Apparatus and method for reducing test time of the data retention parameter in a dynamic random access memory |
-
1997
- 1997-06-25 KR KR1019970027271A patent/KR100253081B1/ko not_active IP Right Cessation
-
1998
- 1998-06-05 TW TW087108919A patent/TW374930B/zh not_active IP Right Cessation
- 1998-06-12 US US09/095,931 patent/US5995434A/en not_active Expired - Lifetime
- 1998-06-24 JP JP17729598A patent/JP4036536B2/ja not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI581263B (zh) * | 2013-04-23 | 2017-05-01 | 英凡薩斯公司 | 利用預先資料反相之記憶力優化記憶體 |
Also Published As
Publication number | Publication date |
---|---|
US5995434A (en) | 1999-11-30 |
JP4036536B2 (ja) | 2008-01-23 |
JPH1173767A (ja) | 1999-03-16 |
KR19990003405A (ko) | 1999-01-15 |
KR100253081B1 (ko) | 2000-09-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW374930B (en) | A RAM device having a self-refresh mode | |
KR950012454A (ko) | 다수의 내부 전원을 갖는 동적 메모리장치 | |
EP0399240A3 (en) | Semiconductor memory device | |
EP0293933A3 (en) | Dynamic memory circuit with improved sensing scheme | |
TW326569B (en) | ROM-type semiconductor memory device with large operating margin | |
TW375741B (en) | Low voltage dynamic memory | |
EP0383080A3 (en) | Semiconductor memory device | |
EP0344894A3 (en) | Memory cell | |
TW346629B (en) | Semiconductor memory device | |
EP0345065A3 (en) | Memories | |
KR960019291A (ko) | 내부전압 발생회로 | |
KR930003138A (ko) | 다이나믹형 반도체 기억장치 | |
KR940001163A (ko) | 셀프-리프레쉬 기능을 테스트하는데 요구되는 시간을 단축하는데 적합한 다이나믹 랜덤 액세스 메모리 장치 | |
DE69623466D1 (de) | Einseitiges lesen unter verwendung von bitleitungen für dram | |
EP0316902A3 (en) | Semiconductor memory circuit having an improved restoring scheme | |
KR950009725A (ko) | 반도체 메모리 장치 | |
TW328591B (en) | Sense circuit | |
KR950007089A (ko) | 진폭이 작은 고속 입력 신호에 응답하는 저전력 소비 신호 입력 회로를 갖고 있는 반도체 집적 회로 장치 | |
TW286404B (en) | Semiconductor memory device for reducing operating power consumption amount | |
JPS57203290A (en) | Ic memory | |
KR950004271A (ko) | 반도체 메모리 장치의 전원전압 감지회로 | |
KR970076818A (ko) | 임프린트보상회로를 가지는 강유전체 커패시터 반도체 메모리 장치 | |
TW200515415A (en) | Circuit and method for self-refresh of DRAM cell | |
CA2430875A1 (en) | Ferroelectric memory supplying predetermined amount of direct-current bias electricity to first and second bit lines upon reading data from memory cell | |
KR960025776A (ko) | 셰어드 센스앰프 방식의 센스 램프로 소비되는 전력을 경감한 반도체 기억 장치 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |