TW343307B - Nonvolatile memory system and nonvolatile semiconductor memory - Google Patents

Nonvolatile memory system and nonvolatile semiconductor memory

Info

Publication number
TW343307B
TW343307B TW086108660A TW86108660A TW343307B TW 343307 B TW343307 B TW 343307B TW 086108660 A TW086108660 A TW 086108660A TW 86108660 A TW86108660 A TW 86108660A TW 343307 B TW343307 B TW 343307B
Authority
TW
Taiwan
Prior art keywords
state
memory cells
command
memory
nonvolatile
Prior art date
Application number
TW086108660A
Other languages
English (en)
Chinese (zh)
Inventor
Tatsuya Ishii
Hitoshi Niwa
Osamu Tuchiya
Syoji Kuboya
Original Assignee
Hitachi Ltd
Hitachi Cho Lsi Eng Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Cho Lsi Eng Co Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of TW343307B publication Critical patent/TW343307B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3427—Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0491—Virtual ground arrays
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3404—Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3431—Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/18—Flash erasure of all the cells in an array, sector or block simultaneously

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
TW086108660A 1996-07-09 1997-06-20 Nonvolatile memory system and nonvolatile semiconductor memory TW343307B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP17896596 1996-07-09
JP12679397A JP3976839B2 (ja) 1996-07-09 1997-05-16 不揮発性メモリシステムおよび不揮発性半導体メモリ

Publications (1)

Publication Number Publication Date
TW343307B true TW343307B (en) 1998-10-21

Family

ID=26462918

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086108660A TW343307B (en) 1996-07-09 1997-06-20 Nonvolatile memory system and nonvolatile semiconductor memory

Country Status (4)

Country Link
US (16) US5867428A (enExample)
JP (1) JP3976839B2 (enExample)
KR (1) KR100479632B1 (enExample)
TW (1) TW343307B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8447914B2 (en) 2008-03-01 2013-05-21 Kabushiki Kaisha Toshiba Memory system managing the number of times of erasing

Families Citing this family (131)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100477494B1 (ko) * 1995-01-31 2005-03-23 가부시끼가이샤 히다치 세이사꾸쇼 반도체 메모리 장치
JP3976839B2 (ja) * 1996-07-09 2007-09-19 株式会社ルネサステクノロジ 不揮発性メモリシステムおよび不揮発性半導体メモリ
FR2768846B1 (fr) * 1997-09-19 1999-12-24 Sgs Thomson Microelectronics Procede et circuit de generation de la tension de programmation et d'effacement dans une memoire non volatile
DE19980546B4 (de) 1998-03-02 2011-01-27 Lexar Media, Inc., Fremont Flash-Speicherkarte mit erweiterter Betriebsmodus-Erkennung und benutzerfreundlichem Schnittstellensystem
WO1999065036A1 (en) * 1998-06-12 1999-12-16 Macronix International Co., Ltd. Channel fn program/erase recovery scheme
JP3999900B2 (ja) 1998-09-10 2007-10-31 株式会社東芝 不揮発性半導体メモリ
KR100296329B1 (ko) 1998-10-29 2001-08-07 박종섭 플래쉬 메모리 장치의 소거 방법 및 리커버리용기판 전압공급 회로
US6901457B1 (en) 1998-11-04 2005-05-31 Sandisk Corporation Multiple mode communications system
JP4036552B2 (ja) * 1998-12-17 2008-01-23 富士通株式会社 不揮発性半導体記憶装置
JP2001319486A (ja) * 2000-05-12 2001-11-16 Mitsubishi Electric Corp 不揮発性半導体記憶装置
EP1174881A1 (en) * 2000-06-22 2002-01-23 STMicroelectronics S.r.l. Integrated circuit for memory card and memory card using the circuit
JP4819215B2 (ja) * 2000-07-24 2011-11-24 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置およびその製造方法
US7155559B1 (en) 2000-08-25 2006-12-26 Lexar Media, Inc. Flash memory architecture with separate storage of overhead and user data
US6772274B1 (en) 2000-09-13 2004-08-03 Lexar Media, Inc. Flash memory system and method implementing LBA to PBA correlation within flash memory array
JP4055103B2 (ja) * 2000-10-02 2008-03-05 株式会社ルネサステクノロジ 不揮発性メモリおよびそれを内蔵した半導体集積回路並びに不揮発性メモリの書込み方法
JP3963420B2 (ja) * 2000-11-15 2007-08-22 株式会社東芝 半導体記憶装置
US6556481B1 (en) 2001-02-21 2003-04-29 Aplus Flash Technology, Inc. 3-step write operation nonvolatile semiconductor one-transistor, nor-type flash EEPROM memory cell
US6620682B1 (en) * 2001-02-27 2003-09-16 Aplus Flash Technology, Inc. Set of three level concurrent word line bias conditions for a nor type flash memory array
JP2002269065A (ja) * 2001-03-08 2002-09-20 Mitsubishi Electric Corp プログラム可能な不揮発性メモリを内蔵したマイクロコンピュータ
US6522580B2 (en) * 2001-06-27 2003-02-18 Sandisk Corporation Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states
JP2003030993A (ja) 2001-07-17 2003-01-31 Toshiba Corp 半導体記憶装置
US6614695B2 (en) * 2001-08-24 2003-09-02 Micron Technology, Inc. Non-volatile memory with block erase
KR100466980B1 (ko) * 2002-01-15 2005-01-24 삼성전자주식회사 낸드 플래시 메모리 장치
US6901499B2 (en) 2002-02-27 2005-05-31 Microsoft Corp. System and method for tracking data stored in a flash memory device
US7533214B2 (en) * 2002-02-27 2009-05-12 Microsoft Corporation Open architecture flash driver
JP2003257187A (ja) * 2002-02-28 2003-09-12 Hitachi Ltd 不揮発性メモリ、ｉｃカード及びデータ処理装置
US6862223B1 (en) 2002-07-05 2005-03-01 Aplus Flash Technology, Inc. Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
JP4248269B2 (ja) * 2003-02-21 2009-04-02 パナソニック株式会社 半導体不揮発性記憶装置
JP2005011151A (ja) 2003-06-20 2005-01-13 Renesas Technology Corp メモリカード
US7151692B2 (en) * 2004-01-27 2006-12-19 Macronix International Co., Ltd. Operation scheme for programming charge trapping non-volatile memory
US7568134B1 (en) * 2004-02-02 2009-07-28 Advanced Micro Devices, Inc. Method of exhaustively testing an embedded ROM using generated ATPG test patterns
US7177200B2 (en) * 2004-02-10 2007-02-13 Msystems Ltd. Two-phase programming of a flash memory
US6963508B1 (en) * 2004-04-22 2005-11-08 Fuja Shone Operation method for non-volatile memory
US7209390B2 (en) * 2004-04-26 2007-04-24 Macronix International Co., Ltd. Operation scheme for spectrum shift in charge trapping non-volatile memory
US7075828B2 (en) * 2004-04-26 2006-07-11 Macronix International Co., Intl. Operation scheme with charge balancing erase for charge trapping non-volatile memory
US7133313B2 (en) * 2004-04-26 2006-11-07 Macronix International Co., Ltd. Operation scheme with charge balancing for charge trapping non-volatile memory
US7164603B2 (en) * 2004-04-26 2007-01-16 Yen-Hao Shih Operation scheme with high work function gate and charge balancing for charge trapping non-volatile memory
US7613868B2 (en) * 2004-06-09 2009-11-03 Headway Technologies, Inc. Method and system for optimizing the number of word line segments in a segmented MRAM array
US7190614B2 (en) * 2004-06-17 2007-03-13 Macronix International Co., Ltd. Operation scheme for programming charge trapping non-volatile memory
US20060044926A1 (en) * 2004-08-27 2006-03-02 Nokia Corporation Method and system for accessing performance parameters in memory devices
US20060113586A1 (en) * 2004-11-29 2006-06-01 Macronix International Co., Ltd. Charge trapping dielectric structure for non-volatile memory
US20060140007A1 (en) * 2004-12-29 2006-06-29 Raul-Adrian Cernea Non-volatile memory and method with shared processing for an aggregate of read/write circuits
US7187585B2 (en) * 2005-04-05 2007-03-06 Sandisk Corporation Read operation for non-volatile storage that includes compensation for coupling
US7196946B2 (en) * 2005-04-05 2007-03-27 Sandisk Corporation Compensating for coupling in non-volatile storage
US7196928B2 (en) * 2005-04-05 2007-03-27 Sandisk Corporation Compensating for coupling during read operations of non-volatile memory
US8200887B2 (en) * 2007-03-29 2012-06-12 Violin Memory, Inc. Memory management system and method
US9384818B2 (en) 2005-04-21 2016-07-05 Violin Memory Memory power management
US9286198B2 (en) 2005-04-21 2016-03-15 Violin Memory Method and system for storage of data in non-volatile media
US8452929B2 (en) * 2005-04-21 2013-05-28 Violin Memory Inc. Method and system for storage of data in non-volatile media
US7227783B2 (en) * 2005-04-28 2007-06-05 Freescale Semiconductor, Inc. Memory structure and method of programming
US7602009B2 (en) * 2005-06-16 2009-10-13 Micron Technology, Inc. Erasable non-volatile memory device using hole trapping in high-K dielectrics
US7233528B2 (en) * 2005-07-25 2007-06-19 Atmel Corporation Reduction of programming time in electrically programmable devices
JP4301227B2 (ja) * 2005-09-15 2009-07-22 セイコーエプソン株式会社 電気光学装置及びその製造方法、電子機器並びにコンデンサー
JP2007149291A (ja) * 2005-11-30 2007-06-14 Sharp Corp 不揮発性半導体記憶装置及び書き込み方法
US7242622B2 (en) * 2005-12-06 2007-07-10 Macronix International Co., Ltd. Methods to resolve hard-to-erase condition in charge trapping non-volatile memory
JP4761959B2 (ja) * 2005-12-26 2011-08-31 株式会社東芝 半導体集積回路装置
US7586795B2 (en) * 2006-03-20 2009-09-08 Cypress Semiconductor Corporation Variable reference voltage circuit for non-volatile memory
CN103280239B (zh) 2006-05-12 2016-04-06 苹果公司 存储设备中的失真估计和消除
US8239735B2 (en) 2006-05-12 2012-08-07 Apple Inc. Memory Device with adaptive capacity
KR101202537B1 (ko) 2006-05-12 2012-11-19 애플 인크. 메모리 디바이스를 위한 결합된 왜곡 추정 및 에러 보정 코딩
US8028186B2 (en) 2006-10-23 2011-09-27 Violin Memory, Inc. Skew management in an interconnection system
US7975192B2 (en) 2006-10-30 2011-07-05 Anobit Technologies Ltd. Reading memory cells using multiple thresholds
US8151163B2 (en) 2006-12-03 2012-04-03 Anobit Technologies Ltd. Automatic defect management in memory devices
US20080151670A1 (en) * 2006-12-22 2008-06-26 Tomohiro Kawakubo Memory device, memory controller and memory system
US8151166B2 (en) * 2007-01-24 2012-04-03 Anobit Technologies Ltd. Reduction of back pattern dependency effects in memory devices
KR101364443B1 (ko) * 2007-01-31 2014-02-17 삼성전자주식회사 메모리 시스템, 이 시스템을 위한 메모리 제어기와 메모리,이 시스템의 신호 구성 방법
WO2008111058A2 (en) 2007-03-12 2008-09-18 Anobit Technologies Ltd. Adaptive estimation of memory cell read thresholds
US9632870B2 (en) 2007-03-29 2017-04-25 Violin Memory, Inc. Memory system with multiple striping of raid groups and method for performing the same
US11010076B2 (en) 2007-03-29 2021-05-18 Violin Systems Llc Memory system with multiple striping of raid groups and method for performing the same
US8234545B2 (en) 2007-05-12 2012-07-31 Apple Inc. Data storage with incremental redundancy
US8429493B2 (en) * 2007-05-12 2013-04-23 Apple Inc. Memory device with internal signap processing unit
JP4496238B2 (ja) 2007-06-04 2010-07-07 株式会社東芝 不揮発性メモリ装置
US8259497B2 (en) * 2007-08-06 2012-09-04 Apple Inc. Programming schemes for multi-level analog memory cells
US8174905B2 (en) 2007-09-19 2012-05-08 Anobit Technologies Ltd. Programming orders for reducing distortion in arrays of multi-level analog memory cells
US8527819B2 (en) 2007-10-19 2013-09-03 Apple Inc. Data storage in analog memory cell arrays having erase failures
WO2009063450A2 (en) 2007-11-13 2009-05-22 Anobit Technologies Optimized selection of memory units in multi-unit memory devices
US8225181B2 (en) * 2007-11-30 2012-07-17 Apple Inc. Efficient re-read operations from memory devices
US8209588B2 (en) 2007-12-12 2012-06-26 Anobit Technologies Ltd. Efficient interference cancellation in analog memory cell arrays
US8456905B2 (en) * 2007-12-16 2013-06-04 Apple Inc. Efficient data storage in multi-plane memory devices
US8938655B2 (en) * 2007-12-20 2015-01-20 Spansion Llc Extending flash memory data retension via rewrite refresh
TWI384488B (zh) * 2007-12-24 2013-02-01 Skymedi Corp Nonvolatile storage device and its data writing method
US8156398B2 (en) 2008-02-05 2012-04-10 Anobit Technologies Ltd. Parameter estimation based on error correction code parity check equations
US8230300B2 (en) 2008-03-07 2012-07-24 Apple Inc. Efficient readout from analog memory cells using data compression
US7835203B2 (en) * 2008-03-12 2010-11-16 Macronix International Co., Ltd Programming method and memory device using the same
US8400858B2 (en) 2008-03-18 2013-03-19 Apple Inc. Memory device with reduced sense time readout
US8131915B1 (en) * 2008-04-11 2012-03-06 Marvell Intentional Ltd. Modifying or overwriting data stored in flash memory
KR101378602B1 (ko) * 2008-05-13 2014-03-25 삼성전자주식회사 메모리 장치 및 메모리 프로그래밍 방법
US7995388B1 (en) 2008-08-05 2011-08-09 Anobit Technologies Ltd. Data storage using modified voltages
US8949684B1 (en) 2008-09-02 2015-02-03 Apple Inc. Segmented data storage
US8169825B1 (en) 2008-09-02 2012-05-01 Anobit Technologies Ltd. Reliable data storage in analog memory cells subjected to long retention periods
US8482978B1 (en) 2008-09-14 2013-07-09 Apple Inc. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8239734B1 (en) 2008-10-15 2012-08-07 Apple Inc. Efficient data storage in storage device arrays
US8713330B1 (en) 2008-10-30 2014-04-29 Apple Inc. Data scrambling in memory devices
US8208304B2 (en) 2008-11-16 2012-06-26 Anobit Technologies Ltd. Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N
US8248831B2 (en) 2008-12-31 2012-08-21 Apple Inc. Rejuvenation of analog memory cells
US8397131B1 (en) 2008-12-31 2013-03-12 Apple Inc. Efficient readout schemes for analog memory cell devices
US8924661B1 (en) 2009-01-18 2014-12-30 Apple Inc. Memory system including a controller and processors associated with memory devices
US8228701B2 (en) * 2009-03-01 2012-07-24 Apple Inc. Selective activation of programming schemes in analog memory cell arrays
JP2010224806A (ja) 2009-03-23 2010-10-07 Toshiba Corp コントローラ及び半導体記憶装置
US8832354B2 (en) 2009-03-25 2014-09-09 Apple Inc. Use of host system resources by memory controller
US8259506B1 (en) 2009-03-25 2012-09-04 Apple Inc. Database of memory read thresholds
US8238157B1 (en) 2009-04-12 2012-08-07 Apple Inc. Selective re-programming of analog memory cells
US20100325351A1 (en) 2009-06-12 2010-12-23 Bennett Jon C R Memory system having persistent garbage collection
US8479080B1 (en) 2009-07-12 2013-07-02 Apple Inc. Adaptive over-provisioning in memory systems
US8495465B1 (en) 2009-10-15 2013-07-23 Apple Inc. Error correction coding over multiple memory pages
US8677054B1 (en) 2009-12-16 2014-03-18 Apple Inc. Memory management schemes for non-volatile memory devices
US8694814B1 (en) 2010-01-10 2014-04-08 Apple Inc. Reuse of host hibernation storage space by memory controller
US8572311B1 (en) 2010-01-11 2013-10-29 Apple Inc. Redundant data storage in multi-die memory systems
US8694853B1 (en) 2010-05-04 2014-04-08 Apple Inc. Read commands for reading interfering memory cells
US8572423B1 (en) 2010-06-22 2013-10-29 Apple Inc. Reducing peak current in memory systems
US8595591B1 (en) 2010-07-11 2013-11-26 Apple Inc. Interference-aware assignment of programming levels in analog memory cells
US9104580B1 (en) 2010-07-27 2015-08-11 Apple Inc. Cache memory for hybrid disk drives
US8767459B1 (en) 2010-07-31 2014-07-01 Apple Inc. Data storage in analog memory cells across word lines using a non-integer number of bits per cell
US8856475B1 (en) 2010-08-01 2014-10-07 Apple Inc. Efficient selection of memory blocks for compaction
US8694854B1 (en) 2010-08-17 2014-04-08 Apple Inc. Read threshold setting based on soft readout statistics
KR20120028146A (ko) * 2010-09-14 2012-03-22 삼성전자주식회사 입출력 경로 스왑을 지원하는 메모리 시스템
US9021181B1 (en) 2010-09-27 2015-04-28 Apple Inc. Memory management for unifying memory cell conditions by using maximum time intervals
US8773904B2 (en) 2011-12-28 2014-07-08 Apple Inc. Optimized threshold search in analog memory cells
US10521339B2 (en) * 2013-02-28 2019-12-31 Technion Research And Development Foundation Ltd. Retired page utilization (RPU) for improved write capacity of solid state drives
US9202768B2 (en) * 2013-03-07 2015-12-01 Kabushiki Kaisha Toshiba Semiconductor module
US9646705B2 (en) 2013-06-12 2017-05-09 Samsung Electronics Co., Ltd. Memory systems including nonvolatile memory devices and dynamic access methods thereof
US9612773B2 (en) * 2013-11-21 2017-04-04 Samsung Electronics Co., Ltd. User device having a host flash translation layer (FTL), a method for transferring an erase count thereof, a method for transferring reprogram information thereof, and a method for transferring a page offset of an open block thereof
JP2015204126A (ja) 2014-04-16 2015-11-16 株式会社東芝 半導体記憶装置
US9384830B2 (en) * 2014-05-06 2016-07-05 Micron Technology, Inc. Apparatuses and methods for performing multiple memory operations
US9230663B1 (en) * 2014-08-29 2016-01-05 Sandisk Technologies Inc. Programming memory with reduced short-term charge loss
KR20170026831A (ko) * 2015-08-28 2017-03-09 에스케이하이닉스 주식회사 불휘발성 메모리 장치, 그것을 포함하는 데이터 저장 장치 그리고 데이터 저장 장치의 동작 방법.
US9633738B1 (en) * 2016-06-28 2017-04-25 Sandisk Technologies Llc Accelerated physical secure erase
JP2019053805A (ja) * 2017-09-15 2019-04-04 東芝メモリ株式会社 メモリシステム
US11147744B1 (en) * 2020-07-13 2021-10-19 Lawrence Duong Device attaching handles and toys to a baby bottle for developing dexterity
US11556416B2 (en) 2021-05-05 2023-01-17 Apple Inc. Controlling memory readout reliability and throughput by adjusting distance between read thresholds
US11847342B2 (en) 2021-07-28 2023-12-19 Apple Inc. Efficient transfer of hard data and confidence levels in reading a nonvolatile memory

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2515703B2 (ja) 1985-10-25 1996-07-10 株式会社日立製作所 Ｅｅｐｒｏｍ装置
US5303198A (en) * 1990-09-28 1994-04-12 Fuji Photo Film Co., Ltd. Method of recording data in memory card having EEPROM and memory card system using the same
JP3017524B2 (ja) 1990-10-09 2000-03-13 富士写真フイルム株式会社 Ｉｃメモリカードにおけるデータ記録方法およびｉｃメモリカードシステム
JP2800502B2 (ja) * 1991-10-15 1998-09-21 日本電気株式会社 半導体メモリ装置
US5297029A (en) 1991-12-19 1994-03-22 Kabushiki Kaisha Toshiba Semiconductor memory device
US5347489A (en) * 1992-04-21 1994-09-13 Intel Corporation Method and circuitry for preconditioning shorted rows in a nonvolatile semiconductor memory incorporating row redundancy
US5327383A (en) * 1992-04-21 1994-07-05 Intel Corporation Method and circuitry for erasing a nonvolatile semiconductor memory incorporating row redundancy
JP2647312B2 (ja) 1992-09-11 1997-08-27 インターナショナル・ビジネス・マシーンズ・コーポレイション 一括消去型不揮発性半導体記憶装置
US5509134A (en) * 1993-06-30 1996-04-16 Intel Corporation Method and apparatus for execution of operations in a flash memory array
JPH07143214A (ja) * 1993-11-19 1995-06-02 Sony Corp 携帯用電話機
JPH07169288A (ja) 1993-12-13 1995-07-04 Hitachi Ltd 一括消去型不揮発性記憶装置
US5541886A (en) * 1994-12-27 1996-07-30 Intel Corporation Method and apparatus for storing control information in multi-bit non-volatile memory arrays
KR100477494B1 (ko) * 1995-01-31 2005-03-23 가부시끼가이샤 히다치 세이사꾸쇼 반도체 메모리 장치
WO1997000518A1 (en) * 1995-06-14 1997-01-03 Hitachi, Ltd. Semiconductor memory, memory device, and memory card
US5619453A (en) * 1995-07-28 1997-04-08 Micron Quantum Devices, Inc. Memory system having programmable flow control register
JP3976839B2 (ja) * 1996-07-09 2007-09-19 株式会社ルネサステクノロジ 不揮発性メモリシステムおよび不揮発性半導体メモリ
US6335878B1 (en) * 1998-07-28 2002-01-01 Hitachi, Ltd. Non-volatile multi-level semiconductor flash memory device and method of driving same
US6134148A (en) * 1997-09-30 2000-10-17 Hitachi, Ltd. Semiconductor integrated circuit and data processing system
TW407234B (en) * 1997-03-31 2000-10-01 Hitachi Ltd Semiconductor memory device, non-volatile semiconductor memory device and data reading method thereof
TW389910B (en) * 1997-07-03 2000-05-11 Seiko Epson Corp Programmable nonvolatile memory apparatus and microcomputer using the same
US6102963A (en) * 1997-12-29 2000-08-15 Vantis Corporation Electrically erasable and reprogrammable, nonvolatile integrated storage device with in-system programming and verification (ISPAV) capabilities for supporting in-system reconfiguring of PLD's
US6333871B1 (en) * 1998-02-16 2001-12-25 Hitachi, Ltd. Nonvolatile semiconductor memory including a controller for providing an improved reprogram operation
KR100338772B1 (ko) * 2000-03-10 2002-05-31 윤종용 바이어스 라인이 분리된 비휘발성 메모리 장치의 워드라인 드라이버 및 워드 라인 드라이빙 방법
US6620682B1 (en) * 2001-02-27 2003-09-16 Aplus Flash Technology, Inc. Set of three level concurrent word line bias conditions for a nor type flash memory array
JP3979486B2 (ja) * 2001-09-12 2007-09-19 株式会社ルネサステクノロジ 不揮発性記憶装置およびデータ格納方法
US6839826B2 (en) * 2002-02-06 2005-01-04 Sandisk Corporation Memory device with pointer structure to map logical to physical addresses
JP4225749B2 (ja) * 2002-08-07 2009-02-18 株式会社ルネサステクノロジ 半導体記憶装置
JP3724578B2 (ja) * 2003-07-18 2005-12-07 セイコーエプソン株式会社 半導体装置及びその制御方法
US7283398B1 (en) * 2004-05-04 2007-10-16 Spansion Llc Method for minimizing false detection of states in flash memory devices
US7307896B2 (en) * 2005-03-11 2007-12-11 Micron Technology, Inc. Detection of row-to-row shorts and other row decode defects in memory devices
JP2008084485A (ja) * 2006-09-28 2008-04-10 Toshiba Corp 不揮発性半導体記憶装置及びデータ読出方法
JP4147495B2 (ja) 2008-03-21 2008-09-10 富士通株式会社 通信装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8447914B2 (en) 2008-03-01 2013-05-21 Kabushiki Kaisha Toshiba Memory system managing the number of times of erasing

Also Published As

Publication number Publication date
JP3976839B2 (ja) 2007-09-19
US20060120164A1 (en) 2006-06-08
KR100479632B1 (ko) 2005-07-28
US7405979B2 (en) 2008-07-29
US20080008009A1 (en) 2008-01-10
JPH1079197A (ja) 1998-03-24
US6567311B2 (en) 2003-05-20
US6873552B2 (en) 2005-03-29
KR980011503A (ko) 1998-04-30
US8004905B2 (en) 2011-08-23
US6683811B2 (en) 2004-01-27
US20060268610A1 (en) 2006-11-30
US20090003085A1 (en) 2009-01-01
US6157573A (en) 2000-12-05
US6392932B1 (en) 2002-05-21
US20050157550A1 (en) 2005-07-21
US6385092B1 (en) 2002-05-07
US7072222B2 (en) 2006-07-04
US20020054511A1 (en) 2002-05-09
US20030156459A1 (en) 2003-08-21
US20100182847A1 (en) 2010-07-22
US20020136056A1 (en) 2002-09-26
US5867428A (en) 1999-02-02
US7697345B2 (en) 2010-04-13
US20020034099A1 (en) 2002-03-21
US7283399B2 (en) 2007-10-16
US7145805B2 (en) 2006-12-05
US6452838B1 (en) 2002-09-17
US5982668A (en) 1999-11-09
US20040114434A1 (en) 2004-06-17
US6023425A (en) 2000-02-08

Similar Documents

Publication Publication Date Title
TW343307B (en) Nonvolatile memory system and nonvolatile semiconductor memory
TW350048B (en) Non-volatile semiconductor memory and the writing method
TW328179B (en) Non-volatile semiconductor memory device
US5270980A (en) Sector erasable flash EEPROM
TW326093B (en) Non-volatile semiconductor memory device
AU6675196A (en) Memory system having non-volatile data storage structure for memory control parameters and method
US4999812A (en) Architecture for a flash erase EEPROM memory
TW330265B (en) Semiconductor apparatus
AU6497096A (en) Memory system having programmable control parameters
KR950704789A (ko) 전계 산화물 아일랜드가 제거되는 메모리 어레이 및 방법(memory array with field oxide islands eliminated and method)
EP0055594B1 (en) Electrically programmable non-volatile semiconductor memory device
US6385107B1 (en) Architecture for handling internal voltages in a non-volatile memory, particularly in a single-voltage supply type of dual-work flash memory
TW357336B (en) Non-voltile memory device, non-volatile memory cell and method of adjusting the threshold value of the non-volatile memory cell and each of plural transistors
TW373337B (en) Non-volatile semiconductor memory
EP0503756A3 (enExample)
WO1986006540A3 (en) Memory cell for use in a read only memory
US6137725A (en) Row decoding circuit for a semiconductor non-volatile electrically programmable memory and corresponding method
EP1038517A3 (en) Titanium-silica complex and cosmetic preparation compounding the same
KR100391117B1 (ko) 채널 핫 캐리어 주입을 이용하여 플래시 메모리로 페이지를 기록하는 방법
TW368754B (en) An adjustable threshold voltage conversion circuit
KR900013522A (ko) 반도체 불휘발성 기억장치와 그것을 사용한 정보처리시스템
KR910001773A (ko) 프로그래밍 전에 소거된 eeprom을 조절하기 위한 방법 및 회로
TW334566B (en) Non-volatile semiconductor memory device
EP0108681A3 (en) Bit erasable electrically erasable programmable read only memory
TW430815B (en) Semiconductor integrated circuit memory and, bus control method

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees