TW202338952A - 矽晶圓的洗淨方法及附有自然氧化膜的矽晶圓的製造方法 - Google Patents

矽晶圓的洗淨方法及附有自然氧化膜的矽晶圓的製造方法 Download PDF

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Publication number
TW202338952A
TW202338952A TW111140008A TW111140008A TW202338952A TW 202338952 A TW202338952 A TW 202338952A TW 111140008 A TW111140008 A TW 111140008A TW 111140008 A TW111140008 A TW 111140008A TW 202338952 A TW202338952 A TW 202338952A
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TW
Taiwan
Prior art keywords
cleaning
oxide film
silicon wafer
natural oxide
surface roughness
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TW111140008A
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English (en)
Chinese (zh)
Inventor
藤井康太
阿部達夫
大槻剛
Original Assignee
日商信越半導體股份有限公司
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Priority claimed from JP2021186095A external-priority patent/JP7571710B2/ja
Application filed by 日商信越半導體股份有限公司 filed Critical 日商信越半導體股份有限公司
Publication of TW202338952A publication Critical patent/TW202338952A/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02043Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02052Wet cleaning only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation
    • H01L21/3212Planarisation by chemical mechanical polishing [CMP]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
TW111140008A 2021-11-16 2022-10-21 矽晶圓的洗淨方法及附有自然氧化膜的矽晶圓的製造方法 TW202338952A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2021-186095 2021-11-16
JP2021186095A JP7571710B2 (ja) 2021-11-16 シリコンウェーハの洗浄方法及び自然酸化膜付きシリコンウェーハの製造方法

Publications (1)

Publication Number Publication Date
TW202338952A true TW202338952A (zh) 2023-10-01

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ID=86396834

Family Applications (1)

Application Number Title Priority Date Filing Date
TW111140008A TW202338952A (zh) 2021-11-16 2022-10-21 矽晶圓的洗淨方法及附有自然氧化膜的矽晶圓的製造方法

Country Status (4)

Country Link
KR (1) KR20240095427A (ja)
CN (1) CN118251751A (ja)
TW (1) TW202338952A (ja)
WO (1) WO2023090009A1 (ja)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06163662A (ja) 1992-11-17 1994-06-10 Sharp Corp 半導体基板表面ラフネス値の測定方法
JP4435298B2 (ja) 2004-03-30 2010-03-17 株式会社堀場製作所 試料解析方法
KR100914606B1 (ko) * 2007-11-01 2009-08-31 주식회사 실트론 습식 게이트 산화막 형성 방법
KR20110036990A (ko) * 2009-10-05 2011-04-13 주식회사 엘지실트론 균일 산화막 형성 방법 및 세정 방법
JP5533624B2 (ja) * 2010-12-16 2014-06-25 信越半導体株式会社 半導体ウェーハの洗浄方法
JP2013251461A (ja) * 2012-06-01 2013-12-12 Shin Etsu Handotai Co Ltd 半導体ウェーハの洗浄方法
JP6347232B2 (ja) * 2015-06-18 2018-06-27 信越半導体株式会社 シリコンウェーハの洗浄方法

Also Published As

Publication number Publication date
WO2023090009A1 (ja) 2023-05-25
JP2023073560A (ja) 2023-05-26
KR20240095427A (ko) 2024-06-25
CN118251751A (zh) 2024-06-25

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