TW201921453A - 半導體裝置的製造方法 - Google Patents
半導體裝置的製造方法Info
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- TW201921453A TW201921453A TW107129370A TW107129370A TW201921453A TW 201921453 A TW201921453 A TW 201921453A TW 107129370 A TW107129370 A TW 107129370A TW 107129370 A TW107129370 A TW 107129370A TW 201921453 A TW201921453 A TW 201921453A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 83
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 23
- 239000002184 metal Substances 0.000 claims abstract description 68
- 229910052751 metal Inorganic materials 0.000 claims abstract description 68
- 239000000758 substrate Substances 0.000 claims abstract description 67
- 238000000034 method Methods 0.000 claims description 13
- 238000005452 bending Methods 0.000 claims 1
- 230000001678 irradiating effect Effects 0.000 claims 1
- 230000002950 deficient Effects 0.000 abstract description 3
- 235000012431 wafers Nutrition 0.000 description 12
- 238000010586 diagram Methods 0.000 description 4
- 238000005498 polishing Methods 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000002407 reforming Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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Abstract
本發明提供一種能夠抑制崩裂的產生或切斷不良地對背面形成有金屬的晶圓進行單片化的半導體裝置的製造方法。本發明包括:於半導體基板的背面形成金屬層的步驟;對金屬層進行刀片切割的步驟;以及對半導體基板進行隱形切割TM的步驟。
Description
本發明是有關於一種半導體裝置的製造方法,特別是有關於一種包括將於背面形成有金屬的晶圓進行單片化的步驟的半導體裝置的製造方法。
形成有功率元件等的晶圓中存在採取於其背面形成金屬(例如,Cu或Ag等)作為端子的結構者。
於藉由刀片切割(blade dicing)對所述結構的晶圓進行單片化的情況下,需要切斷半導體基板與金屬兩者。但是,切斷半導體基板與金屬的刀片或條件不同,例如若以針對金屬為對象的刀片及條件進行切割,則於半導體基板容易產生缺損或裂紋(以下,亦稱為「崩裂(chipping)」),若以針對半導體基板為對象的刀片及條件進行切割,則背面的金屬貼附於刀片而容易引起堵塞。經堵塞的刀片的切斷能力明顯下降,成為半導體基板的崩裂的原因。另外,若金屬的切斷能力低,則金屬無法順暢地被切斷而於背面側伸長,於之後的步驟中所述伸長的部分脫落,亦有時成為短路不良的原因。另外,於背面的金屬為延展性高的性質的金屬的情況下,亦有時金屬延伸而無法被切斷從而變得不良。
針對此種問題,先前提出一種如下的方法:沿道(street)預先去除背面的金屬,自半導體基板的表面沿道並利用刀片將半導體基板切斷而加以單片化(例如,參照專利文獻1、專利文獻2)。 [現有技術文獻] [專利文獻]
[專利文獻1]日本專利特開平4-056149號公報 [專利文獻2]日本專利特開平4-335550號公報
[發明所欲解決之課題]
近年來,於背面形成有金屬的結構的晶圓中,就元件的特性提高的要求而言,朝成為使半導體基板變得更薄、使金屬變得更厚的方向來降低電阻,關於目前的構成比,半導體基板/金屬的膜厚大致成為3/2~1/1這一比率。
因此,如專利文獻1或專利文獻2般沿道(street)預先去除背面的金屬的情況下,利用刀片切斷膜厚非常薄的半導體基板,因此多產生崩裂而良率下降,生產性降低。
因而,本發明的目的在於提供一種能夠抑制崩裂的產生或切斷不良而對背面形成有金屬的晶圓進行單片化的半導體裝置的製造方法。 [解決課題之手段]
本發明的半導體裝置的製造方法的特徵在於包括:於半導體基板的背面形成金屬層的步驟;對所述金屬層進行刀片切割的步驟;以及對所述半導體基板進行隱形切割(stealth dicing)TM
的步驟。 [發明的效果]
根據本發明,可使用針對金屬為對象的刀片及條件對金屬層進行切割,對半導體基板進行隱形切割TM
,藉此未產生崩裂,故能夠不使生產性低化地對晶圓進行單片化。
以下,參照圖式並對用以實施本發明的形態進行說明。
[第1實施形態] 圖1(a)~圖1(g)是表示本發明的第1實施形態的半導體裝置的製造方法的步驟剖面圖,特別是用以說明於半導體基板的背面形成金屬層並將其加以單片化的步驟的步驟剖面圖。
如圖1(a)所示,例如於形成有MOSFET等功率元件的半導體基板11的表面11t依序貼附支撐基板20及背面研磨帶21。
其次,進行背面研磨,如圖1(b)所示,於使半導體基板11的厚度變薄後,自支撐基板20剝離背面研磨帶21。
其次,沿於半導體基板11以格子狀設有多個的圖2所示的道11st,自半導體基板11的背面11b側照射雷射。藉此,如圖1(c)所示,於半導體基板11的內部形成有改質層(損傷(damage)層)12。
其次,如圖1(d)所示,藉由鍍敷而於半導體基板11的背面11b上形成金屬層13。
繼而,沿道11st(參照圖2),自金屬層的背面13b側利用刀片22對金屬層13進行切割。此時,半導體基板11不進行切割,因此使用針對金屬為對象的刀片及條件。藉此,如圖1(e)所示,金屬層13被分割為格子狀。
其次,於自半導體基板11剝離支撐基板20後,如圖1(f)所示,於金屬層13的背面貼附擴展膠帶(expandable tape)23。
最後,對擴展膠帶23進行擴展(擴張)。藉此,對半導體基板11施加外力,因此如圖1(g)所示,自半導體基板11的改質層12上下進行分斷,半導體基板11沿道11st而被分割為格子狀。
如以上般,可對在半導體基板11的背面形成有金屬層13的晶圓進行單片化。
根據本實施形態,可藉由隱形切割TM
(改質層12的形成及外力的施加)來對半導體基板11進行分割,並可藉由利用針對金屬為對象的刀片及條件的切割來對金屬層13進行分割,因此能夠抑制崩裂的產生或切斷不良來對晶圓進行單片化。
另外,如所述般,金屬層13的切斷是藉由自金屬層13的背面13b側的刀片切割來進行,因此可抑制金屬朝金屬層13的背面側的伸長的產生,亦可防止由伸長的部分的脫落而引起的不良的產生。
再者,本實施形態中,於形成金屬層13之前自半導體基板11的背面11b照射雷射來形成改質層12。相對於此,亦能夠於半導體基板11的背面形成金屬層13後,進行改質層12的形成。其中,通常於半導體基板11的表面11t側的道配置有標記(mark)或TEG等,因此於自半導體基板11的表面11t側進行雷射照射的情況下,標記或TEG等成為障礙,擔心對隱形切割TM
產生不良影響。因此,如本實施形態般,理想的是於形成金屬層13前自半導體基板11的背面11b側進行雷射照射。
圖3是表示圖1(g)的P部分的放大圖的一例的圖。另外,圖4是表示圖1(g)的P部分放大圖的另一例的圖。
於圖1(e)所示的步驟中,如圖3所示,利用刀片22形成的切口13c未到達半導體基板11,金屬層13薄薄地殘留於切口13c的底部,藉由圖1(g)所示的步驟中的擴展形成的外力,亦自改質層12上下進行分斷,薄薄地殘留的金屬層13亦被分斷,因此可對晶圓進行單片化。
另一方面,於圖1(e)所示的步驟中,如圖4所示,若利用刀片22形成的切口13c到達半導體基板11,則亦藉由擴展,自半導體基板11的切口13c的部分進行分斷,因此與切口13c為圖3所示的狀態的情況相比,可更確實地對晶圓進行單片化。因而,利用刀片22形成的切口13c理想的是到達半導體基板11。
其中,關於是否要使切口13c到達半導體基板11,較佳為對應於半導體基板11或金屬層13的厚度或其他條件等來適宜選擇。
[第2實施形態] 圖5是表示本發明的第2實施形態的半導體裝置的製造方法的步驟剖面圖。
關於本實施形態的半導體裝置的製造方法,至圖1(a)~圖1(g)所示的第1實施形態的半導體裝置的製造方法的圖1(d)所示的步驟為止相同,因此對相同的構成要素標註相同的符號,並適宜省略重複的說明。
於本實施形態中,如圖1(d)所示,於半導體基板11的背面11b上形成金屬層13後,如圖5所示,沿道11st(參照圖2),自金屬層13的背面13b側利用刀片22對金屬層13進行切割。此時,對半導體基板11以施加力的方式進行刀片切割,藉此根據對半導體基板11施加外力,自改質層12上下進行分斷,從而可對晶圓進行單片化。因而,根據本實施形態,不需要擴展膠帶,可使步驟簡化。再者,本實施形態對於半導體基板11的背面研磨後的厚度特別薄的情況而言有效。
[第3實施形態] 圖6(a)~圖6(c)是表示本發明的第3實施形態的半導體裝置的製造方法的步驟剖面圖。 關於本實施形態的半導體裝置的製造方法,至圖1(a)~圖1(g)所示的第1實施形態的半導體裝置的製造方法的圖1(d)所示的步驟為止相同,因此對相同的構成要素標註相同的符號,並適宜省略重複的說明。
於本實施形態中,如圖1(d)所示,於半導體基板11的背面11b上形成金屬層13後,如圖6(a)所示,將支撐基板20自半導體基板11的表面剝離。
其次,如圖6(b)所示,使金屬層13朝金屬層13的背面13b的方向彎曲,藉此對半導體基板11施加外力,半導體基板11沿改質層12而被分割為格子狀。
之後,如圖6(c)所示,自金屬層13的背面13b側利用刀片22對金屬層13進行切割。藉此,金屬層13亦被分割為格子狀,從而完成晶圓的單片化。
以上,對本發明的實施形態進行了說明,但本發明並不限定於所述實施形態,當然能夠於不脫離本發明的主旨的範圍內進行各種變更。
例如,於所述第1實施形態中,於對金屬層13進行刀片切割後,藉由擴展來對半導體基板11進行分割,但於金屬層13的延展性高的情況下,可先進行藉由擴展的半導體基板11的分割,之後對金屬層13進行刀片切割。
另外,所述實施形態中,於進行背面研磨時,示出了使用支撐基板20的例子,但亦可不使用支撐基板20。
11‧‧‧半導體基板
11b、13b‧‧‧背面
11st‧‧‧道
11t‧‧‧表面
12‧‧‧改質層(損傷層)
13‧‧‧金屬層
13c‧‧‧切口
20‧‧‧支撐基板
21‧‧‧背面研磨帶
22‧‧‧刀片
23‧‧‧擴展膠帶
圖1(a)~圖1(g)是表示本發明的第1實施形態的半導體裝置的製造方法的步驟剖面圖。 圖2是圖1(a)~圖1(g)所示的半導體基板的平面圖。 圖3是表示圖1(a)~圖1(g)的部分放大圖的一例的圖。 圖4是表示圖1(a)~圖1(g)的部分放大圖的另一例的圖。 圖5是表示本發明的第2實施形態的半導體裝置的製造方法的步驟剖面圖。 圖6(a)~圖6(c)是表示本發明的第3實施形態的半導體裝置的製造方法的步驟剖面圖。
Claims (6)
- 一種半導體裝置的製造方法,其特徵在於包括: 於半導體基板的背面形成金屬層的步驟; 對所述金屬層進行刀片切割的步驟;以及 對所述半導體基板進行隱形切割TM 的步驟。
- 一種半導體裝置的製造方法,其特徵在於包括: 沿半導體基板的道照射雷射而於所述半導體基板內部形成改質層的步驟; 於所述半導體基板的背面形成金屬層的步驟; 沿所述道並利用刀片來對所述金屬層進行切割的步驟;以及 對形成有所述改質層的半導體基板施加外力來對所述半導體基板進行切割的步驟。
- 如申請專利範圍第2項所述的半導體裝置的製造方法,其中所述金屬層的形成是於所述形成改質層的步驟之後進行, 自所述半導體基板的背面照射所述雷射。
- 如申請專利範圍第2項或第3項所述的半導體裝置的製造方法,其中所述外力是藉由將擴展膠帶貼附於經切割的所述金屬層的背面並對所述擴展膠帶進行擴張而施加。
- 如申請專利範圍第2項或第3項所述的半導體裝置的製造方法,其中所述外力是於對所述金屬層進行切割的步驟中利用所述刀片來施加。
- 如申請專利範圍第2項或第3項所述的半導體裝置的製造方法,其中所述外力是藉由使所述金屬層朝所述金屬層的背面方向彎曲來施加。
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JPH0456149A (ja) | 1990-06-21 | 1992-02-24 | Sharp Corp | 半導体基板 |
JPH04335550A (ja) | 1991-05-13 | 1992-11-24 | Sumitomo Electric Ind Ltd | 半導体装置の製造方法 |
JP2763441B2 (ja) * | 1992-02-06 | 1998-06-11 | 三菱電機株式会社 | 半導体装置の製造方法 |
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