TW201841323A - 導線框及其製造方法 - Google Patents

導線框及其製造方法 Download PDF

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Publication number
TW201841323A
TW201841323A TW107100604A TW107100604A TW201841323A TW 201841323 A TW201841323 A TW 201841323A TW 107100604 A TW107100604 A TW 107100604A TW 107100604 A TW107100604 A TW 107100604A TW 201841323 A TW201841323 A TW 201841323A
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TW
Taiwan
Prior art keywords
lead frame
etching
shape
recessed portion
plating layer
Prior art date
Application number
TW107100604A
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English (en)
Chinese (zh)
Inventor
山口柾樹
Original Assignee
日商大口電材股份有限公司
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Application filed by 日商大口電材股份有限公司 filed Critical 日商大口電材股份有限公司
Publication of TW201841323A publication Critical patent/TW201841323A/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4828—Etching
    • H—ELECTRICITY
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4828—Etching
    • H01L21/4832—Etching a temporary substrate after encapsulation process to form leads
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582—Metallic layers on lead frames
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    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/732—Location after the connecting process
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    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
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    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92—Specific sequence of method steps

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Lead Frames For Integrated Circuits (AREA)
TW107100604A 2017-01-17 2018-01-08 導線框及其製造方法 TW201841323A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2017006178A JP6828959B2 (ja) 2017-01-17 2017-01-17 リードフレームおよびその製造方法
JP2017-006178 2017-01-17

Publications (1)

Publication Number Publication Date
TW201841323A true TW201841323A (zh) 2018-11-16

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TW107100604A TW201841323A (zh) 2017-01-17 2018-01-08 導線框及其製造方法

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US (1) US10622286B2 (enExample)
JP (1) JP6828959B2 (enExample)
CN (1) CN108461469A (enExample)
TW (1) TW201841323A (enExample)

Cited By (1)

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TWI831944B (zh) * 2019-03-22 2024-02-11 長華科技股份有限公司 導線架

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EP3879569A1 (en) * 2020-03-11 2021-09-15 Nexperia B.V. A leadless semiconductor package and method of manufacture
JP7617812B2 (ja) * 2021-05-24 2025-01-20 新光電気工業株式会社 リードフレーム、半導体装置及びリードフレームの製造方法
JP7677579B2 (ja) * 2021-12-22 2025-05-15 新光電気工業株式会社 リードフレーム、リードフレームの製造方法及び半導体装置の製造方法

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US20040080025A1 (en) * 2002-09-17 2004-04-29 Shinko Electric Industries Co., Ltd. Lead frame, method of manufacturing the same, and semiconductor device manufactured with the same
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JP5195647B2 (ja) * 2009-06-01 2013-05-08 セイコーエプソン株式会社 リードフレームの製造方法及び半導体装置の製造方法
JP5626785B2 (ja) 2010-09-27 2014-11-19 Ｓｈマテリアル株式会社 半導体素子搭載用リードフレームおよびその製造方法
JP2012146782A (ja) 2011-01-11 2012-08-02 Sumitomo Metal Mining Co Ltd 半導体素子搭載用リードフレームの製造方法
JP2017103365A (ja) * 2015-12-02 2017-06-08 新光電気工業株式会社 リードフレーム及び電子部品装置とそれらの製造方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI831944B (zh) * 2019-03-22 2024-02-11 長華科技股份有限公司 導線架

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US20180204787A1 (en) 2018-07-19
JP6828959B2 (ja) 2021-02-10
CN108461469A (zh) 2018-08-28
US10622286B2 (en) 2020-04-14
JP2018117020A (ja) 2018-07-26

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