TW201524280A - Surface-treated copper foil, lamination board, printed circuit board, electronic machine, copper foil with carrier, and manufacturing method of printed circuit board - Google Patents

Surface-treated copper foil, lamination board, printed circuit board, electronic machine, copper foil with carrier, and manufacturing method of printed circuit board Download PDF

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TW201524280A
TW201524280A TW103138688A TW103138688A TW201524280A TW 201524280 A TW201524280 A TW 201524280A TW 103138688 A TW103138688 A TW 103138688A TW 103138688 A TW103138688 A TW 103138688A TW 201524280 A TW201524280 A TW 201524280A
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copper foil
carrier
treated
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TW103138688A
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TWI619409B (en
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Terumasa Moriyama
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Jx Nippon Mining & Metals Corp
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00Layered products comprising a layer of metal
    • B32B15/04Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material
    • B32B15/08Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material of synthetic resin
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00Layered products comprising a layer of metal
    • B32B15/20Layered products comprising a layer of metal comprising aluminium or copper
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B33/00Layered products characterised by particular properties or particular surface features, e.g. particular surface coatings; Layered products designed for particular purposes not covered by another single class
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Laminated Bodies (AREA)

Abstract

The present invention provides a surface-treated copper foil to suppress the transmission loss well even if it is applied in a high-frequency circuit board. The surface-treated copper foil has a surface-treated layer on at least a surface. The total adhesion quantity of Co, Ni, Fe is less than 1000 [mu]g/dm 2. The surface-treated layer has a Zn metal layer or the alloy-treated layer containing Zn. The ratio of three-dimensional surface area to the two-dimensional surface area of the surface of surface-treated layer measured by a laser microscope is 1.0~1.9, and the surface roughness Rz JIS of at least a surface is less than 2.2 [mu]m.

Description

表面處理銅箔、積層板、印刷配線板、電子機器、附載體銅箔及印刷配線板之製造方法 Surface treatment copper foil, laminated board, printed wiring board, electronic device, copper foil with carrier, and printed wiring board manufacturing method

本發明係關於一種表面處理銅箔、積層板、印刷配線板、電子機器、附載體銅箔、及印刷配線板之製造方法,尤其是關於一種適合高頻電路基板用途之表面處理銅箔、積層板、印刷配線板、電子機器、附載體銅箔、及印刷配線板之製造方法。 The present invention relates to a surface-treated copper foil, a laminated board, a printed wiring board, an electronic device, a copper foil with a carrier, and a method of manufacturing a printed wiring board, and more particularly to a surface-treated copper foil and a laminate suitable for use in a high-frequency circuit substrate. A method of manufacturing a board, a printed wiring board, an electronic device, a copper foil with a carrier, and a printed wiring board.

關於印刷配線板,此半個世紀以來取得了很大的進展,如今幾乎已被使用於所有的電子機器。隨著近年來電子機器之小型化、高性能化的需求增大,搭載零件之高密度構裝化及訊號之高頻化亦不斷發展,對印刷配線板要求優異之高頻對應。 With regard to printed wiring boards, great progress has been made in this half century, and today it has been used in almost all electronic machines. In recent years, the demand for miniaturization and high performance of electronic devices has increased, and high-density mounting of components and high-frequency signals have been developed, and high-frequency correspondence is required for printed wiring boards.

對於高頻用基板而言,為了確保輸出訊號之品質,而要求減少傳輸損耗。傳輸損耗主要是起因於樹脂(基板側)之介電質損耗與起因於導體(銅箔側)之導體損耗。關於介電質損耗,樹脂之介電常數及介電損耗正切變得越小,該介電質損耗越減少。於高頻訊號中,導體損耗之主要原因在於:頻率變得越高,由於電流僅於導體表面流動之集膚效應,電流流經之剖面積越減少,電阻變得越高。 For the high-frequency substrate, in order to ensure the quality of the output signal, it is required to reduce the transmission loss. The transmission loss is mainly caused by the dielectric loss of the resin (substrate side) and the conductor loss due to the conductor (copper foil side). Regarding the dielectric loss, the dielectric constant and dielectric loss tangent of the resin become smaller, and the dielectric loss is reduced. In high-frequency signals, the main cause of conductor loss is that the higher the frequency becomes, the higher the cross-sectional area of the current flowing through the skin effect due to the current flowing only on the surface of the conductor, the higher the resistance becomes.

作為減少高頻用銅箔之傳輸損耗的技術,例如於專利文獻1 中揭示有一種高頻電路用金屬箔,係於金屬箔表面之單面或兩面被覆銀或銀合金,於該銀或銀合金被覆層上,設置厚度小於上述銀或銀合金被覆層之銀或銀合金以外的被覆層。而且,記載有:藉此,可提供一種即便於如衛星通訊所使用之超高頻區域中亦可減少因集膚效應造成之損耗的金屬箔。 As a technique for reducing the transmission loss of a high-frequency copper foil, for example, Patent Document 1 A metal foil for high-frequency circuit is disclosed, which is coated with silver or a silver alloy on one or both sides of a surface of a metal foil, and a silver or silver alloy coating layer is provided on the silver or silver alloy coating layer to have a thickness smaller than that of the silver or silver alloy coating layer. A coating layer other than a silver alloy. Further, it is described that it is possible to provide a metal foil which can reduce the loss due to the skin effect even in an ultra-high frequency region used for satellite communication.

又,於專利文獻2中,揭示有一種高頻電路用粗化處理壓延 銅箔,其特徵在於:為印刷電路基板用素材,且壓延銅箔之再結晶退火後之壓延面藉由X射線繞射求出之(200)面的積分強度(I(200))相對於細粉末銅藉由X射線繞射求出之(200)面的積分強度(I0(200)),為I(200)/I0(200)>40,對該壓延面進行利用電鍍之粗化處理後的粗化處理面之算術平均粗糙度(以下,稱為Ra)為0.02μm~0.2μm,十點平均粗糙度(以下,稱為Rz)為0.1μm~1.5μm。而且,記載有:藉此,可提供一種可於超過1GHz之高頻率下使用的印刷電路板。 Further, Patent Document 2 discloses a rolled copper foil for roughening a high-frequency circuit, which is characterized in that it is a material for a printed circuit board, and a rolling surface after recrystallization annealing of the rolled copper foil is surrounded by X-rays. The integrated intensity (I(200)) of the (200) plane obtained by the shot is the integrated intensity (I 0 (200)) of the (200) plane obtained by X-ray diffraction of the fine powder copper, which is I (200). /I 0 (200)>40, the arithmetic mean roughness (hereinafter referred to as Ra) of the roughened surface after the roughening treatment by the plating on the rolled surface is 0.02 μm to 0.2 μm, and the ten-point average roughness The degree (hereinafter referred to as Rz) is 0.1 μm to 1.5 μm. Further, it is described that a printed circuit board which can be used at a high frequency exceeding 1 GHz can be provided.

進而,於專利文獻3中揭示有一種電解銅箔,其特徵在於:銅箔表面之一部分係由塊狀突起構成之表面粗糙度為2~4μm的凹凸面。而且,記載有:藉此,可提供一種高頻傳輸特性優異之電解銅箔。 Further, Patent Document 3 discloses an electrolytic copper foil characterized in that one of the surfaces of the copper foil is an uneven surface having a surface roughness of 2 to 4 μm. Further, it is described that an electrolytic copper foil excellent in high-frequency transmission characteristics can be provided.

[專利文獻1]日本專利第4161304號公報 [Patent Document 1] Japanese Patent No. 4161304

[專利文獻2]日本專利第4704025號公報 [Patent Document 2] Japanese Patent No. 4704025

[專利文獻3]日本特開2004-244656號公報 [Patent Document 3] Japanese Laid-Open Patent Publication No. 2004-244656

起因於導體(銅箔側)之導體損耗,如上述般係因集膚效應 使得電阻變大,關於該電阻,已知不僅有銅箔本身之電阻的影響,亦有於銅箔表面由為了確保與樹脂基板之接著性而進行之粗化處理所形成之表面處理層之電阻的影響,具體而言,銅箔表面之粗糙度為導體損耗之主要原因,粗糙度越小,傳輸損耗越減少。 The conductor loss due to the conductor (copper foil side), as described above, is due to the skin effect In the resistance, it is known that not only the influence of the electric resistance of the copper foil itself but also the surface treatment layer formed on the surface of the copper foil by the roughening treatment for ensuring adhesion to the resin substrate is known. The influence, in particular, the roughness of the surface of the copper foil is the main cause of the conductor loss, and the smaller the roughness, the smaller the transmission loss.

又,於進行粗化處理作為銅箔之表面處理的情形時,通常使 用Cu-Ni合金處理或Cu-Co-Ni合金處理,而進行耐熱處理及防銹處理的情形時,則通常使用Ni-Zn合金處理或Co-Ni合金處理。 Further, when the roughening treatment is performed as the surface treatment of the copper foil, it is usually When a Cu-Ni alloy treatment or a Cu-Co-Ni alloy treatment is used, and in the case of heat treatment and rust prevention treatment, Ni-Zn alloy treatment or Co-Ni alloy treatment is usually used.

然而,於上述粗化處理、耐熱處理及防銹處理中通常使用之 Co、Ni以及Fe係於常溫顯示出強磁性之金屬,於作為成分而含有於表面處理層中之情形時,會產生如下問題:因磁性之影響,導體內之電流分佈以及磁場分佈會受到影響,銅箔之傳輸特性變差。 However, it is usually used in the above roughening treatment, heat treatment, and rust prevention treatment. Co, Ni, and Fe are metals which exhibit strong magnetism at normal temperature, and when they are contained as a component in the surface treatment layer, there are problems in that the current distribution and the magnetic field distribution in the conductor are affected by the influence of magnetism. The transmission characteristics of the copper foil deteriorate.

本發明之目的在於提供一種即便用於高頻電路基板,傳輸損 耗亦獲得良好抑制之表面處理銅箔、積層板、印刷配線板、電子機器、附載體銅箔、及印刷配線板之製造方法。 It is an object of the present invention to provide a transmission loss even when used in a high frequency circuit substrate. A surface-treated copper foil, a laminated board, a printed wiring board, an electronic device, a copper foil with a carrier, and a method of manufacturing a printed wiring board which are also excellently consumed.

本發明人發現,為了抑制強磁性金屬對傳輸特性之影響,可 藉由將銅箔之表面處理層中的Co、Ni、Fe合計附著量控制為既定量以下,且含有於常溫不顯示出強磁性之Zn作為替代成分,而進一步減少高頻傳輸損耗。進而發現,除了先前之對高頻用銅箔所控管之表面粗糙度Rz明顯影響傳輸損耗外,更準確地表示與樹脂(介電質)之接觸面積的三維表面積相對於二維表面積之比亦會對傳輸損耗造成顯著的影響。 The inventors have found that in order to suppress the influence of the ferromagnetic metal on the transmission characteristics, By controlling the total amount of adhesion of Co, Ni, and Fe in the surface treatment layer of the copper foil to be equal to or less than the predetermined amount, and containing Zn which does not exhibit ferromagnetism at normal temperature as a substitute component, the high-frequency transmission loss is further reduced. Further, it was found that, besides the surface roughness Rz of the tube controlled by the high-frequency copper foil significantly affecting the transmission loss, the ratio of the three-dimensional surface area to the two-dimensional surface area of the contact area with the resin (dielectric) is more accurately expressed. It also has a significant impact on transmission loss.

基於上述見解而完成之本發明於一態樣中,係一種表面處理 銅箔,於至少一表面形成有表面處理層,上述表面處理層中之Co、Ni、Fe的合計附著量為1000μg/dm2以下,上述表面處理層具有Zn金屬層或含有Zn之合金處理層,上述表面處理層表面利用雷射顯微鏡所測得之三維表面積相對於二維表面積的比為1.0~1.9,至少一表面之表面粗糙度Rz JIS為2.2μm以下。 The present invention, which is completed based on the above findings, is a surface-treated copper foil having a surface treatment layer formed on at least one surface thereof, and a total adhesion amount of Co, Ni, and Fe in the surface treatment layer is 1000 μg/dm. 2 , the surface treatment layer has a Zn metal layer or an alloy treatment layer containing Zn, and the surface of the surface treatment layer has a ratio of a three-dimensional surface area to a two-dimensional surface area measured by a laser microscope of 1.0 to 1.9, at least one surface The surface roughness Rz JIS is 2.2 μm or less.

本發明之表面處理銅箔於一實施形態中,上述表面處理層中之Co、Ni、Fe合計附著量為500μg/dm2以下。 In one embodiment, the surface-treated copper foil of the present invention has a total adhesion amount of Co, Ni, and Fe in the surface-treated layer of 500 μg/dm 2 or less.

本發明之表面處理銅箔於另一實施形態中,上述表面處理層中之Co、Ni、Fe合計附著量為300μg/dm2以下。 In another embodiment, the surface-treated copper foil of the present invention has a total adhesion amount of Co, Ni, and Fe in the surface-treated layer of 300 μg/dm 2 or less.

本發明之表面處理銅箔於再另一實施形態中,上述表面處理層中之Co、Ni、Fe合計附著量為0μg/dm2In still another embodiment of the surface-treated copper foil of the present invention, the total amount of adhesion of Co, Ni, and Fe in the surface-treated layer is 0 μg/dm 2 .

本發明之表面處理銅箔於再另一實施形態中,兩表面之表面粗糙度Rz JIS為2.2μm以下。 In still another embodiment of the surface-treated copper foil of the present invention, the surface roughness Rz JIS of both surfaces is 2.2 μm or less.

本發明之表面處理銅箔於再另一實施形態中,上述表面處理層包含粗化處理層。 In still another embodiment of the surface treated copper foil of the present invention, the surface treated layer comprises a roughened layer.

本發明之表面處理銅箔於再另一實施形態中,上述粗化處理層中之Cu附著量為0.10g/dm2以下。 In still another embodiment of the surface-treated copper foil of the present invention, the amount of Cu deposited in the roughened layer is 0.10 g/dm 2 or less.

本發明之表面處理銅箔於再另一實施形態中,於上述表面處理層中,於上述粗化處理層上設置有上述Zn金屬層或含有Zn之合金處理層。 In still another embodiment of the surface-treated copper foil of the present invention, in the surface-treated layer, the Zn metal layer or the alloy-containing layer containing Zn is provided on the roughened layer.

本發明之表面處理銅箔於再另一實施形態中,上述含有Zn 之合金處理層為Cu-Zn合金層。 In still another embodiment of the surface treated copper foil of the present invention, the above-mentioned Zn is contained The alloy treatment layer is a Cu-Zn alloy layer.

本發明之表面處理銅箔於再另一實施形態中,上述表面處理 層中之Zn附著量為5mg/dm2以下。 In still another embodiment of the surface-treated copper foil of the present invention, the amount of Zn deposited in the surface-treated layer is 5 mg/dm 2 or less.

本發明之表面處理銅箔於再另一實施形態中,於上述表面處 理層中,於上述Zn金屬層或含有Zn之合金處理層上設置有鉻酸處理(chromate treatment)層。 In still another embodiment, the surface treated copper foil of the present invention is at the surface In the layer, a chromate treatment layer is provided on the Zn metal layer or the Zn-containing alloy treatment layer.

本發明之表面處理銅箔於再另一實施形態中,於上述鉻酸處 理層上設置有矽烷偶合處理層。 In still another embodiment, the surface treated copper foil of the present invention is at the above chromic acid A decane coupling treatment layer is disposed on the layer.

本發明之表面處理銅箔於再另一實施方式中,上述表面處理 層中之Cu、Zn、Co、Ni、Fe合計附著量為0.10g/dm2以下。 In still another embodiment, the surface-treated copper foil of the present invention has a total adhesion amount of Cu, Zn, Co, Ni, and Fe in the surface-treated layer of 0.10 g/dm 2 or less.

本發明之表面處理銅箔於再另一實施形態中,係用於軟性印 刷配線板。 In still another embodiment, the surface treated copper foil of the present invention is used for soft printing Brush the wiring board.

本發明之表面處理銅箔於再另一實施形態中,係用於5GHz 以上之高頻電路基板。 In still another embodiment, the surface-treated copper foil of the present invention is used for 5 GHz. The above high frequency circuit substrate.

本發明於另一態樣中,係一種將本發明之表面處理銅箔與樹 脂基板加以積層而製得之積層板。 In another aspect, the present invention is a surface treated copper foil and tree of the present invention A laminated board obtained by laminating a grease substrate.

本發明於再另一態樣中,係一種以本發明之積層板作為材料 之印刷配線板。 In still another aspect of the present invention, a laminate of the present invention is used as a material Printed wiring board.

本發明於再另一態樣中,係一種使用本發明之印刷配線板之 電子機器。 In still another aspect, the present invention is a printed wiring board using the present invention. Electronic machine.

本發明於再另一態樣中,係一種附載體銅箔,於載體之一面 或兩面依序具有中間層、極薄銅層,上述極薄銅層為本發明之表面處理銅 箔。 In still another aspect of the present invention, a copper foil with a carrier is provided on one side of the carrier Or two sides sequentially have an intermediate layer, an extremely thin copper layer, and the above ultra-thin copper layer is the surface-treated copper of the present invention Foil.

本發明之附載體銅箔於一實施形態中,於上述載體之一面依序具有上述中間層、上述極薄銅層,於上述載體之另一面具有粗化處理層。 In one embodiment, the copper foil with a carrier of the present invention has the intermediate layer and the ultra-thin copper layer sequentially on one side of the carrier, and has a roughened layer on the other surface of the carrier.

本發明於再另一態樣中,係一種將本發明之附載體銅箔與樹脂基板加以積層而製得之積層板。 In still another aspect of the invention, there is provided a laminate obtained by laminating a copper foil with a carrier of the invention and a resin substrate.

本發明於再另一態樣中,係一種印刷配線板之製造方法,包括如下步驟:準備本發明之附載體銅箔與絕緣基板之步驟;將上述附載體銅箔與絕緣基板積層之步驟;將上述附載體銅箔與絕緣基板積層後,經過將上述附載體銅箔之載體剝離之步驟而形成覆金屬積層板,然後,藉由半加成法(semi-additive process)、減成法(subtractive process)、部分加成法(partly additive process)或改良半加成法(modified semi-additive process)中之任一種方法而形成電路之步驟。 In still another aspect, the invention provides a method for manufacturing a printed wiring board, comprising the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; and stacking the copper foil with the carrier and the insulating substrate; After laminating the carrier-attached copper foil and the insulating substrate, a metal-clad laminate is formed by peeling off the carrier of the carrier-attached copper foil, and then subjected to a semi-additive process or a subtractive method ( A step of forming a circuit by any one of a subtractive process, a partially additive process, or a modified semi-additive process.

本發明於再另一態樣中,係一種印刷配線板之製造方法,包括如下步驟:於本發明之附載體銅箔的上述極薄銅層側表面或上述載體側表面形成電路之步驟;以掩埋上述電路之方式,於上述附載體銅箔之上述極薄銅層側表面或上述載體側表面形成樹脂層之步驟;於上述樹脂層上形成電路之步驟;於上述樹脂層上形成電路後,將上述載體或上述極薄銅層剝離之步 驟;及將上述載體或上述極薄銅層剝離後,將上述極薄銅層或上述載體去除,藉此使形成於上述極薄銅層側表面或上述載體側表面被上述樹脂層掩埋之電路露出之步驟。 In still another aspect of the invention, a method of manufacturing a printed wiring board, comprising the steps of: forming a circuit on the side surface of the ultra-thin copper layer of the copper foil with carrier of the present invention or the side surface of the carrier; a step of forming a resin layer on the surface of the ultra-thin copper layer side surface or the carrier side surface of the copper foil with a carrier; a step of forming a circuit on the resin layer; and forming a circuit on the resin layer, Stepping off the above carrier or the above ultra-thin copper layer And after removing the carrier or the ultra-thin copper layer, removing the ultra-thin copper layer or the carrier, thereby forming a circuit formed on the side surface of the ultra-thin copper layer or the carrier-side surface by the resin layer The steps that are exposed.

根據本發明,可提供一種即便用於高頻電路基板,傳輸損耗亦獲得良好抑制之表面處理銅箔、積層板、印刷配線板、電子機器、附載體銅箔、及印刷配線板之製造方法。 According to the present invention, it is possible to provide a method for producing a surface-treated copper foil, a laminate, a printed wiring board, an electronic device, a copper foil with a carrier, and a printed wiring board which are excellent in transmission loss even when used for a high-frequency circuit substrate.

圖1係表示實施例及比較例之Co、Ni、Fe合計附著量與表面粗糙度Rz之關係的圖表。 Fig. 1 is a graph showing the relationship between the total amount of adhesion of Co, Ni, and Fe and the surface roughness Rz in the examples and comparative examples.

圖2係表示實施例及比較例之Co、Ni、Fe合計附著量與三維表面積相對於二維表面積之比之關係的圖表。 Fig. 2 is a graph showing the relationship between the total amount of adhesion of Co, Ni, and Fe and the ratio of the three-dimensional surface area to the two-dimensional surface area in the examples and the comparative examples.

圖3係表示實施例及比較例之Co、Ni、Fe、Cu、Zn合計附著量與傳輸損耗之關係的圖表。 3 is a graph showing the relationship between the total adhesion amount of Co, Ni, Fe, Cu, and Zn and the transmission loss in the examples and comparative examples.

(銅箔基材) (copper foil substrate)

可用於本發明之銅箔基材的形態並無特別限制,典型而言,可以壓延銅箔或電解銅箔之形態使用。一般而言,電解銅箔係使銅自硫酸銅鍍浴電解析出至鈦或不鏽鋼之轉筒上而製造,壓延銅箔則是反覆進行利用壓延輥之塑性加工與熱處理而製造。於要求可撓性之用途中,大多應用壓延銅箔。 The form of the copper foil substrate which can be used in the present invention is not particularly limited, and is typically used in the form of a rolled copper foil or an electrolytic copper foil. In general, an electrolytic copper foil is produced by electrically analyzing copper from a copper sulfate plating bath onto a drum of titanium or stainless steel, and the rolled copper foil is produced by repeatedly performing plastic working and heat treatment by a calender roll. In applications requiring flexibility, rolled copper foil is often used.

作為銅箔基材之材料,除通常用作印刷配線板之導體圖案的精銅或無氧銅等高純度之銅以外,例如亦可使用摻Sn之銅、摻Ag之銅、添加有Cr、Zr或Mg等之銅合金、添加有Ni及Si等之卡遜(corson)系銅合金之類的銅合金。再者,於本說明書中單獨使用「銅箔」之用語時,亦包括銅合金箔。於使用銅合金箔作為高頻電路基板用之銅箔的情形時,亦可為與銅相比電阻率不明顯上升者。 As a material of the copper foil substrate, in addition to high-purity copper such as refined copper or oxygen-free copper which is generally used as a conductor pattern of a printed wiring board, for example, Sn-doped copper, Ag-doped copper, Cr added, or the like may be used. A copper alloy such as Zr or Mg, or a copper alloy such as a corson-based copper alloy such as Ni or Si. In addition, when the term "copper foil" is used alone in this specification, a copper alloy foil is also included. When a copper alloy foil is used as the copper foil for a high-frequency circuit substrate, the resistivity may not be significantly increased as compared with copper.

再者,銅箔基材之板厚無需特別限定,例如為1~300μm、或者3~100μm、或者5μm~70μm、或者6μm~35μm、或者9μm~18μm。 Further, the thickness of the copper foil substrate is not particularly limited, and is, for example, 1 to 300 μm, or 3 to 100 μm, or 5 μm to 70 μm, or 6 μm to 35 μm, or 9 μm to 18 μm.

(表面處理層) (surface treatment layer)

於銅箔基材之表面,較佳形成有基於選自粗化處理層、防銹層、耐熱層、矽烷偶合處理層中之一種以上之層的表面處理層。本發明之表面處理層可如上述般形成於與樹脂之接著面(M面),亦可形成於與接著面(M面)相反側之面(S面),亦可形成於兩面。 On the surface of the copper foil substrate, a surface treatment layer based on one or more layers selected from the group consisting of a roughening treatment layer, a rustproof layer, a heat resistant layer, and a decane coupling treatment layer is preferably formed. The surface treatment layer of the present invention may be formed on the surface (M surface) opposite to the resin as described above, or may be formed on the surface (S surface) opposite to the surface (M surface), or may be formed on both surfaces.

粗化處理例如可藉由以銅或銅合金形成粗化粒子來進行。粗化處理可為微細者。又,亦可於粗化處理後,進行覆蓋鍍敷處理。藉由該等粗化處理、防銹處理、耐熱處理、矽烷處理、於處理液中之浸漬處理或鍍敷處理所形成之表面處理層,亦可含有選自由Cu、Ni、Fe、Co、Zn、Cr、Mo、W、P、As、Ag、Sn、Ge組成之群中之任一種單質或任一種以上之合金,或者有機物。 The roughening treatment can be performed, for example, by forming roughened particles with copper or a copper alloy. The roughening process can be fine. Further, after the roughening treatment, a cover plating treatment may be performed. The surface treatment layer formed by the roughening treatment, the rustproof treatment, the heat treatment, the decane treatment, the immersion treatment in the treatment liquid, or the plating treatment may also contain a material selected from the group consisting of Cu, Ni, Fe, Co, and Zn. Any one of a group consisting of Cr, Mo, W, P, As, Ag, Sn, and Ge, or an alloy of any one or more, or an organic substance.

為了抑制強磁性金屬對傳輸特性之影響,而將銅箔之表面處 理層中之Co、Ni、Fe合計附著量如下述般控制為既定量以下,且含有在常溫不顯示出強磁性之Zn作為替代成分,藉此可進一步減少高頻傳輸損耗。 因此,表面處理層具有Zn金屬層或含有Zn之合金處理層。又,含有Zn之合金處理層亦可為Cu-Zn合金層。藉由設為Cu-Zn合金層,相較於設為Zn單獨之金屬層,可提高耐熱性與耐化學品性。 In order to suppress the influence of the ferromagnetic metal on the transmission characteristics, the surface of the copper foil is The total amount of adhesion of Co, Ni, and Fe in the layer is controlled to be less than or equal to the following, and contains Zn which does not exhibit ferromagnetism at normal temperature as a substitute component, whereby the high-frequency transmission loss can be further reduced. Therefore, the surface treatment layer has a Zn metal layer or an alloy treatment layer containing Zn. Further, the alloy-treated layer containing Zn may be a Cu-Zn alloy layer. By setting it as a Cu-Zn alloy layer, heat resistance and chemical resistance can be improved compared with the metal layer which is Zn alone.

當表面處理層係使用粗化處理層、防銹層、耐熱層、矽烷偶 合處理層中之任一種而形成的情形時,該等層之順序並無特別限定,例如亦可於銅箔表面形成粗化處理層,於該粗化處理層上設置Zn金屬層或含有Zn之合金處理層作為防銹、耐熱層。又,亦可於Zn金屬層或含有Zn之合金處理層上設置鉻酸處理層。進而,亦可於鉻酸處理層上設置矽烷偶合處理層。 When the surface treatment layer is a roughened layer, a rustproof layer, a heat-resistant layer, a decane couple In the case where any one of the layers is formed, the order of the layers is not particularly limited. For example, a roughened layer may be formed on the surface of the copper foil, and a Zn metal layer or Zn may be provided on the roughened layer. The alloy treatment layer serves as a rust-proof and heat-resistant layer. Further, a chromic acid treatment layer may be provided on the Zn metal layer or the alloy treatment layer containing Zn. Further, a decane coupling treatment layer may be provided on the chromic acid treatment layer.

(金屬附著量) (metal adhesion)

本發明之表面處理銅箔,於表面處理層中,Co、Ni、Fe之合計附著量被控制為1000μg/dm2以下。本發明之表面處理銅箔,如上述般對成為傳輸損耗之原因的磁導率相對較高且導電率相對較低之Co、Ni、Fe附著量加以控制,因此可減少高頻傳輸損耗。表面處理層中之Co、Ni、Fe合計附著量較佳為500μg/dm2以下,更佳為300μg/dm2以下,再更佳為0μg/dm2(表示分析之定量下限值以下)。 In the surface-treated copper foil of the present invention, the total adhesion amount of Co, Ni, and Fe in the surface treatment layer is controlled to be 1000 μg/dm 2 or less. As described above, the surface-treated copper foil of the present invention controls the adhesion amount of Co, Ni, and Fe which is relatively high in magnetic permeability due to transmission loss and relatively low in electrical conductivity, so that high-frequency transmission loss can be reduced. The total adhesion amount of Co, Ni, and Fe in the surface treatment layer is preferably 500 μg/dm 2 or less, more preferably 300 μg/dm 2 or less, still more preferably 0 μg/dm 2 (indicating the quantitative lower limit value of the analysis or less).

於表面處理層包含粗化處理層之情形時,該粗化處理層中之 Cu附著量較佳為0.10g/dm2以下。根據此種構成,可進一步減少高頻傳輸損耗。粗化處理層中之Cu附著量更佳為0.09g/dm2以下,再更佳為0.08g/dm2以下,典型為0.04~0.08g/dm2When the surface treatment layer contains a roughened layer, the amount of Cu deposited in the roughened layer is preferably 0.10 g/dm 2 or less. According to this configuration, the high frequency transmission loss can be further reduced. The amount of Cu deposited in the roughened layer is more preferably 0.09 g/dm 2 or less, still more preferably 0.08 g/dm 2 or less, and typically 0.04 to 0.08 g/dm 2 .

表面處理層中之Zn附著量較佳為5mg/dm2以下。根據此種構成,耐化學品性會獲得提升,耐熱性變良好。表面處理層中之Zn附著 量更佳為4.5mg/dm2以下,再更佳為4mg/dm2以下,典型為0.1~4.5mg/dm2The amount of Zn deposited in the surface treated layer is preferably 5 mg/dm 2 or less. According to this configuration, the chemical resistance is improved and the heat resistance is improved. The amount of Zn deposited in the surface treatment layer is more preferably 4.5 mg/dm 2 or less, still more preferably 4 mg/dm 2 or less, and typically 0.1 to 4.5 mg/dm 2 .

表面處理層中之Cu、Zn、Co、Ni、Fe合計附著量,較佳為 0.10g/dm2以下。根據此種構成,可進一步減少高頻傳輸損耗。表面處理層中之Cu、Zn、Co、Ni、Fe合計附著量更佳為0.09g/dm2以下,再更佳為0.08g/dm2以下,典型為0.04~0.08g/dm2The total adhesion amount of Cu, Zn, Co, Ni, and Fe in the surface treatment layer is preferably 0.10 g/dm 2 or less. According to this configuration, the high frequency transmission loss can be further reduced. The total adhesion amount of Cu, Zn, Co, Ni, and Fe in the surface treatment layer is more preferably 0.09 g/dm 2 or less, still more preferably 0.08 g/dm 2 or less, and typically 0.04 to 0.08 g/dm 2 .

(表面粗糙度Rz) (surface roughness Rz)

銅箔表面之粗糙度係導體損耗之主要原因,粗糙度越小,傳輸損耗越減少。就此種觀點而言,本發明之表面處理銅箔可將至少一表面之表面粗糙度Rz JIS控制為2.2μm以下,而可良好地減少傳輸損耗。又,較佳為兩表面之表面粗糙度Rz JIS在2.2μm以下。根據此種構成,可進一步減少高頻傳輸損耗。 The roughness of the surface of the copper foil is the main cause of the loss of the conductor, and the smaller the roughness, the smaller the transmission loss. From this point of view, the surface-treated copper foil of the present invention can control the surface roughness Rz JIS of at least one surface to 2.2 μm or less, and the transmission loss can be favorably reduced. Further, it is preferable that the surface roughness Rz JIS of both surfaces is 2.2 μm or less. According to this configuration, the high frequency transmission loss can be further reduced.

表面粗糙度Rz JIS更佳為1.5μm以下,再更佳為1.2μm以下,典型為0.5~2.2μm。 The surface roughness Rz JIS is more preferably 1.5 μm or less, still more preferably 1.2 μm or less, and typically 0.5 to 2.2 μm.

(表面積比) (surface area ratio)

除了先前之對於高頻用銅箔所控管之表面粗糙度Rz外,亦必須將更準確地表示與影響高頻傳輸損耗之樹脂(介電質)之接觸面積的三維表面積相對於二維表面積之比控制在適當範圍。就此種觀點而言,本發明之表面處理銅箔,表面處理層表面利用雷射顯微鏡所測得之三維表面積相對於二維表面積之比被控制為1.0~1.9,從而即便用於高頻電路基板,傳輸損耗亦可更良好地獲得抑制。該表面積比於定義上無法成為未達1.0之值,若超過1.9,則有產生高頻傳輸損耗變大之問題之虞。該表面積比較佳為1.0~1.9, 更佳為1.0~1.6,再更佳為1.3~1.6。 In addition to the surface roughness Rz of the previously controlled tube for high-frequency copper foil, it is necessary to more accurately represent the three-dimensional surface area of the contact area with the resin (dielectric) which affects the high-frequency transmission loss with respect to the two-dimensional surface area. The ratio is controlled in the appropriate range. From this point of view, in the surface-treated copper foil of the present invention, the ratio of the three-dimensional surface area to the two-dimensional surface area measured by the laser microscope on the surface of the surface treatment layer is controlled to 1.0 to 1.9, so that even for a high-frequency circuit substrate The transmission loss can also be suppressed more satisfactorily. This surface area ratio cannot be a value of less than 1.0 by definition, and if it exceeds 1.9, there arises a problem that a high frequency transmission loss becomes large. The surface area is preferably 1.0 to 1.9. More preferably, it is 1.0 to 1.6, and even more preferably 1.3 to 1.6.

(表面處理銅箔之製造方法) (Manufacturing method of surface-treated copper foil)

於本發明中,較佳對銅箔基材(壓延銅箔或電解銅箔)之一表面或兩表面實施對酸洗後之銅箔表面進行瘤狀電沈積之粗化處理。藉由粗化處理,而獲得與樹脂(介電質)之密合性(剝離強度)。於本發明中,該粗化處理例如可藉由選自由Cu、Ni、Fe、Co、Zn、Cr、Mo、W、P、As、Ag、Sn、Ge組成之群中之任一種單質或任一種以上之合金的鍍敷,或者利用有機物之表面處理等來進行。有時進行通常之鍍銅等作為粗化前之預處理,亦有時在粗化後,為了賦予耐熱性、耐化學品性,而以上述金屬進行覆蓋鍍敷作為表面處理。再者,亦可不進行粗化處理,而進行選自由Cu、Ni、Fe、Co、Zn、Cr、Mo、W、P、As、Ag、Sn、Ge組成之群中之任一種單質或任一種以上之合金的鍍敷。然後,亦有時為了賦予耐熱性、耐化學品性,而以上述金屬進行覆蓋鍍敷作為表面處理。於進行粗化處理之情形時,有與樹脂之密合強度變高的優點。又,於不進行粗化處理之情形時,有如下優點:表面處理銅箔之製造步驟得以簡化,因此生產性提高,且可降低成本,又,可使粗糙度變小。對於壓延銅箔與電解銅箔,亦有時使處理之內容些許不同。藉由調整此種銅箔表面之鍍敷處理的液組成、鍍敷時間、電流密度,可控制本發明之表面處理層中的Co、Ni、Fe合計附著量,於表面處理層中形成Zn金屬層或含有Zn之合金處理層,控制表面處理層表面利用雷射顯微鏡所測得之三維表面積相對於二維表面積的比,進而控制表面粗糙度Rz JIS。 In the present invention, it is preferred to carry out roughening treatment of the surface of the copper foil substrate (rolled copper foil or electrolytic copper foil) on the surface or both surfaces of the copper foil after pickling. The adhesion to the resin (dielectric) (peeling strength) is obtained by the roughening treatment. In the present invention, the roughening treatment can be performed, for example, by any one selected from the group consisting of Cu, Ni, Fe, Co, Zn, Cr, Mo, W, P, As, Ag, Sn, and Ge. Plating of one or more alloys or by surface treatment of an organic substance or the like. In the case of ordinary copper plating or the like, pretreatment before roughening may be performed, and after roughening, in order to impart heat resistance and chemical resistance, the metal may be coated with a surface as a surface treatment. Further, any one of a group selected from the group consisting of Cu, Ni, Fe, Co, Zn, Cr, Mo, W, P, As, Ag, Sn, and Ge may be used without any roughening treatment. Plating of the above alloys. Then, in order to impart heat resistance and chemical resistance, the metal may be coated with a surface as a surface treatment. When the roughening treatment is carried out, there is an advantage that the adhesion strength to the resin becomes high. Further, in the case where the roughening treatment is not performed, there is an advantage that the manufacturing steps of the surface-treated copper foil are simplified, the productivity is improved, the cost can be reduced, and the roughness can be made small. For the rolled copper foil and the electrolytic copper foil, the processing contents are sometimes slightly different. By adjusting the liquid composition, plating time, and current density of the plating treatment on the surface of the copper foil, the total amount of Co, Ni, and Fe in the surface treatment layer of the present invention can be controlled, and Zn metal is formed in the surface treatment layer. A layer or an alloy treatment layer containing Zn controls the surface of the surface treatment layer by a laser microscope to measure the ratio of the three-dimensional surface area to the two-dimensional surface area, thereby controlling the surface roughness Rz JIS.

又,表面粗糙度Rz成為上述範圍之電解銅箔,可藉由以下 方法製作。 Further, the electrolytic copper foil having the surface roughness Rz in the above range can be used as follows Method of making.

<電解液組成> <electrolyte composition>

銅:90~110g/L Copper: 90~110g/L

硫酸:90~110g/L Sulfuric acid: 90~110g/L

氯:50~100ppm Chlorine: 50~100ppm

調平劑(leveling agent)1(雙(3-磺丙基)二硫化物):10~30ppm Leveling agent 1 (bis(3-sulfopropyl) disulfide): 10~30ppm

調平劑2(胺化合物):10~30ppm Leveling agent 2 (amine compound): 10~30ppm

上述胺化合物可使用下述化學式之胺化合物。 As the above amine compound, an amine compound of the following chemical formula can be used.

(上述化學式中,R1及R2為選自由羥烷基、醚基、芳基、經芳香族取代之烷基、不飽和烴基、烷基組成之群中者)。 (In the above chemical formula, R 1 and R 2 are those selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic-substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group).

<製造條件> <Manufacturing conditions>

電流密度:70~100A/dm2 Current density: 70~100A/dm 2

電解液溫度:50~60℃ Electrolyte temperature: 50~60°C

電解液線速度:3~5m/sec Electrolyte line speed: 3~5m/sec

電解時間:0.5~10分鐘 Electrolysis time: 0.5~10 minutes

可將本發明之表面處理銅箔自表面處理層側貼合於樹脂基 板而製造積層板。又,若有必要,可進一步對該表面處理銅箔進行加工而形成電路,藉此製造印刷配線板等。樹脂基板只要為具有可應用於印刷配線板或印刷電路板等之特性者,則並無特別限制,例如,剛性PWB用可使用紙基材酚樹脂、紙基材環氧樹脂、合成纖維布基材環氧樹脂、氟樹脂含浸布、玻璃布-紙複合基材環氧樹脂、玻璃布-玻璃不織布複合基材環氧樹脂及玻璃布基材環氧樹脂等,可撓性印刷基板(FPC)用可使用聚酯膜或聚醯亞胺膜、液晶聚合物(LCP)膜、氟樹脂及氟樹脂-聚醯亞胺複合材料等。再者,由於液晶聚合物(LCP)之介電損耗小,故而高頻電路用途之印刷配線板或印刷電路板較佳使用液晶聚合物(LCP)膜。再者,於本發明中,「印刷配線板」亦包括安裝有零件之印刷配線板及印刷電路板及印刷基板。 又,亦可將本發明之印刷配線板連接2個以上,而製造連接有2個以上之印刷配線板的印刷配線板,又,亦可將至少1個本發明之印刷配線板與另一個本發明之印刷配線板或不相當於本發明之印刷配線板的印刷配線板加以連接,使用此種印刷配線板製造電子機器。再者,於本發明中,「銅電路」亦包括銅配線。 The surface-treated copper foil of the present invention can be attached to the resin base from the surface treatment layer side The laminate is made of a board. Moreover, if necessary, the surface-treated copper foil can be further processed to form a circuit, thereby producing a printed wiring board or the like. The resin substrate is not particularly limited as long as it has characteristics suitable for use in a printed wiring board or a printed circuit board. For example, a paper substrate phenol resin, a paper substrate epoxy resin, or a synthetic fiber base can be used for the rigid PWB. Epoxy resin, fluororesin impregnated cloth, glass cloth-paper composite substrate epoxy resin, glass cloth-glass non-woven composite substrate epoxy resin and glass cloth substrate epoxy resin, flexible printed circuit board (FPC) A polyester film or a polyimide film, a liquid crystal polymer (LCP) film, a fluororesin, and a fluororesin-polyimine composite material can be used. Further, since the dielectric loss of the liquid crystal polymer (LCP) is small, a liquid crystal polymer (LCP) film is preferably used for the printed wiring board or the printed circuit board for high-frequency circuit use. Furthermore, in the present invention, the "printed wiring board" also includes a printed wiring board on which components are mounted, a printed circuit board, and a printed circuit board. Further, two or more printed wiring boards of the present invention may be connected to each other to manufacture a printed wiring board in which two or more printed wiring boards are connected, and at least one printed wiring board of the present invention may be combined with another one. The printed wiring board of the invention or the printed wiring board which does not correspond to the printed wiring board of the present invention is connected, and an electronic device is manufactured using the printed wiring board. Furthermore, in the present invention, the "copper circuit" also includes copper wiring.

關於貼合之方法,於剛性PWB用之情形時,準備使玻璃布 等基材含浸樹脂,使樹脂硬化直至半硬化狀態之預浸體。可藉由使銅箔與預浸體重疊並加熱加壓而進行。於FPC之情形時,經由接合劑或不使用接合劑而使液晶聚合物或聚醯亞胺膜等基材於高溫高壓下與銅箔積層接合,或對聚醯亞胺前驅物進行塗佈、乾燥、硬化等,藉此可製造積層板。 Regarding the method of fitting, in the case of rigid PWB, it is prepared to make glass cloth. The substrate is impregnated with a resin to harden the resin to a semi-hardened prepreg. This can be carried out by overlapping the copper foil with the prepreg and heating and pressurizing. In the case of FPC, a substrate such as a liquid crystal polymer or a polyimide film is bonded to a copper foil at a high temperature and a high pressure via a bonding agent or a bonding agent, or a polyimide precursor is coated. Drying, hardening, etc., whereby a laminate can be produced.

本發明之積層板可用於各種印刷配線板(PWB)或印刷電 路板,並無特別限制。作為印刷配線板,例如就導體圖案之層數的觀點而 言,可應用於單面PWB、兩面PWB、多層PWB(3層以上),就絕緣基板材料之種類的觀點而言,可應用於剛性PWB、軟性PWB(FPC)、剛性-彈性PWB。 The laminated board of the present invention can be used for various printed wiring boards (PWB) or printed electricity There are no special restrictions on the road board. As a printed wiring board, for example, from the viewpoint of the number of layers of the conductor pattern In other words, it can be applied to a single-sided PWB, a double-sided PWB, or a multi-layered PWB (three or more layers), and can be applied to a rigid PWB, a soft PWB (FPC), or a rigid-elastic PWB from the viewpoint of the type of the insulating substrate material.

又,作為另一實施形態,本發明亦可為一種下述之表面處理銅箔,於至少一表面形成有表面處理層,上述表面處理層包含粗化處理層,上述表面處理層中之Co、Ni、Fe合計附著量為300μg/dm2以下,上述表面處理層具有Zn金屬層或含有Zn之合金處理層,上述表面處理層表面利用雷射顯微鏡所測得之三維表面積相對於二維表面積之比為1.0~1.9,至少一表面之表面粗糙度Rz JIS為2.2μm以下,於兩表面形成有上述表面處理層,上述兩表面之表面粗糙度Rz JIS為2.2μm以下。 Further, in another embodiment, the present invention may be a surface-treated copper foil having a surface-treated layer formed on at least one surface thereof, the surface-treated layer comprising a roughened layer, and Co in the surface-treated layer The total adhesion amount of Ni and Fe is 300 μg/dm 2 or less, and the surface treatment layer has a Zn metal layer or an alloy treatment layer containing Zn, and the surface of the surface treatment layer is measured by a laser microscope to have a three-dimensional surface area with respect to a two-dimensional surface area. The surface roughness Rz JIS of at least one surface is 2.2 μm or less, and the surface treatment layer is formed on both surfaces, and the surface roughness Rz JIS of the both surfaces is 2.2 μm or less.

又,作為另一實施形態,本發明亦可為一種下述之表面處理銅箔,於至少一表面形成有表面處理層,上述表面處理層包含粗化處理層,上述表面處理層中之Co、Ni、Fe合計附著量為300μg/dm2以下,上述表面處理層具有Zn金屬層或含有Zn之合金處理層,上述表面處理層表面利用雷射顯微鏡所測得之三維表面積相對於二維表面積之比為1.0~1.9,至少一表面之表面粗糙度Rz JIS為2.2μm以下,上述含有Zn之合金處理層為Cu-Zn合金層。 Further, in another embodiment, the present invention may be a surface-treated copper foil having a surface-treated layer formed on at least one surface thereof, the surface-treated layer comprising a roughened layer, and Co in the surface-treated layer The total adhesion amount of Ni and Fe is 300 μg/dm 2 or less, and the surface treatment layer has a Zn metal layer or an alloy treatment layer containing Zn, and the surface of the surface treatment layer is measured by a laser microscope to have a three-dimensional surface area with respect to a two-dimensional surface area. The ratio is 1.0 to 1.9, and the surface roughness Rz JIS of at least one surface is 2.2 μm or less, and the alloy-treated layer containing Zn is a Cu-Zn alloy layer.

又,作為另一實施形態,本發明亦可為一種下述之表面處理銅箔,於至少一表面形成有表面處理層, 上述表面處理層包含粗化處理層,上述表面處理層中之Co、Ni、Fe合計附著量為300μg/dm2以下,上述表面處理層具有Zn金屬層或含有Zn之合金處理層,上述表面處理層表面利用雷射顯微鏡所測得之三維表面積相對於二維表面積之比為1.0~1.9,至少一表面之表面粗糙度Rz JIS為2.2μm以下,上述表面處理層中之Cu、Zn、Co、Ni、Fe合計附著量為0.10g/dm2以下。 Further, in another embodiment, the present invention may be a surface-treated copper foil having a surface-treated layer formed on at least one surface thereof, the surface-treated layer comprising a roughened layer, and Co in the surface-treated layer The total adhesion amount of Ni and Fe is 300 μg/dm 2 or less, and the surface treatment layer has a Zn metal layer or an alloy treatment layer containing Zn, and the surface of the surface treatment layer is measured by a laser microscope to have a three-dimensional surface area with respect to a two-dimensional surface area. The ratio of the surface roughness Rz JIS of at least one surface is 2.2 μm or less, and the total adhesion amount of Cu, Zn, Co, Ni, and Fe in the surface treatment layer is 0.10 g/dm 2 or less.

又,作為另一實施形態,本發明亦可為一種下述之表面處理銅箔,於至少一表面形成有表面處理層,上述表面處理層中之Co、Ni、Fe合計附著量為986μg/dm2以下,上述表面處理層具有Zn金屬層或含有Zn之合金處理層,上述表面處理層表面利用雷射顯微鏡所測得之三維表面積相對於二維表面積之比為1.0~1.9,於兩表面形成有上述表面處理層,上述兩表面之表面粗糙度Rz JIS為0.6μm以下。 Further, in another embodiment, the present invention may be a surface-treated copper foil having a surface-treated layer formed on at least one surface thereof, and a total adhesion amount of Co, Ni, and Fe in the surface-treated layer is 986 μg/dm. In the following, the surface treatment layer has a Zn metal layer or an alloy treatment layer containing Zn, and the surface of the surface treatment layer has a ratio of a three-dimensional surface area to a two-dimensional surface area measured by a laser microscope of 1.0 to 1.9, which is formed on both surfaces. In the surface treatment layer, the surface roughness Rz JIS of the both surfaces is 0.6 μm or less.

(附載體銅箔) (with carrier copper foil)

作為本發明之另一實施形態的附載體銅箔,於載體之一面或兩面依序具有中間層、極薄銅層。而且,上述極薄銅層係作為上述本發明之一實施形態的表面處理銅箔。 A copper foil with a carrier according to another embodiment of the present invention has an intermediate layer and an extremely thin copper layer on one surface or both sides of the carrier. Further, the ultra-thin copper layer is a surface-treated copper foil according to an embodiment of the present invention.

<載體> <carrier>

可用於本發明之載體,典型為金屬箔或樹脂膜,例如以銅箔、銅合金箔、鎳箔、鎳合金箔、鐵箔、鐵合金箔、不鏽鋼箔、鋁箔、鋁合金箔、絕緣樹脂膜(例如聚醯亞胺膜、液晶聚合物(LCP)膜、聚對酞酸乙二酯(PET) 膜、聚醯胺膜、聚酯膜、氟樹脂膜等)之形態提供。 A carrier which can be used in the present invention, typically a metal foil or a resin film, for example, a copper foil, a copper alloy foil, a nickel foil, a nickel alloy foil, an iron foil, a ferroalloy foil, a stainless steel foil, an aluminum foil, an aluminum alloy foil, an insulating resin film ( For example, polyimide film, liquid crystal polymer (LCP) film, polyethylene terephthalate (PET) A form of a film, a polyamide film, a polyester film, a fluororesin film, or the like is provided.

作為可用於本發明之載體,較佳使用銅箔。其原因在於:銅箔由於導電率高,故容易形成其後之中間層、極薄銅層。載體典型係以壓延銅箔或電解銅箔之形態提供。一般而言,電解銅箔係使銅自硫酸銅鍍浴電解析出至鈦或不鏽鋼之轉筒上而製造,壓延銅箔則是反覆進行利用壓延輥之塑性加工與熱處理而製造。作為銅箔之材料,除精銅或無氧銅等高純度之銅以外,例如亦可使用摻有Sn之銅、摻Ag之銅、添加有Cr、Zr或Mg等之銅合金、添加有Ni及Si等之卡遜系銅合金之類的銅合金。 As the carrier which can be used in the present invention, a copper foil is preferably used. The reason for this is that since the copper foil has a high electrical conductivity, it is easy to form an intermediate layer and an extremely thin copper layer thereafter. The carrier is typically provided in the form of a rolled copper foil or an electrolytic copper foil. In general, an electrolytic copper foil is produced by electrically analyzing copper from a copper sulfate plating bath onto a drum of titanium or stainless steel, and the rolled copper foil is produced by repeatedly performing plastic working and heat treatment by a calender roll. As the material of the copper foil, in addition to high-purity copper such as refined copper or oxygen-free copper, for example, copper doped with Sn, copper doped with Ag, copper alloy to which Cr, Zr or Mg is added, or the like may be added. And a copper alloy such as a Cason copper alloy such as Si.

關於可用於本發明之載體的厚度,並無特別限制,只要適當 調節成可作為載體之適合厚度即可,例如可設為5μm以上。但是,若過厚則生產成本會提高,故通常較佳設為35μm以下。因此,載體之厚度典型為12~70μm,更典型為18~35μm。 Regarding the thickness of the carrier usable in the present invention, there is no particular limitation as long as appropriate It may be adjusted to a suitable thickness as a carrier, and for example, it may be 5 μm or more. However, if the production cost is increased if it is too thick, it is usually preferably 35 μm or less. Therefore, the thickness of the carrier is typically 12 to 70 μm, more typically 18 to 35 μm.

又,用於本發明之載體,可藉由如下述般控制形成中間層之 側的表面粗糙度Rz及表面積比,而控制表面處理後之極薄銅層表面(即表面處理層表面)之表面粗糙度Rz及表面積比。 Further, the carrier used in the present invention can be controlled to form an intermediate layer by the following The surface roughness Rz and the surface area ratio of the side are controlled, and the surface roughness Rz and the surface area ratio of the surface of the extremely thin copper layer (i.e., the surface of the surface treatment layer) after the surface treatment are controlled.

關於用於本發明之載體,預先控制中間層形成前之載體之形 成中間層之側的表面之TD之粗糙度(Rz)及表面積比亦是重要的。具體而言,中間層形成前之載體的TD之表面粗糙度(Rz)為0.20~1.50μm,較佳為0.20~1.00μm,表面積比為1.0~1.9,較佳為1.0~1.5。作為此種銅箔,可藉由如下方式製作,即調整壓延油之油膜當量進行壓延,或者進行化學蝕刻之類的化學研磨或磷酸溶液中之電解研磨,又,添加既定之添加劑製造電解銅箔。藉由以上述方式將處理前之銅箔的TD之表面粗糙度(Rz)與 表面積比設為上述範圍,可輕易控制處理後之銅箔的表面粗糙度(Rz)與表面積比。 Regarding the carrier used in the present invention, the shape of the carrier before the formation of the intermediate layer is controlled in advance The roughness (Rz) and surface area ratio of the TD on the side of the intermediate layer are also important. Specifically, the surface roughness (Rz) of the TD of the carrier before the formation of the intermediate layer is 0.20 to 1.50 μm, preferably 0.20 to 1.00 μm, and the surface area ratio is 1.0 to 1.9, preferably 1.0 to 1.5. Such a copper foil can be produced by adjusting the oil film equivalent of the rolling oil for calendering, chemical polishing such as chemical etching or electrolytic polishing in a phosphoric acid solution, and adding a predetermined additive to produce an electrolytic copper foil. . By using the surface roughness (Rz) of the TD of the copper foil before the treatment in the above manner The surface area ratio is set to the above range, and the surface roughness (Rz) to surface area ratio of the treated copper foil can be easily controlled.

再者,壓延可藉由將下式所規定之油膜當量設為13000~35000以下而進行。 Further, the rolling can be carried out by setting the oil film equivalent of the following formula to 13,000 to 35,000 or less.

油膜當量={(壓延油黏度[cSt])×(過板速度[mPm]+輥圓周速度[mpm])}/{(輥之咬角[rad])×(材料之降伏應力[kg/mm2])} Oil film equivalent = {(calender oil viscosity [cSt]) × (over-plate speed [mPm] + roll peripheral speed [mpm])} / {(roller bite angle [rad]) × (material fall stress [kg/mm] 2 ])}

壓延油黏度[cSt]係40℃之動態黏度。 Calendered oil viscosity [cSt] is a dynamic viscosity of 40 °C.

為了使油膜當量於13000~35000之範圍內較低,可使用如下之公知方法,即使用低黏度之壓延油,或者減緩過板速度等。又,為了使油膜當量於13000~35000之範圍內較高,可使用如下之公知方法,即使用高黏度之壓延油,或者提高過板速度等。 In order to make the oil film equivalent lower in the range of 13,000 to 35,000, a well-known method of using a low-viscosity rolling oil or slowing the plate speed can be used. Further, in order to make the oil film equivalent higher in the range of 13,000 to 35,000, a known method of using a high-viscosity rolling oil or increasing the speed of the plate can be used.

又,表面粗糙度Rz及表面積比成為上述範圍之電解銅箔,可藉由以下方法製作。可使用該電解銅箔作為載體。 Further, an electrolytic copper foil having a surface roughness Rz and a surface area ratio within the above range can be produced by the following method. The electrolytic copper foil can be used as a carrier.

<電解液組成> <electrolyte composition>

銅:90~110g/L Copper: 90~110g/L

硫酸:90~110g/L Sulfuric acid: 90~110g/L

氯:50~100ppm Chlorine: 50~100ppm

調平劑1(雙(3-磺丙基)二硫化物):10~30ppm Leveling agent 1 (bis(3-sulfopropyl) disulfide): 10~30ppm

調平劑2(胺化合物):10~30ppm Leveling agent 2 (amine compound): 10~30ppm

上述胺化合物可使用下述化學式之胺化合物。 As the above amine compound, an amine compound of the following chemical formula can be used.

(上述化學式中,R1及R2為選自由羥烷基、醚基、芳基、經芳香族取代之烷基、不飽和烴基、烷基組成之群中者)。 (In the above chemical formula, R 1 and R 2 are those selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic-substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group).

<製造條件> <Manufacturing conditions>

電流密度:70~100A/dm2 Current density: 70~100A/dm 2

電解液溫度:50~60℃ Electrolyte temperature: 50~60°C

電解液線速度:3~5m/sec Electrolyte line speed: 3~5m/sec

電解時間:0.5~10分鐘(根據析出之銅厚、電流密度進行調整) Electrolysis time: 0.5~10 minutes (adjusted according to copper thickness and current density)

再者,亦可於載體設置極薄銅層之側的表面為相反側的表面設置粗化處理層。可使用公知之方法設置該粗化處理層,亦可藉由上述粗化處理設置該粗化處理層。於載體設置極薄銅層之側的表面為相反側的表面設置粗化處理層之情況具有如下優點:當將載體自具有該粗化處理層之表面側積層於樹脂基板等支持體時,載體與樹脂基板變得難以剝離。 Further, a roughened layer may be provided on the surface on the side opposite to the side on which the carrier is provided with the ultra-thin copper layer. The roughening treatment layer may be provided by a known method, and the roughening treatment layer may be provided by the above-described roughening treatment. The case where the surface on the side where the carrier is provided with the ultra-thin copper layer is provided with the roughened layer on the surface on the opposite side has the advantage that when the carrier is laminated on the surface of the resin substrate or the like from the surface side having the roughened layer, the carrier It becomes difficult to peel off from the resin substrate.

<中間層> <intermediate layer>

於載體上設置中間層。亦可於載體與中間層之間設置其他層。於本發明中使用之中間層只要為如下述之構成,則並無特別限定,即於附載體銅箔向絕緣基板積層之步驟前,極薄銅層難以自載體剝離,另一方面,於向 絕緣基板積層之步驟後,極薄銅層可自載體剝離。例如,本發明之附載體銅箔的中間層亦可含有選自由Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn、該等之合金、該等之水合物、該等之氧化物、有機物組成之群中的1種或2種以上。又,中間層亦可為複數層。 An intermediate layer is provided on the carrier. Other layers may also be provided between the carrier and the intermediate layer. The intermediate layer used in the present invention is not particularly limited as long as it is a structure in which the ultra-thin copper layer is difficult to be peeled off from the carrier before the step of laminating the carrier copper foil to the insulating substrate. After the step of laminating the insulating substrate, the ultra-thin copper layer can be peeled off from the carrier. For example, the intermediate layer of the copper foil with a carrier of the present invention may further contain a compound selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, Zn, such alloys, and the like, One or two or more of these oxides and organic compounds. Also, the intermediate layer may be a plurality of layers.

又,例如,中間層可藉由如下方式構成:自載體側形成由選自以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn構成之元素群中1種元素構成的單一金屬層,或由選自以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn構成之元素群中1種或2種以上之元素構成的合金層,於其上形成由選自以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn構成之元素群中1種或2種以上之元素的水合物或氧化物或有機物構成之層。 Further, for example, the intermediate layer may be formed by forming one element selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn from the carrier side. a single metal layer or an alloy layer composed of one or more elements selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn. A hydrate or an oxide or an organic substance formed of one or more elements selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn is formed thereon. The layer of composition.

又,例如,中間層可藉由如下方式構成:自載體側形成由選自以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn構成之元素群1種元素構成的單一金屬層,或由選自以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn構成之元素群中1種或2種以上之元素構成的合金層,於其上形成由選自以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn構成之元素群中1種元素構成的單一金屬層,或由選自以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn構成之元素群中1種或2種以上之元素構成的合金層。 Further, for example, the intermediate layer may be formed by forming one element selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn from the carrier side. a single metal layer or an alloy layer composed of one or more elements selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn. Forming a single metal layer composed of one element selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, Zn, or selected from Cr, Ni An alloy layer composed of one or two or more elements of the element group consisting of Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn.

又,中間層可使用公知之有機物作為上述有機物,又,較佳使用含氮有機化合物、含硫有機化合物及羧酸中之任一種以上。例如,作為具體之含氮有機化合物,較佳使用為具有取代基之三唑化合物的1,2,3-苯并三唑、羧基苯并三唑、N',N'-雙(苯并三唑基甲基)脲、1H-1,2,4-三唑及3-胺基-1H-1,2,4-三唑等。 Further, as the intermediate layer, a known organic substance can be used as the organic substance, and at least one of a nitrogen-containing organic compound, a sulfur-containing organic compound, and a carboxylic acid is preferably used. For example, as a specific nitrogen-containing organic compound, 1,2,3-benzotriazole, carboxybenzotriazole, N', N'-bis (benzotriazole) which is a triazole compound having a substituent is preferably used. Azylmethyl)urea, 1H-1,2,4-triazole and 3-amino-1H-1,2,4-triazole, and the like.

含硫有機化合物較佳使用巰基苯并噻唑、2-巰基苯并噻唑鈉、三聚硫氰酸(thiocyanuric acid)及2-苯并咪唑硫醇等。 As the sulfur-containing organic compound, mercaptobenzothiazole, sodium 2-mercaptobenzothiazole, thiocyanuric acid, 2-benzimidazolethiol, and the like are preferably used.

作為羧酸,尤佳使用單羧酸,其中較佳使用油酸、亞麻油酸及次亞麻油酸等。 As the carboxylic acid, a monocarboxylic acid is particularly preferably used, and among them, oleic acid, linoleic acid, linoleic acid, and the like are preferably used.

又,例如中間層可於載體上依序積層鎳層、鎳-磷合金層或鎳-鈷合金層、及含鉻層而構成。鎳與銅之接著力高於鉻與銅之接著力,因此於剝離極薄銅層時,於極薄銅層與含鉻層之界面會發生剝離。又,對於中間層之鎳,期待防止銅成分自載體向極薄銅層擴散之阻隔效果。中間層中之鎳的附著量較佳為100μg/dm2以上40000μg/dm2以下,更佳為100μg/dm2以上4000μg/dm2以下,更佳為100μg/dm2以上2500μg/dm2以下,更佳為100μg/dm2以上且未達1000μg/dm2,中間層中之鉻的附著量較佳為5μg/dm2以上100μg/dm2以下。僅於單面設置中間層之情形時,較佳於載體之相反面設置鍍Ni層等防銹層。上述中間層之鉻層可藉由鍍鉻或鉻酸處理來設置。 Further, for example, the intermediate layer may be formed by sequentially laminating a nickel layer, a nickel-phosphorus alloy layer or a nickel-cobalt alloy layer, and a chromium-containing layer on the carrier. The adhesion between nickel and copper is higher than the adhesion between chromium and copper. Therefore, when the ultra-thin copper layer is peeled off, peeling occurs at the interface between the ultra-thin copper layer and the chromium-containing layer. Further, for the nickel of the intermediate layer, a barrier effect of preventing the copper component from diffusing from the carrier to the ultra-thin copper layer is expected. The amount of deposition of nickel intermediate layer is preferably from 100μg / dm 2 or more 40000μg / dm 2 or less, more preferably 100μg / dm 2 or more 4000μg / dm 2 or less, more preferably 100μg / dm 2 or more 2500μg / dm 2 or less, More preferably, it is 100 μg/dm 2 or more and less than 1000 μg/dm 2 , and the amount of chromium deposited in the intermediate layer is preferably 5 μg/dm 2 or more and 100 μg/dm 2 or less. In the case where the intermediate layer is provided only on one side, it is preferable to provide a rust-proof layer such as a Ni plating layer on the opposite side of the carrier. The chromium layer of the above intermediate layer can be provided by chrome plating or chromic acid treatment.

若中間層之厚度變得過大,則有時中間層之厚度會對表面處理後之極薄銅層表面的表面粗糙度Rz及光澤度造成影響,因此極薄銅層之表面處理層表面的中間層厚度較佳為1~1000nm,較佳為1~500nm,較佳為2~200nm,較佳為2~100nm,更佳為3~60nm。再者,中間層亦可設置於載體之兩面。 If the thickness of the intermediate layer becomes too large, the thickness of the intermediate layer may affect the surface roughness Rz and the glossiness of the surface of the extremely thin copper layer after the surface treatment, so that the surface of the surface of the extremely thin copper layer is in the middle of the surface layer. The layer thickness is preferably from 1 to 1000 nm, preferably from 1 to 500 nm, preferably from 2 to 200 nm, more preferably from 2 to 100 nm, still more preferably from 3 to 60 nm. Furthermore, the intermediate layer may also be disposed on both sides of the carrier.

<極薄銅層> <very thin copper layer>

於中間層上設置極薄銅層。亦可於中間層與極薄銅層之間設置其他層。具有該載體之極薄銅層係作為本發明之一實施方式的表面處理金屬 材。極薄銅層之厚度並無特別限制,一般而言較載體薄,例如為12μm以下。典型為0.5~12μm,更典型為1.5~5μm。又,亦可於中間層上設置極薄銅層前,為了減少極薄銅層之針孔,而進行利用銅-磷合金之打底鍍敷(strike plating)。打底鍍敷可列舉焦磷酸銅鍍敷液等。再者,極薄銅層亦可設置於載體之兩面。極薄銅層可為含有銅合金之層,亦可為由銅合金構成之層,極薄銅層亦可含有有機物或無機物。再者,作為極薄銅層,較佳使用Cu濃度為75mass%以上之極薄銅層。其原因在於:Cu濃度為75mass%以上之極薄銅層的導電率高,適合於電路等用途。 An extremely thin copper layer is provided on the intermediate layer. Other layers may be provided between the intermediate layer and the ultra-thin copper layer. An extremely thin copper layer having the carrier is a surface treatment metal according to an embodiment of the present invention material. The thickness of the ultra-thin copper layer is not particularly limited, and is generally thinner than the carrier, for example, 12 μm or less. It is typically 0.5 to 12 μm, more typically 1.5 to 5 μm. Further, before the ultra-thin copper layer is provided on the intermediate layer, strike plating using a copper-phosphorus alloy may be performed in order to reduce pinholes of the ultra-thin copper layer. The base plating may be, for example, a copper pyrophosphate plating solution. Furthermore, an extremely thin copper layer may be provided on both sides of the carrier. The ultra-thin copper layer may be a layer containing a copper alloy or a layer composed of a copper alloy, and the ultra-thin copper layer may also contain an organic or inorganic substance. Further, as the ultra-thin copper layer, an extremely thin copper layer having a Cu concentration of 75 mass% or more is preferably used. The reason for this is that an extremely thin copper layer having a Cu concentration of 75 mass% or more has high conductivity and is suitable for use in circuits and the like.

又,本發明之極薄銅層亦可為以下述條件形成之極薄銅層。其原因在於:藉由形成平滑之極薄銅層,而控制附載體銅箔之表面處理層的表面粗糙度Rz及表面積比。 Further, the ultra-thin copper layer of the present invention may be an extremely thin copper layer formed under the following conditions. The reason for this is that the surface roughness Rz and the surface area ratio of the surface-treated layer of the copper foil with a carrier are controlled by forming a smooth ultra-thin copper layer.

˙電解液組成 ̇ electrolyte composition

銅:80~120g/L Copper: 80~120g/L

硫酸:80~120g/L Sulfuric acid: 80~120g/L

氯:30~100ppm Chlorine: 30~100ppm

調平劑1(雙(3-磺丙基)二硫化物):10~30ppm Leveling agent 1 (bis(3-sulfopropyl) disulfide): 10~30ppm

調平劑2(胺化合物):10~30ppm Leveling agent 2 (amine compound): 10~30ppm

上述胺化合物可使用下述化學式之胺化合物。 As the above amine compound, an amine compound of the following chemical formula can be used.

(上述化學式中,R1及R2為選自由羥烷基、醚基、芳基、經芳香族取代之烷基、不飽和烴基、烷基組成之群中者)。 (In the above chemical formula, R 1 and R 2 are those selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic-substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group).

˙製造條件 ̇ manufacturing conditions

電流密度:70~100A/dm2 Current density: 70~100A/dm 2

電解液溫度:50~65℃ Electrolyte temperature: 50~65°C

電解液線速度:1.5~5m/sec Electrolyte line speed: 1.5~5m/sec

電解時間:0.5~10分鐘(根據析出之銅厚、電流密度進行調整) Electrolysis time: 0.5~10 minutes (adjusted according to copper thickness and current density)

以下,揭示若干使用本發明之附載體銅箔的印刷配線板製造步驟之例。 Hereinafter, examples of manufacturing steps of a printed wiring board using the copper foil with a carrier of the present invention will be disclosed.

於本發明之印刷配線板製造方法的一實施形態中,包括如下步驟:準備本發明之附載體銅箔與絕緣基板之步驟;將上述附載體銅箔與絕緣基板積層之步驟;將上述附載體銅箔與絕緣基板以極薄銅層側與絕緣基板對向之方式積層後,經過剝離上述附載體銅箔之載體的步驟而形成覆銅積層板,然後藉由半加成法、改良半加成法、部分加成法及減成法中之任一方法形成電路之步驟。絕緣基板亦可為具有內層電路之絕緣基板。 An embodiment of the method for producing a printed wiring board according to the present invention includes the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; and stacking the copper foil with the insulating substrate; and the carrier After the copper foil and the insulating substrate are laminated such that the ultra-thin copper layer side faces the insulating substrate, the copper-clad laminate is formed by the step of peeling off the carrier with the carrier copper foil, and then the semi-additive method is modified by semi-addition. The steps of forming a circuit by any of the methods of forming, partially adding, and subtracting. The insulating substrate may also be an insulating substrate having an inner layer circuit.

於本發明中,所謂半加成法係指下述方法:於絕緣基板或銅 箔種晶層(seed layer)上進行薄的無電鍍敷,形成圖案後,使用電鍍及蝕刻形成導體圖案。 In the present invention, the so-called semi-additive method refers to the following method: on an insulating substrate or copper. A thin electroless plating is applied to the foil seed layer, and after forming a pattern, a conductor pattern is formed by plating and etching.

因此,於使用半加成法之本發明之印刷配線板製造方法的一 實施形態中,包括如下步驟:準備本發明之附載體銅箔與絕緣基板之步驟;將上述附載體銅箔與絕緣基板積層之步驟;積層上述附載體銅箔與絕緣基板後,將上述附載體銅箔之載體剝離之步驟;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,將經剝離上述載體而露出之極薄銅層全部去除之步驟;於藉由蝕刻將上述極薄銅層去除而露出之上述樹脂,設置穿孔(through hole)或/及盲孔(blind via)之步驟;對含有上述穿孔或/及盲孔之區域進行除膠渣處理(desmear treatment)之步驟;對含有上述樹脂及上述穿孔或/及盲孔之區域設置無電鍍層之步驟;於上述無電鍍層上設置鍍敷阻劑之步驟;對上述鍍敷阻劑進行曝光,然後將形成電路之區域的鍍敷阻劑去除之步驟;於經去除上述鍍敷阻劑之形成上述電路的區域設置電鍍層之步驟;將上述鍍敷阻劑去除之步驟;藉由快速蝕刻(flash etching)等,將存在於形成上述電路之區域以外之區域的無電鍍層去除之步驟。 Therefore, one of the manufacturing methods of the printed wiring board of the present invention using the semi-additive method The embodiment includes the steps of: preparing a copper foil with an insulating substrate and an insulating substrate of the present invention; and stacking the copper foil with the carrier and the insulating substrate; and laminating the copper foil with the insulating substrate and the insulating substrate; a step of peeling off the carrier of the copper foil; a step of removing all of the ultra-thin copper layer exposed by peeling off the carrier by etching or plasma etching using an etching solution such as acid; and etching the ultra-thin copper layer by etching a step of removing the exposed resin, providing a through hole or/and a blind via; and performing a desmear treatment on the region containing the perforation or/and the blind hole; a step of providing an electroless plating layer in the region of the resin and the perforated or/and blind via; a step of providing a plating resist on the electroless plating layer; exposing the plating resist and then plating the region forming the circuit a step of removing the resist; a step of providing a plating layer in a region where the plating resist is removed to form the circuit; and removing the plating resist; and performing rapid etching (f Leash etching) or the like, the step of removing the electroless plating layer existing in a region other than the region where the above-described circuit is formed.

於使用半加成法之本發明之印刷配線板製造方法的另一實 施形態中,包括如下步驟:準備本發明之附載體銅箔與絕緣基板之步驟;將上述附載體銅箔與絕緣基板積層之步驟;積層上述附載體銅箔與絕緣基板後,將上述附載體銅箔之載體剝離之步驟;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,將經剝離上述載體而露出之極薄銅層全部去除之步驟;對藉由蝕刻將上述極薄銅層去除而露出之上述樹脂的表面,設置無電鍍層之步驟;於上述無電鍍層上設置鍍敷阻劑之步驟;對上述鍍敷阻劑進行曝 光,然後將形成電路之區域的鍍敷阻劑去除之步驟;於經去除上述鍍敷阻劑之形成上述電路的區域設置電鍍層之步驟;將上述鍍敷阻劑去除之步驟;藉由快速蝕刻等,將存在於形成上述電路之區域以外之區域的無電鍍層及極薄銅層去除之步驟。 Another method for manufacturing a printed wiring board of the present invention using a semi-additive method The method includes the steps of: preparing a copper foil with an insulating substrate and an insulating substrate of the present invention; and stacking the copper foil with the insulating substrate and the insulating substrate; and laminating the copper foil with the insulating substrate and the insulating substrate; a step of peeling off the carrier of the copper foil; a step of removing all of the extremely thin copper layer exposed by peeling off the carrier by etching or plasma etching using an etching solution such as acid; and etching the ultra-thin copper layer by etching a step of removing the exposed surface of the resin, providing an electroless plating layer; and providing a plating resist on the electroless plating layer; and exposing the plating resist a step of removing the plating resist in the region where the circuit is formed; a step of providing a plating layer in a region where the plating resist is removed to form the circuit; and a step of removing the plating resist; Etching or the like, the step of removing the electroless plating layer and the ultra-thin copper layer existing in a region other than the region where the above-described circuit is formed.

於本發明中,所謂改良半加成法係指下述方法:於絕緣層上 積層金屬箔,利用鍍敷阻劑保護非電路形成部,藉由電鍍增加電路形成部之銅厚後,去除阻劑,藉由(快速)蝕刻去除上述電路形成部以外之金屬箔,藉此於絕緣層上形成電路。 In the present invention, the so-called modified semi-additive method refers to the following method: on the insulating layer The laminated metal foil protects the non-circuit forming portion by a plating resist, increases the copper thickness of the circuit forming portion by plating, removes the resist, and removes the metal foil other than the circuit forming portion by (rapid) etching. A circuit is formed on the insulating layer.

因此,於使用改良半加成法之本發明之印刷配線板製造方法 的一實施形態中,包括如下步驟:準備本發明之附載體銅箔與絕緣基板之步驟;將上述附載體銅箔與絕緣基板積層之步驟;積層上述附載體銅箔與絕緣基板後,將上述附載體銅箔之載體剝離之步驟;於將上述載體剝離而露出之極薄銅層與絕緣基板,設置穿孔或/及盲孔之步驟;對含有上述穿孔或/及盲孔之區域進行除膠渣處理之步驟;對含有上述穿孔或/及盲孔之區域設置無電鍍層之步驟;於將上述載體剝離而露出之極薄銅層表面,設置鍍敷阻劑之步驟;設置上述鍍敷阻劑後,藉由電鍍形成電路之步驟;將上述鍍敷阻劑去除之步驟;藉由快速蝕刻,將藉由去除上述鍍敷阻劑而露出之極薄銅層去除之步驟。 Therefore, the printed wiring board manufacturing method of the present invention using the improved semi-additive method In one embodiment, the method includes the steps of: preparing a copper foil with an insulating substrate and an insulating substrate of the present invention; and laminating the copper foil with the carrier and the insulating substrate; and laminating the copper foil with the carrier and the insulating substrate a step of peeling off the carrier with the carrier copper foil; a step of providing a perforated or/and blind via hole for peeling off the carrier and exposing the ultra-thin copper layer and the insulating substrate; and removing the adhesive containing the perforated or/and blind vias a step of treating the slag; a step of providing an electroless plating layer on the region containing the perforation or/and the blind hole; a step of providing a plating resist on the surface of the extremely thin copper layer exposed by peeling the carrier; and setting the plating resistance After the agent, the step of forming a circuit by electroplating; the step of removing the plating resist; and the step of removing the extremely thin copper layer exposed by removing the plating resist by rapid etching.

又,將電路形成於上述樹脂層上之步驟,亦可為將另外之附 載體銅箔自極薄銅層側貼合於上述樹脂層上,使用貼合於上述樹脂層之附載體銅箔形成上述電路之步驟。又,貼合於上述樹脂層上之另外之附載體銅箔,亦可為本發明之附載體銅箔。又,於上述樹脂層上形成電路之步驟, 亦可藉由半加成法、減成法、部分加成法或改良半加成法中之任一方法進行。又,於上述表面形成電路之附載體銅箔,亦可於該附載體銅箔之載體的表面具有基板或樹脂層。 Further, the step of forming the circuit on the resin layer may be to attach another The carrier copper foil is bonded to the resin layer from the side of the ultra-thin copper layer, and the circuit is formed by using a copper foil with a carrier adhered to the resin layer. Further, the additional copper foil with a carrier adhered to the above resin layer may be the copper foil with a carrier of the present invention. Further, a step of forming a circuit on the above resin layer, It can also be carried out by any one of a semi-additive method, a subtractive method, a partial addition method or a modified semi-additive method. Further, the copper foil with a carrier on which the circuit is formed on the surface may have a substrate or a resin layer on the surface of the carrier of the copper foil with the carrier.

於使用改良半加成法的本發明之印刷配線板製造方法之另 一實施形態中,包括如下步驟:準備本發明之附載體銅箔與絕緣基板之步驟;將上述附載體銅箔與絕緣基板積層之步驟;積層上述附載體銅箔與絕緣基板後,將上述附載體銅箔之載體剝離之步驟;於將上述載體剝離而露出之極薄銅層上設置鍍敷阻劑之步驟;對上述鍍敷阻劑進行曝光,然後將形成電路之區域的鍍敷阻劑去除之步驟;於經去除上述鍍敷阻劑之形成上述電路的區域,設置電鍍層之步驟;將上述鍍敷阻劑去除之步驟;藉由快速蝕刻等,將存在於形成上述電路之區域以外之區域的無電鍍層及極薄銅層去除之步驟。 Another method for manufacturing a printed wiring board of the present invention using a modified semi-additive method In one embodiment, the method includes the steps of: preparing a copper foil with an insulating substrate and an insulating substrate of the present invention; and stacking the copper foil with the carrier and the insulating substrate; and laminating the copper foil with the carrier and the insulating substrate; a step of peeling off the carrier of the carrier copper foil; a step of providing a plating resist on the extremely thin copper layer exposed by peeling the carrier; exposing the plating resist, and then plating resisting the region forming the circuit a step of removing; a step of providing a plating layer in a region where the plating resist is removed to form the circuit; and a step of removing the plating resist; and being formed outside the region where the circuit is formed by rapid etching or the like The step of removing the electroless plating layer and the extremely thin copper layer in the region.

於本發明中,所謂部分加成法係指下述方法:向設有導體層 而成之基板、視需要開出穿孔或通孔(via hole)用之孔之基板上賦予觸媒核,進行蝕刻而形成導體電路,視需要設置阻焊劑或鍍敷阻劑後,在上述導體電路上,藉由無電鍍敷處理對穿孔或通孔等進行增厚,藉此製造印刷配線板。 In the present invention, the partial addition method refers to a method in which a conductor layer is provided. The substrate is formed, and a catalyst core is provided on a substrate on which a hole for a via hole or a via hole is opened, and etching is performed to form a conductor circuit. If a solder resist or a plating resist is provided as needed, the conductor is formed. On the circuit, a perforation, a via hole, or the like is thickened by an electroless plating treatment to thereby manufacture a printed wiring board.

因此,於使用部分加成法的本發明之印刷配線板製造方法之 一實施形態中,包括如下步驟:準備本發明之附載體銅箔與絕緣基板之步驟;將上述附載體銅箔與絕緣基板積層之步驟;積層上述附載體銅箔與絕緣基板後,將上述附載體銅箔之載體剝離之步驟;於剝離上述載體而露出之極薄銅層與絕緣基板,設置穿孔或/及盲孔之步驟;對含有上述穿孔或 /及盲孔之區域進行除膠渣處理之步驟;向含有上述穿孔或/及盲孔之區域賦予觸媒核之步驟;於經剝離上述載體而露出之極薄銅層表面設置抗蝕劑之步驟;對上述抗蝕劑進行曝光,形成電路圖案之步驟;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,將上述極薄銅層及上述觸媒核去除而形成電路之步驟;將上述抗蝕劑去除之步驟;於藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,將上述極薄銅層及上述觸媒核去除而露出之上述絕緣基板表面,設置阻焊劑或鍍敷阻劑之步驟;於未設置有上述阻焊劑或鍍敷阻劑之區域設置無電鍍層之步驟。 Therefore, in the method of manufacturing a printed wiring board of the present invention using a partial addition method In one embodiment, the method includes the steps of: preparing a copper foil with an insulating substrate and an insulating substrate of the present invention; and stacking the copper foil with the carrier and the insulating substrate; and laminating the copper foil with the carrier and the insulating substrate; a step of peeling off the carrier of the carrier copper foil; a step of providing perforations or/and blind vias for stripping the ultra-thin copper layer and the insulating substrate exposed by the carrier; And a step of desmear treatment in the region of the blind hole; a step of imparting a catalyst core to the region containing the perforation or/and the blind hole; and providing a resist on the surface of the extremely thin copper layer exposed by peeling off the carrier a step of exposing the resist to form a circuit pattern; and removing the ultra-thin copper layer and the catalyst core by using etching or plasma etching of an acid or the like to form a circuit; The step of removing the resist; removing the surface of the insulating substrate by exposing the ultra-thin copper layer and the catalyst core by etching or plasma etching using an etching solution such as an acid, and providing a solder resist or plating a step of a resist; a step of providing an electroless plating layer in a region where the above-mentioned solder resist or plating resist is not provided.

於本發明中,所謂減成法係指下述方法:藉由蝕刻等,選擇 性地將覆銅積層板上之銅箔的不要部分去除,形成導體圖案。 In the present invention, the subtractive method refers to a method of selecting by etching or the like. The unnecessary portions of the copper foil on the copper clad laminate are removed to form a conductor pattern.

因此,於使用減成法的本發明之印刷配線板製造方法之一實 施形態中,包括如下步驟:準備本發明之附載體銅箔與絕緣基板之步驟;將上述附載體銅箔與絕緣基板積層之步驟;積層上述附載體銅箔與絕緣基板後,將上述附載體銅箔之載體剝離之步驟;於剝離上述載體而露出之極薄銅層與絕緣基板,設置穿孔或/及盲孔之步驟;對含有上述穿孔及/或盲孔之區域進行除膠渣處理之步驟;對含有上述穿孔或/及盲孔之區域設置無電鍍層之步驟;於上述無電鍍層之表面設置電鍍層之步驟;於上述電鍍層或/及上述極薄銅層之表面設置抗蝕劑之步驟;對上述抗蝕劑進行曝光,形成電路圖案之步驟;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,將上述極薄銅層及上述無電鍍層及上述電鍍層去除,形成電路之步驟;將上述抗蝕劑去除之步驟。 Therefore, one of the manufacturing methods of the printed wiring board of the present invention using the subtractive method is The method includes the steps of: preparing a copper foil with an insulating substrate and an insulating substrate of the present invention; and stacking the copper foil with the insulating substrate and the insulating substrate; and laminating the copper foil with the insulating substrate and the insulating substrate; a step of peeling off the carrier of the copper foil; a step of providing a perforated or/and a blind hole in the extremely thin copper layer and the insulating substrate exposed by peeling the carrier; and performing desmear treatment on the region containing the perforation and/or the blind hole a step of providing an electroless plating layer on the region containing the perforation or/and the blind via; a step of providing a plating layer on the surface of the electroless plating layer; and providing a resist on the surface of the plating layer or/and the ultra-thin copper layer a step of exposing the resist to form a circuit pattern; removing the ultra-thin copper layer and the electroless plating layer and the plating layer by etching or plasma etching using an acid or the like, a step of forming a circuit; a step of removing the above resist.

於使用減成法的本發明之印刷配線板製造方法之另一實施 形態中,包括如下步驟:準備本發明之附載體銅箔與絕緣基板之步驟;將上述附載體銅箔與絕緣基板積層之步驟;積層上述附載體銅箔與絕緣基板後,將上述附載體銅箔之載體剝離之步驟;於經剝離上述載體而露出之極薄銅層與絕緣基板,設置穿孔或/及盲孔之步驟;對含有上述穿孔或/及盲孔之區域進行除膠渣處理之步驟;對含有上述穿孔或/及盲孔之區域設置無電鍍層之步驟;於上述無電鍍層之表面形成遮罩之步驟;於未形成遮罩之上述無電鍍層之表面設置電鍍層之步驟;於上述電鍍層或/及上述極薄銅層之表面設置抗蝕劑之步驟;對上述抗蝕劑進行曝光,形成電路圖案之步驟;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,將上述極薄銅層及上述無電鍍層去除,形成電路之步驟;將上述抗蝕劑去除之步驟。 Another implementation of the method of manufacturing a printed wiring board of the present invention using a subtractive method The method includes the steps of: preparing a copper foil with an insulating substrate and an insulating substrate of the present invention; and stacking the copper foil with the carrier and the insulating substrate; and laminating the copper foil with the insulating substrate and the insulating substrate a step of peeling off the carrier of the foil; a step of providing a perforated or/and a blind hole in the extremely thin copper layer and the insulating substrate exposed by peeling the carrier; and performing desmear treatment on the region containing the perforation or/and the blind hole a step of providing an electroless plating layer on a region containing the perforated or/and blind via holes; a step of forming a mask on a surface of the electroless plating layer; and a step of providing a plating layer on a surface of the electroless plating layer not having a mask a step of providing a resist on the surface of the plating layer or/and the ultra-thin copper layer; a step of exposing the resist to form a circuit pattern; etching or plasma etching using an acid or the like a step of removing the ultra-thin copper layer and the electroless plating layer to form a circuit; and removing the resist.

設置穿孔或/及盲孔之步驟及其後之除膠渣步驟,亦可不進 行。 The steps of setting the perforation or/and the blind hole and the subsequent desmear step may not Row.

此處,詳細說明使用本發明之附載體銅箔的印刷配線板製造 方法之具體例。再者,此處雖以具有形成有粗化處理層之極薄銅層的附載體銅箔為例進行說明,但並不限於此,使用具有未形成粗化處理層之極薄銅層的附載體銅箔亦可同樣地進行下述之印刷配線板製造方法。 Here, the manufacture of a printed wiring board using the copper foil with a carrier of the present invention will be described in detail. Specific examples of the method. Here, the copper foil with a carrier having the ultra-thin copper layer in which the roughening layer is formed is described as an example, but the invention is not limited thereto, and an ultrathin copper layer having no roughened layer is used. The carrier copper foil can also be similarly produced by the following method of manufacturing a printed wiring board.

首先,準備具有表面形成有粗化處理層之極薄銅層的附載體銅箔(第1層)。 First, a carrier-attached copper foil (first layer) having an extremely thin copper layer having a roughened layer formed on its surface was prepared.

其次,於極薄銅層之粗化處理層上塗佈阻劑,進行曝光、顯影,而將阻劑蝕刻為既定形狀。 Next, a resist is applied onto the roughened layer of the ultra-thin copper layer, exposed, developed, and the resist is etched into a predetermined shape.

其次,形成電路用之鍍敷後,將阻劑去除,藉此形成既定形狀之電路鍍敷。 Next, after the plating for the circuit is formed, the resist is removed, thereby forming a circuit plating of a predetermined shape.

其次,以覆蓋電路鍍敷之方式(掩埋電路鍍敷之方式)於極薄銅層上設置嵌入樹脂而積層樹脂層,繼而使另外之附載體銅箔(第2層)自極薄銅層側接著。 Next, a resin layer is laminated on the ultra-thin copper layer by covering the circuit plating (buried circuit plating), and then another carrier copper foil (the second layer) is attached to the side of the ultra-thin copper layer. then.

其次,自第2層之附載體銅箔剝離載體。 Next, the carrier was peeled off from the carrier copper foil attached to the second layer.

其次,於樹脂層之既定位置進行雷射開孔,使電路鍍敷露出而形成盲孔 Secondly, the laser opening is performed at a predetermined position of the resin layer, so that the circuit plating is exposed to form a blind hole.

其次,向盲孔埋入銅而形成填孔(via fill)。 Next, copper is buried in the blind hole to form a via fill.

其次,於填孔上,以上述方式形成電路鍍敷。 Next, on the hole filling, circuit plating is formed in the above manner.

其次,自第1層附載體銅箔剝離載體。 Next, the carrier was peeled off from the first layer of the carrier-attached copper foil.

其次,藉由快速蝕刻將兩表面之極薄銅層去除,而使樹脂層內之電路鍍敷的表面露出。 Next, the extremely thin copper layer on both surfaces is removed by rapid etching to expose the surface of the circuit plating in the resin layer.

其次,於樹脂層內之電路鍍敷上形成凸塊,於該焊料上形成銅柱(pillar)。以此方式製作使用本發明之附載體銅箔的印刷配線板。 Next, a bump is formed on the circuit plating in the resin layer, and a pillar is formed on the solder. A printed wiring board using the copper foil with a carrier of the present invention was produced in this manner.

上述另外之附載體銅箔(第2層),可使用本發明之附載體 銅箔,亦可使用以往之附載體銅箔,進而可使用通常之銅箔。又,亦可於上述第2層之電路上進而形成1層或複數層之電路,亦可藉由半加成法、減成法、部分加成法或改良半加成法中之任一種方法進行該等之電路形成。 The above additional carrier copper foil (second layer) can be used with the carrier of the present invention As the copper foil, a conventional copper foil with a carrier can be used, and a usual copper foil can be used. Further, a circuit of one layer or a plurality of layers may be further formed on the circuit of the second layer, or may be formed by any one of a semi-additive method, a subtractive method, a partial addition method, or a modified semi-additive method. Perform such circuit formation.

本發明之附載體銅箔較佳以滿足以下(1)之方式控制極薄 銅層表面之色差。於本發明中,所謂「極薄銅層表面之色差」係表示極薄銅層之表面之色差,或於實施有粗化處理等各種表面處理之情形時表示該表面處理層表面之色差。即,本發明之附載體銅箔較佳以滿足以下(1)之方式控制極薄銅層之粗化處理表面之色差。再者,於本發明之表面處理金 屬材中,所謂「粗化處理表面」,係指於粗化處理後,進行用以設置耐熱層、防銹層、耐候性層等之表面處理的情形時,進行該表面處理後之表面處理金屬材(極薄銅層)的表面。又,於表面處理金屬材為附載體銅箔之極薄銅層的情形時,所謂「粗化處理表面」,係指於粗化處理後,進行用以設置耐熱層、防銹層、耐候性層等之表面處理的情形時,進行該表面處理後之極薄銅層的表面。 The copper foil with carrier of the present invention is preferably controlled to be extremely thin in the manner of (1) below. The color difference of the surface of the copper layer. In the present invention, the "chromatic aberration on the surface of the ultra-thin copper layer" means the chromatic aberration on the surface of the ultra-thin copper layer, or the chromatic aberration on the surface of the surface-treated layer when various surface treatments such as roughening treatment are performed. That is, the copper foil with a carrier of the present invention preferably satisfies the following (1) to control the chromatic aberration of the roughened surface of the ultra-thin copper layer. Furthermore, the surface treatment gold of the present invention In the case of the material, the surface of the roughening treatment refers to the surface treatment after the surface treatment such as the heat-resistant layer, the rust-preventing layer, and the weather-resistant layer is performed after the roughening treatment. The surface of a metal material (very thin copper layer). In the case where the surface-treated metal material is an extremely thin copper layer with a carrier copper foil, the term "roughening treatment surface" refers to a heat-resistant layer, a rust-proof layer, and weather resistance after the roughening treatment. In the case of surface treatment of a layer or the like, the surface of the ultra-thin copper layer after the surface treatment is performed.

(1)關於極薄銅層表面之色差,基於JIS Z8730之色差△E*ab為45以上。 (1) Regarding the chromatic aberration of the surface of the ultra-thin copper layer, the color difference ΔE*ab based on JIS Z8730 is 45 or more.

此處,色差△L、△a、△b係分別利用色差計測量,加上黑 /白/紅/綠/黃/藍,使用基於JIS Z8730之L*a*b表色系統進行表示之綜合指標,以△L:白黑、△a:紅綠、△b:黃藍之形式表示。又,△E*ab係使用此等色差以下式表示。 Here, the color difference ΔL, Δa, Δb are measured by a color difference meter, respectively, plus black /white/red/green/yellow/blue, using the L*a*b color system based on JIS Z8730 for comprehensive indicators, in the form of △L: white black, △a: red green, △b: yellow blue Said. Further, ΔE*ab is expressed by the following formula using these chromatic aberrations.

上述之色差可藉由提高形成極薄銅層時之電流密度,降低鍍敷液中之銅濃度,提高鍍敷液之線流速,來進行調整。 The above chromatic aberration can be adjusted by increasing the current density at the time of forming an extremely thin copper layer, lowering the concentration of copper in the plating solution, and increasing the linear flow rate of the plating solution.

又,上述之色差亦可藉由對極薄銅層之表面實施粗化處理來設置粗化處理層,而進行調整。於設置粗化處理層之情形時,可藉由使用含有銅及選自由鎳、鈷、鎢、鉬組成之群中1種以上之元素的電解液,並使電流密度高於以往之電流密度(例如40~60A/dm2),使處理時間短於以往之處理時間(例如0.1~1.3秒),而進行調整。於極薄銅層之表面未設置粗化處理層之情形時,可藉由下述方式來達成:使用將Ni濃度設為其他元素之2 倍以上的鍍浴,用低於以往之電流密度(0.1~1.3A/dm2),並將處理時間(20秒~40秒)設定得較長,而對極薄銅層或耐熱層或防銹層或鉻酸處理層或矽烷偶合處理層之表面進行Ni合金鍍敷(例如Ni-W合金鍍敷、Ni-Co-P合金鍍敷、Ni-Zn合金鍍敷)處理。 Further, the chromatic aberration described above may be adjusted by providing a roughening treatment on the surface of the ultra-thin copper layer to provide a roughened layer. In the case where the roughening treatment layer is provided, an electrolytic solution containing copper and one or more elements selected from the group consisting of nickel, cobalt, tungsten, and molybdenum can be used, and the current density is higher than the conventional current density ( For example, 40~60A/dm 2 ), the processing time is shorter than the previous processing time (for example, 0.1 to 1.3 seconds), and the adjustment is performed. When the roughened layer is not provided on the surface of the ultra-thin copper layer, it can be achieved by using a plating bath having a Ni concentration of twice or more of other elements, and using a current density lower than the conventional one ( 0.1~1.3A/dm 2 ), and the treatment time (20 seconds to 40 seconds) is set longer, and the surface of the ultra-thin copper layer or the heat-resistant layer or the rust-proof layer or the chromic acid treatment layer or the decane coupling treatment layer Ni alloy plating (for example, Ni-W alloy plating, Ni-Co-P alloy plating, and Ni-Zn alloy plating) treatment is performed.

關於極薄銅層表面之色差,若基於JIS Z8730之色差△E* ab為45以上,則例如於附載體銅箔之極薄銅層表面形成電路時,極薄銅層與電路之對比變得鮮明,結果,視認性變良好,而可精度良好地進行電路之位置對準。極薄銅層表面基於JIS Z8730之色差△E*ab較佳為50以上,更佳為55以上,再更佳為60以上。 Regarding the chromatic aberration of the surface of the extremely thin copper layer, if the color difference ΔE* based on JIS Z8730 When the ab is 45 or more, for example, when a circuit is formed on the surface of the ultra-thin copper layer with the carrier copper foil, the contrast between the ultra-thin copper layer and the circuit becomes clear, and as a result, the visibility is improved, and the position of the circuit can be accurately performed. alignment. The surface of the ultra-thin copper layer based on JIS Z8730 has a color difference ΔE*ab of preferably 50 or more, more preferably 55 or more, still more preferably 60 or more.

當以上述方式控制極薄銅層表面之色差的情形時,與電路鍍 敷之對比變得鮮明,視認性變良好。因此,於如上述之印刷配線板之製造步驟中,可精度良好地於既定位置形成電路鍍敷。又,根據如上述之印刷配線板之製造方法,成為電路鍍敷埋入樹脂層之構成,因此,例如於上述藉由快速蝕刻去除極薄銅層時,電路鍍敷受到樹脂層保護,其形狀得以保持,藉此變得容易形成細微電路。又,由於電路鍍敷受到樹脂層保護,因此耐遷移性提高,而良好地抑制電路之配線的導通。因此,變得容易形成細微電路。又,於藉由快速蝕刻去除極薄銅層時,電路鍍敷之露出面成為自樹脂層凹陷之形狀,因此變得容易於該電路鍍敷上形成凸塊,並且變得容易於其上形成銅柱,製造效率提高。 When the chromatic aberration of the surface of the ultra-thin copper layer is controlled in the above manner, The contrast of the dress becomes clear and the visibility becomes good. Therefore, in the manufacturing process of the printed wiring board as described above, circuit plating can be formed accurately at a predetermined position. Further, according to the method for manufacturing a printed wiring board as described above, since the resin layer is embedded in the circuit plating, for example, when the ultra-thin copper layer is removed by rapid etching, the circuit plating is protected by the resin layer, and the shape thereof is protected. It is maintained, whereby it becomes easy to form a fine circuit. Moreover, since the circuit plating is protected by the resin layer, the migration resistance is improved, and the conduction of the wiring of the circuit is satisfactorily suppressed. Therefore, it becomes easy to form a fine circuit. Further, when the ultra-thin copper layer is removed by rapid etching, the exposed surface of the circuit plating becomes a shape recessed from the resin layer, so that it becomes easy to form a bump on the circuit plating, and it becomes easy to form thereon. Copper column, manufacturing efficiency is improved.

再者,嵌入樹脂(RESIN)可使用公知之樹脂、預浸體。例 如,可使用BT(雙順丁烯二醯亞胺三)樹脂或為含浸有BT樹脂之玻璃布的預浸體、Ajinomoto Fine-Techno股份有限公司製ABF膜或ABF。又,前 述嵌入樹脂(樹脂)可使用本說明書記載之樹脂層及/或樹脂及/或預浸體。 Further, as the embedded resin (RESIN), a known resin or a prepreg can be used. For example, BT (bis-s-butylene diimide III) can be used. The resin is a prepreg of a glass cloth impregnated with a BT resin, an ABF film manufactured by Ajinomoto Fine-Techno Co., Ltd., or ABF. Moreover, the resin layer and/or the resin and/or the prepreg described in this specification can be used for the said insert resin (resin).

又,前述被用於第一層之附載體銅箔,在該附載體銅箔之表 面亦可具有基板或樹脂層。被用於第一層之附載體銅箔因具有該基板或樹脂層而會獲得支持,不易產生皺摺,因此具有提升生產性之優點。另,前述基板或樹脂層若為具有支持被用於前述第一層之附載體銅箔的效果者,則可使用所有的基板或樹脂層。例如可使用本案說明書記載之載體、預浸體、樹脂層或公知的載體、預浸體、樹脂層、金屬板、金屬箔、無機化合物之板、無機化合物之箔、有機化合物之板、有機化合物之箔作為前述基板或樹脂層。 Further, the aforementioned copper foil with a carrier used for the first layer, in the form of the copper foil with the carrier The face may also have a substrate or a resin layer. The copper foil with a carrier used for the first layer is supported by the substrate or the resin layer, and wrinkles are less likely to occur, so that productivity is improved. Further, if the substrate or the resin layer has an effect of supporting the copper foil with a carrier to be used for the first layer, all of the substrate or the resin layer can be used. For example, a carrier, a prepreg, a resin layer, or a known carrier, a prepreg, a resin layer, a metal plate, a metal foil, a plate of an inorganic compound, a foil of an inorganic compound, an organic compound plate, or an organic compound described in the present specification can be used. The foil serves as the aforementioned substrate or resin layer.

[實施例] [Examples]

準備厚度18μm之壓延銅箔(JX日礦日石金屬公司製造之C1100)或厚度18μm之電解銅箔,作為實施例1~10及比較例1~6之銅箔基材。 A rolled copper foil (C1100 manufactured by JX Nippon Mining & Metal Co., Ltd.) or an electrolytic copper foil having a thickness of 18 μm having a thickness of 18 μm was prepared as the copper foil substrates of Examples 1 to 10 and Comparative Examples 1 to 6.

其次,於表1~2所示之條件下進行鍍敷,作為表面處理。實施例1~4,係對藉由上述方法所製作之電解銅箔的析出面(Rz 0.6μm)進行表面處理,實施例5~7及比較例1、4~6,則是對上述電解銅箔之轉筒面(Rz 1.5μm)進行表面處理。比較例2、3,係利用不含有調平劑之電解液對所製作之電解銅箔的析出面(Rz 2.0μm)進行表面處理。又,實施例8~10係對控制為既定之表面粗糙度的壓延銅箔進行表面處理。表1表示各鍍敷液1~10之液組成、pH值、溫度、電流密度。表2表示以所記載之浴組成及時間依序進行鍍敷處理1~3。再者,於該鍍敷後藉由Zn、Ni或該等之合金鍍敷、 及鉻酸處理,確保耐熱性,並且藉由塗佈矽烷偶合劑提高剝離強度。 Next, plating was carried out under the conditions shown in Tables 1 and 2 as a surface treatment. In Examples 1 to 4, the surface of the deposited copper foil (Rz 0.6 μm) produced by the above method was subjected to surface treatment, and Examples 5 to 7 and Comparative Examples 1 and 4 to 6 were used for the electrolytic copper. The foil drum surface (Rz 1.5 μm) was surface treated. In Comparative Examples 2 and 3, the deposition surface (Rz 2.0 μm) of the produced electrolytic copper foil was subjected to surface treatment using an electrolytic solution containing no leveling agent. Further, in Examples 8 to 10, the rolled copper foil controlled to have a predetermined surface roughness was subjected to surface treatment. Table 1 shows the liquid composition, pH value, temperature, and current density of each of the plating solutions 1 to 10. Table 2 shows the plating treatments 1 to 3 in the order of the bath composition and time described. Further, after the plating, plating is performed by Zn, Ni or the alloys thereof. And chromic acid treatment to ensure heat resistance, and the peel strength is improved by coating a decane coupling agent.

矽烷偶合劑之塗佈條件如下。 The coating conditions of the decane coupling agent are as follows.

˙3-甲基丙烯醯氧基丙基三甲氧基矽烷 ̇3-methylpropenyloxypropyltrimethoxydecane

˙矽烷濃度:0.6vol%(剩餘部分:水) Decane concentration: 0.6 vol% (remaining part: water)

˙處理溫度:30~40℃ ̇Processing temperature: 30~40°C

˙處理時間:5秒 ̇ Processing time: 5 seconds

˙矽烷處理後之乾燥:100℃×3秒 Drying after decane treatment: 100 ° C × 3 seconds

再者,實施例1、9及下述之實施例11的表面處理相當於平滑鍍敷處理(並非粗化處理之表面處理),除此以外之實施例及比較例中的表面處理相當於粗化處理。 Further, the surface treatments of Examples 1 and 9 and the following Example 11 correspond to a smooth plating treatment (a surface treatment which is not a roughening treatment), and the surface treatments in the examples and comparative examples are equivalent to coarse Processing.

又,準備以下所記載之附載體銅箔作為實施例11~15之基 材。 Further, the copper foil with a carrier described below was prepared as the basis of Examples 11 to 15. material.

於實施例11~13,準備厚度18μm之電解銅箔(JX日礦日石金屬公司製造之HLP箔)作為載體,於實施例14,準備厚度18μm之電解銅箔(JX日礦日石金屬公司製造之JTC箔)作為載體,於實施例15,準備厚度18μm之壓延銅箔(JX日礦日石金屬公司製造之C1100)作為載體。並且,於下述條件下,於實施例11~13,在載體之析出面側的表面形成中間層,於實施例14,在載體之轉筒面(光澤面側)的表面形成中間層,於實施例15,在載體之表面形成中間層。然後,於各實施例中,在中間層之表面形成極薄銅層。再者,載體係於需要之情形時,藉由上述方法,控制形成中間層之側的表面中間層形成前之表面的表面粗糙度Rz與表面積比。 In Examples 11 to 13, an electrolytic copper foil (HLP foil manufactured by JX Nippon Mining & Metal Co., Ltd.) having a thickness of 18 μm was prepared as a carrier, and in Example 14, an electrolytic copper foil having a thickness of 18 μm was prepared (JX Nippon Mining & Metal Co., Ltd.) In the fifteenth embodiment, a rolled copper foil (C1100 manufactured by JX Nippon Mining & Metal Co., Ltd.) having a thickness of 18 μm was prepared as a carrier. Further, under the following conditions, in Examples 11 to 13, an intermediate layer was formed on the surface of the deposition surface side of the carrier, and in Example 14, an intermediate layer was formed on the surface of the rotor surface (gloss surface side) of the carrier. In Example 15, an intermediate layer was formed on the surface of the carrier. Then, in each of the examples, an extremely thin copper layer was formed on the surface of the intermediate layer. Further, when the carrier is required, the surface roughness Rz and the surface area ratio of the surface before the formation of the surface intermediate layer on the side where the intermediate layer is formed are controlled by the above method.

˙實施例11 ̇Example 11

<中間層> <intermediate layer>

(1)Ni層(鍍Ni) (1) Ni layer (Ni plating)

針對載體,以下述條件,於輥對輥型之連續鍍敷線上進行電鍍,藉此形成1000μg/dm2之附著量的Ni層。將具體之鍍敷條件記載於下。 With respect to the carrier, electroplating was performed on a continuous roll line of a roll-to-roll type under the following conditions, thereby forming a Ni layer having an adhesion amount of 1000 μg/dm 2 . The specific plating conditions are described below.

硫酸鎳:270~280g/L Nickel sulfate: 270~280g/L

氯化鎳:35~45g/L Nickel chloride: 35~45g/L

乙酸鎳:10~20g/L Nickel acetate: 10~20g/L

硼酸:30~40g/L Boric acid: 30~40g/L

光澤劑:糖精、丁炔二醇(butynediol)等 Gloss: saccharin, butynediol, etc.

十二基硫酸鈉:55~75ppm Sodium dodecyl sulfate: 55~75ppm

pH值:4~6 pH: 4~6

浴溫:55~65℃ Bath temperature: 55~65°C

電流密度:10A/dm2 Current density: 10A/dm 2

(2)Cr層(電解鉻酸處理) (2) Cr layer (electrolytic chromic acid treatment)

其次,對(1)中所形成之Ni層表面進行水洗及酸洗後,繼而藉由在輥對輥型之連續鍍敷線上,以下述條件,進行電解鉻酸處理,而使11μg/dm2之附著量的Cr層附著於Ni層上。 Next, the surface of the Ni layer formed in (1) was washed with water and pickled, and then subjected to electrolytic chromic acid treatment on a continuous roll line of a roll-to-roll type under the following conditions to obtain 11 μg/dm 2 . The adhesion amount of the Cr layer adheres to the Ni layer.

重鉻酸鉀1~10g/L、鋅0g/L Potassium dichromate 1~10g/L, zinc 0g/L

pH值:7~10 pH: 7~10

液溫:40~60℃ Liquid temperature: 40~60°C

電流密度:2A/dm2 Current density: 2A/dm 2

<極薄銅層> <very thin copper layer>

其次,對(2)中所形成之Cr層表面進行水洗及酸洗後,繼而藉由在輥對輥型之連續鍍敷線上,以下述條件進行電鍍,而於Cr層上形成厚度1.5μm之極薄銅層,製作附載體極薄銅箔。 Next, after the surface of the Cr layer formed in (2) is washed with water and pickled, it is then plated on a continuous roll line of a roll-to-roll type under the following conditions to form a thickness of 1.5 μm on the Cr layer. Very thin copper layer, made of ultra-thin copper foil with carrier.

銅濃度:90~110g/L Copper concentration: 90~110g/L

硫酸濃度:90~110g/L Sulfuric acid concentration: 90~110g/L

氯化物離子濃度:50~90ppm Chloride ion concentration: 50~90ppm

調平劑1(雙(3-磺丙基)二硫化物):10~30ppm Leveling agent 1 (bis(3-sulfopropyl) disulfide): 10~30ppm

調平劑2(胺化合物):10~30ppm Leveling agent 2 (amine compound): 10~30ppm

再者,使用下述胺化合物作為調平劑2。 Further, the following amine compound was used as the leveling agent 2.

(上述化學式中,R1及R2為選自由羥烷基、醚基、芳基、經芳香族取代之烷基、不飽和烴基、烷基組成之群中者)。 (In the above chemical formula, R 1 and R 2 are those selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic-substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group).

電解液溫度:50~80℃ Electrolyte temperature: 50~80°C

電流密度:100A/dm2 Current density: 100A/dm 2

電解液線速度:1.5~5m/sec Electrolyte line speed: 1.5~5m/sec

˙實施例12 ̇Example 12

<中間層> <intermediate layer>

(1)Ni-Mo層(鎳鉬合金鍍敷) (1) Ni-Mo layer (nickel-molybdenum alloy plating)

對載體以下述條件於輥對輥型之連續鍍敷線上進行電鍍,藉此形成3000μg/dm2之附著量的Ni-Mo層。將具體之鍍敷條件記載於下。 The carrier was plated on a continuous roll line of a roll-to-roll type under the following conditions, thereby forming a Ni-Mo layer having an adhesion amount of 3000 μg/dm 2 . The specific plating conditions are described below.

(液組成)硫酸Ni六水合物:50g/dm3、鉬酸鈉二水合物:60g/dm3、檸檬酸鈉:90g/dm3 (liquid composition) sulfuric acid Ni hexahydrate: 50 g/dm 3 , sodium molybdate dihydrate: 60 g/dm 3 , sodium citrate: 90 g/dm 3

(液溫)30℃ (liquid temperature) 30 ° C

(電流密度)1~4A/dm2 (current density) 1~4A/dm 2

(通電時間)3~25秒 (Power-on time) 3~25 seconds

<極薄銅層> <very thin copper layer>

於(1)中所形成之Ni-Mo層上形成極薄銅層。將極薄銅層之厚度設為2μm,除此以外,以與實施例11相同之條件形成極薄銅層。 An extremely thin copper layer is formed on the Ni-Mo layer formed in (1). An extremely thin copper layer was formed under the same conditions as in Example 11 except that the thickness of the ultra-thin copper layer was changed to 2 μm.

˙實施例13 ̇Example 13

<中間層> <intermediate layer>

(1)Ni層(鍍Ni) (1) Ni layer (Ni plating)

以與實施例11相同之條件形成Ni層。 A Ni layer was formed under the same conditions as in Example 11.

(2)有機物層(有機物層形成處理) (2) Organic layer (organic layer formation treatment)

其次,對(1)中所形成之Ni層表面進行水洗及酸洗後,繼而以下述條件,將含有濃度1~30g/L之羧基苯并三唑(CBTA)之液溫40℃且pH值5的水溶液,向Ni層表面進行20~120秒噴霧洗滌,藉此形成有機物層。 Next, after washing the surface of the Ni layer formed in (1) with water and pickling, the liquid temperature of the carboxybenzotriazole (CBTA) having a concentration of 1 to 30 g/L is then 40 ° C and the pH is adjusted under the following conditions. The aqueous solution of 5 was spray-washed to the surface of the Ni layer for 20 to 120 seconds, thereby forming an organic layer.

<極薄銅層> <very thin copper layer>

於(2)中所形成之有機物層上形成極薄銅層。將極薄銅層之厚度設為3μm,除此以外,以與實施例11相同之條件形成極薄銅層。 An extremely thin copper layer is formed on the organic layer formed in (2). An extremely thin copper layer was formed under the same conditions as in Example 11 except that the thickness of the ultra-thin copper layer was changed to 3 μm.

˙實施例14、15 ̇Examples 14, 15

<中間層> <intermediate layer>

(1)Co-Mo層(鈷鉬合金鍍敷) (1) Co-Mo layer (cobalt-molybdenum alloy plating)

對載體以下述條件於輥對輥型之連續鍍敷線上進行電鍍,藉此形成4000μg/dm2之附著量的Co-Mo層。將具體之鍍敷條件記載於下。 The carrier was plated on a continuous roll line of a roll-to-roll type under the following conditions, thereby forming a Co-Mo layer of an adhesion amount of 4000 μg/dm 2 . The specific plating conditions are described below.

(液組成)硫酸Co:50g/dm3、鉬酸鈉二水合物:60g/dm3、檸檬酸鈉:90g/dm3 (liquid composition) sulfuric acid Co: 50 g/dm 3 , sodium molybdate dihydrate: 60 g/dm 3 , sodium citrate: 90 g/dm 3

(液溫)30℃ (liquid temperature) 30 ° C

(電流密度)1~4A/dm2 (current density) 1~4A/dm 2

(通電時間)3~25秒 (Power-on time) 3~25 seconds

<極薄銅層> <very thin copper layer>

於(1)中所形成之Co-Mo層上形成極薄銅層。於實施例14中,將極薄銅層之厚度設為3μm,於實施例15中,將極薄銅層之厚度設為5μm,除此以外,以與實施例11相同之條件形成極薄銅層。 An extremely thin copper layer is formed on the Co-Mo layer formed in (1). In Example 14, the thickness of the ultra-thin copper layer was set to 3 μm, and in the same manner as in Example 15, except that the thickness of the ultra-thin copper layer was set to 5 μm, ultrathin copper was formed under the same conditions as in Example 11. Floor.

針對藉由上述方式所製作之實施例及比較例的各樣品,如下述般進行各種評價。 Each of the samples of the examples and the comparative examples produced in the above manner was subjected to various evaluations as follows.

<附著量之測量> <Measurement of adhesion amount>

關於表面處理層之Cu以外之各種金屬之附著量的測量,係使50mm×50mm之銅箔表面的皮膜溶解於混合有HNO3(2重量%)與HCl(5重量%)之溶液,利用ICP發射光譜分析裝置(精工電子納米科技股份有限公司製造,SFC-3100)對該溶液中之金屬濃度進行定量,而推導算出每單位面積之金屬量(μg/dm2)。此時,以與欲測量之面相反之面的金屬附著量不會 混入之方式,視需要進行遮蔽,來加以分析。再者,測量係針對進行過上述Zn、Co、Ni、Fe或該等之合金鍍敷、及鉻酸處理、進而矽烷偶合處理後的樣品進行。關於表面處理層之Cu附著量的測量,係自100mm×100mm尺寸之表面處理銅箔的重量減去藉由上述方法所測得之上述每單位面積之除Cu以外的各種金屬附著量及表面處理前銅箔之上述每單位面積的重量而求出。 The measurement of the adhesion amount of various metals other than Cu in the surface treatment layer was such that a film of a surface of a copper foil of 50 mm × 50 mm was dissolved in a solution in which HNO 3 (2% by weight) and HCl (5% by weight) were mixed, and ICP was used. The emission spectrum analyzer (manufactured by Seiko Instruments Inc., SFC-3100) quantifies the metal concentration in the solution, and derives the amount of metal per unit area (μg/dm 2 ). At this time, the amount of metal adhesion on the surface opposite to the surface to be measured is not mixed, and is shielded as needed to be analyzed. Further, the measurement system is performed on a sample obtained by performing the above-described Zn, Co, Ni, Fe or alloy plating, chromic acid treatment, and further decane coupling treatment. The measurement of the amount of Cu adhesion of the surface treatment layer is based on the weight of the surface-treated copper foil of a size of 100 mm × 100 mm minus the amount of adhesion of various metals other than Cu and the surface treatment measured by the above method. The weight of the front copper foil per unit area was determined.

<表面粗糙度Rz之測量> <Measurement of Surface Roughness Rz>

使用小阪研究所股份有限公司製造之接觸粗糙度計SP-11,依據JIS B0601-1994,對表面處理面測量十點平均粗糙度(Rz)。於測量基準長度0.8mm、評價長度4mm、截止值0.25mm、輸送速度0.1mm/sec之條件下,改變測量位置進行10次,將10次之測量值的平均值設為表面粗糙度Rz之值。又,對實施例及比較例中所使用之各電解銅箔及壓延銅箔,亦預先對表面處理前之粗糙度Rz進行測量。再者,十點平均粗糙度之測量係針對TD方向(銅箔之寬度方向(與銅箔製造裝置中之銅箔前進方向垂直的方向))進行。 Ten-point average roughness (Rz) was measured on the surface-treated surface using a contact roughness meter SP-11 manufactured by Kosaka Research Institute Co., Ltd. in accordance with JIS B0601-1994. Under the conditions of a measurement reference length of 0.8 mm, an evaluation length of 4 mm, a cutoff value of 0.25 mm, and a conveying speed of 0.1 mm/sec, the measurement position was changed 10 times, and the average value of the measured values of 10 times was set as the value of the surface roughness Rz. . Further, the respective electrolytic copper foils and rolled copper foils used in the examples and the comparative examples were also measured in advance for the roughness Rz before the surface treatment. Further, the measurement of the ten-point average roughness is performed in the TD direction (the width direction of the copper foil (the direction perpendicular to the advancing direction of the copper foil in the copper foil manufacturing apparatus)).

<表面積比之測量> <Measurement of surface area ratio>

關於三維表面積,係使用奧林巴斯股份有限公司製造之雷射顯微鏡LEXT OLS4000(雷射波長405nm,微分干渉方式),對表面處理銅箔之析出面中的二維表面積為66455μm2之區域進行測量。以所測得之三維表面積除以二維表面積所得之值作為表面積比。 Regarding the three-dimensional surface area, a laser microscope LEXT OLS4000 (laser wavelength 405 nm, differential dry method) manufactured by Olympus Co., Ltd. was used to carry out a region having a two-dimensional surface area of 66455 μm 2 in the deposition surface of the surface-treated copper foil. measuring. The value obtained by dividing the measured three-dimensional surface area by the two-dimensional surface area is taken as the surface area ratio.

<傳輸損耗之測量> <Measurement of transmission loss>

將厚度18μm之各樣品與市售之液晶聚合物樹脂(可樂麗股份有限公 司製造之Vecstar CTZ-50μm)貼合後,藉由蝕刻,以特性阻抗成為50Ω之方式形成微波傳輸帶線路,使用HP公司製造之網路分析儀HP8720C測量穿透係數,而求出頻率20GHz下之傳輸損耗。作為頻率20GHz之傳輸損耗的評價,係將未達5.0dB/10cm設為◎,在5.0dB/10cm以上且未達6.0dB/10cm設為○,6.0dB/10cm以上設為×。傳輸損耗之大小由於會受到所使用之樹脂的相對介電常數、介電損耗正切及厚度的影響,故而將對一般用印刷配線板所使用之銅箔(比較例2中所使用之銅箔)具有明顯傳輸損耗降低效果者設為上述判定基準。 Each sample having a thickness of 18 μm and a commercially available liquid crystal polymer resin (Kuraray Co., Ltd. After the Vecstar CTZ-50μm manufactured by the company was bonded, the microstrip line was formed by etching with a characteristic impedance of 50 Ω, and the penetration coefficient was measured using a network analyzer HP8720C manufactured by HP, and the frequency was determined at 20 GHz. Transmission loss. The evaluation of the transmission loss at a frequency of 20 GHz is set to ◎ of less than 5.0 dB/10 cm, ○ of 5.0 dB/10 cm or more and less than 6.0 dB/10 cm, and × of 6.0 dB/10 cm or more. Since the magnitude of the transmission loss is affected by the relative dielectric constant, dielectric loss tangent, and thickness of the resin to be used, the copper foil used in the general printed wiring board (copper foil used in Comparative Example 2) will be used. The one having the significant transmission loss reduction effect is set as the above-described determination criterion.

將試驗結果示於表3。 The test results are shown in Table 3.

(評價結果) (Evaluation results)

關於實施例1~15,表面處理層中之Co、Ni、Fe合計附著量均為1000μg/dm2以下,表面處理層均具有Zn金屬層或含有Zn之合金處理層,表面積比均為1.0~1.9,表面粗糙度Rz JIS均為2.2μm以下。因此,實施例1~15之傳輸損耗均良好地獲得抑制。 In Examples 1 to 15, the total adhesion amount of Co, Ni, and Fe in the surface treatment layer was 1000 μg/dm 2 or less, and the surface treatment layer had a Zn metal layer or an alloy treatment layer containing Zn, and the surface area ratio was 1.0~. 1.9, the surface roughness Rz JIS is 2.2 μm or less. Therefore, the transmission loss of Examples 1 to 15 was well suppressed.

比較例1由於表面積比超過1.9,故傳輸損耗大。 In Comparative Example 1, since the surface area ratio exceeded 1.9, the transmission loss was large.

比較例2由於表面粗糙度Rz JIS超過2.2μm,表面積比超過1.9,故傳輸損耗大。 In Comparative Example 2, since the surface roughness Rz JIS exceeded 2.2 μm and the surface area ratio exceeded 1.9, the transmission loss was large.

比較例3由於表面粗糙度Rz JIS超過2.2μm,故傳輸損耗大。 In Comparative Example 3, since the surface roughness Rz JIS exceeded 2.2 μm, the transmission loss was large.

比較例4~6由於將實施例7之鍍敷處理3變更為含有Co、Ni、Fe者,且表面處理層中之Co、Ni、Fe合計附著量超過1000μg/dm2,故比較例4~6之傳輸損耗大於實施例7。 In Comparative Examples 4 to 6, since the plating treatment 3 of Example 7 was changed to contain Co, Ni, and Fe, and the total adhesion amount of Co, Ni, and Fe in the surface treated layer exceeded 1000 μg/dm 2 , Comparative Example 4 was used. The transmission loss of 6 is greater than that of Embodiment 7.

圖1為表示實施例及比較例之Co、Ni、Fe合計附著量與表面粗糙度Rz之關係的圖表。圖2為表示實施例及比較例之Co、Ni、Fe合計附著量與三維表面積相對於二維表面積之比之關係的圖表。圖3則表示實施例及比較例之Co、Ni、Fe、Cu、Zn合計附著量與傳輸損耗之關係的圖表。 Fig. 1 is a graph showing the relationship between the total amount of adhesion of Co, Ni, and Fe and the surface roughness Rz in the examples and comparative examples. 2 is a graph showing the relationship between the total adhesion amount of Co, Ni, and Fe and the ratio of the three-dimensional surface area to the two-dimensional surface area in the examples and the comparative examples. Fig. 3 is a graph showing the relationship between the total adhesion amount of Co, Ni, Fe, Cu, and Zn and the transmission loss in the examples and comparative examples.

Claims (25)

一種表面處理銅箔,於至少一表面形成有表面處理層,該表面處理層中之Co、Ni、Fe合計附著量為1000μg/dm2以下,該表面處理層具有Zn金屬層或含有Zn之合金處理層,該表面處理層表面利用雷射顯微鏡所測得之三維表面積相對於二維表面積的比為1.0~1.9,至少一表面之表面粗糙度Rz JIS為2.2μm以下。 A surface-treated copper foil having a surface treatment layer formed on at least one surface thereof, wherein a total amount of Co, Ni, and Fe adhered to the surface treatment layer is 1000 μg/dm 2 or less, and the surface treatment layer has a Zn metal layer or an alloy containing Zn In the treatment layer, the surface of the surface treatment layer has a ratio of a three-dimensional surface area measured by a laser microscope to a two-dimensional surface area of 1.0 to 1.9, and at least one surface has a surface roughness Rz JIS of 2.2 μm or less. 如申請專利範圍第1項之表面處理銅箔,其中,該表面處理層中之Co、Ni、Fe合計附著量為500μg/dm2以下。 The surface-treated copper foil according to the first aspect of the invention, wherein the total amount of Co, Ni, and Fe in the surface-treated layer is 500 μg/dm 2 or less. 如申請專利範圍第2項之表面處理銅箔,其中,該表面處理層中之Co、Ni、Fe合計附著量為300μg/dm2以下。 The surface-treated copper foil according to the second aspect of the invention, wherein the total amount of Co, Ni, and Fe adhered to the surface treated layer is 300 μg/dm 2 or less. 如申請專利範圍第3項之表面處理銅箔,其中,該表面處理層中之Co、Ni、Fe合計附著量為0μg/dm2The surface-treated copper foil according to claim 3, wherein a total amount of Co, Ni, and Fe adhered to the surface treated layer is 0 μg/dm 2 . 如申請專利範圍第1項之表面處理銅箔,其中,兩表面之表面粗糙度Rz JIS為2.2μm以下。 The surface-treated copper foil according to the first aspect of the invention, wherein the surface roughness Rz JIS of both surfaces is 2.2 μm or less. 如申請專利範圍第1項之表面處理銅箔,其中,該表面處理層包含粗化處理層。 The surface treated copper foil of claim 1, wherein the surface treatment layer comprises a roughened layer. 如申請專利範圍第6項之表面處理銅箔,其中,該粗化處理層中之Cu附著量為0.10g/dm2以下。 The surface-treated copper foil according to claim 6, wherein the amount of Cu deposited in the roughened layer is 0.10 g/dm 2 or less. 如申請專利範圍第6項之表面處理銅箔,其中,於該表面處理層中,於該粗化處理層上設置有該Zn金屬層或含有Zn之合金處理層。 The surface-treated copper foil according to claim 6, wherein the Zn metal layer or the alloy-containing layer containing Zn is provided on the roughened layer in the surface-treated layer. 如申請專利範圍第1項之表面處理銅箔,其中,該含有Zn之合金處理 層為Cu-Zn合金層。 The surface treated copper foil of claim 1, wherein the alloy containing Zn is treated The layer is a Cu-Zn alloy layer. 如申請專利範圍第1項之表面處理銅箔,其中,該表面處理層中之Zn附著量為5mg/dm2以下。 The surface-treated copper foil according to the first aspect of the invention, wherein the surface-treated layer has a Zn adhesion amount of 5 mg/dm 2 or less. 如申請專利範圍第1項之表面處理銅箔,其中,於該表面處理層中,於該Zn金屬層或含有Zn之合金處理層上設置有鉻酸處理(chromate treatment)層。 The surface-treated copper foil according to claim 1, wherein a chromic treatment layer is provided on the Zn metal layer or the Zn-containing alloy treatment layer in the surface treatment layer. 如申請專利範圍第11項之表面處理銅箔,其中,於該鉻酸處理層上設置有矽烷偶合處理層。 The surface-treated copper foil according to claim 11, wherein a decane coupling treatment layer is provided on the chromic acid treatment layer. 如申請專利範圍第1項之表面處理銅箔,其中,該表面處理層中之Cu、Zn、Co、Ni、Fe合計附著量為0.10g/dm2以下。 The surface-treated copper foil according to the first aspect of the invention, wherein the total amount of Cu, Zn, Co, Ni, and Fe in the surface-treated layer is 0.10 g/dm 2 or less. 如申請專利範圍第1至13項中任一項之表面處理銅箔,其用於軟性印刷配線板。 A surface-treated copper foil according to any one of claims 1 to 13, which is used for a flexible printed wiring board. 如申請專利範圍第1至13項中任一項之表面處理銅箔,其用於5GHz以上之高頻電路基板。 The surface-treated copper foil according to any one of claims 1 to 13, which is used for a high frequency circuit substrate of 5 GHz or more. 一種積層板,係將申請專利範圍第1至13項中任一項之表面處理銅箔與樹脂基板積層而製造。 A laminated board produced by laminating a surface-treated copper foil according to any one of claims 1 to 13 and a resin substrate. 一種印刷配線板,係以申請專利範圍第16項之積層板作為材料。 A printed wiring board is made of a laminate of the 16th article of the patent application. 一種電子機器,使用有申請專利範圍第17項之印刷配線板。 An electronic machine using a printed wiring board of the 17th patent application. 一種附載體銅箔,係於載體之一面或兩面依序具有中間層、極薄銅層,該極薄銅層為申請專利範圍第1至13項中任一項之表面處理銅箔。 A copper foil with a carrier which has an intermediate layer or an extremely thin copper layer on one or both sides of the carrier. The ultra-thin copper layer is a surface-treated copper foil according to any one of claims 1 to 13. 如申請專利範圍第19項之附載體銅箔,其中,於該載體之一面依序具有該中間層、該極薄銅層,於該載體之另一面具有粗化處理層。 The copper foil with a carrier according to claim 19, wherein the intermediate layer and the ultra-thin copper layer are sequentially provided on one side of the carrier, and the roughened layer is provided on the other side of the carrier. 一種積層板,係將申請專利範圍第19或20項之附載體銅箔與樹脂基板積層而製造。 A laminated board produced by laminating a carrier copper foil of claim 19 or 20 with a resin substrate. 一種印刷配線板,係使用申請專利範圍第21項之積層板而製造。 A printed wiring board manufactured by using a laminate of the 21st patent application. 一種電子機器,使用有申請專利範圍第22項之印刷配線板。 An electronic machine using a printed wiring board of the 22nd patent application. 一種印刷配線板之製造方法,包括如下步驟:準備申請專利範圍第19或20項之附載體銅箔與絕緣基板之步驟;將該附載體銅箔與絕緣基板積層之步驟;將該附載體銅箔與絕緣基板積層後,經過將該附載體銅箔之載體剝離的步驟而形成覆金屬積層板,然後,藉由半加成法(semi-additive process)、減成法(subtractive process)、部分加成法(partly additive process)或改良半加成法(modified semi-additive process)中之任一種方法形成電路之步驟。 A manufacturing method of a printed wiring board, comprising the steps of: preparing a copper foil with a carrier and an insulating substrate of claim 19 or 20; and laminating the copper foil with the insulating substrate; After laminating the foil and the insulating substrate, the metal-clad laminate is formed by the step of peeling off the carrier with the carrier copper foil, and then, by a semi-additive process, a subtractive process, a portion A step of forming a circuit by any one of a partial additive process or a modified semi-additive process. 一種印刷配線板之製造方法,包括如下步驟:於申請專利範圍第19或20項之附載體銅箔的該極薄銅層側表面或該載體側表面形成電路之步驟;以掩埋該電路之方式,於該附載體銅箔之該極薄銅層側表面或該載體側表面形成樹脂層之步驟;於該樹脂層上形成電路之步驟;於該樹脂層上形成電路後,將該載體或該極薄銅層剝離之步驟;及將該載體或該極薄銅層剝離後,將該極薄銅層或該載體去除,藉此使形成於該極薄銅層側表面或該載體側表面被該樹脂層掩埋之電路 露出之步驟。 A method of manufacturing a printed wiring board, comprising the steps of: forming a circuit on the side surface of the ultra-thin copper layer of the carrier copper foil of claim 19 or 20 or the side surface of the carrier; and burying the circuit a step of forming a resin layer on the side surface of the ultra-thin copper layer of the carrier copper foil or the side surface of the carrier; a step of forming a circuit on the resin layer; after forming a circuit on the resin layer, the carrier or the a step of peeling off the ultra-thin copper layer; and after peeling off the carrier or the ultra-thin copper layer, removing the ultra-thin copper layer or the carrier, thereby forming the side surface of the ultra-thin copper layer or the side surface of the carrier The circuit layer buried circuit The steps that are exposed.
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