TWI526303B - Surface-processed copper foil, laminated circuit board, carrier copper foil, printed wiring board, printed circuit board, electronic machine and printed wiring board manufacturing method - Google Patents

Surface-processed copper foil, laminated circuit board, carrier copper foil, printed wiring board, printed circuit board, electronic machine and printed wiring board manufacturing method Download PDF

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TWI526303B
TWI526303B TW103101084A TW103101084A TWI526303B TW I526303 B TWI526303 B TW I526303B TW 103101084 A TW103101084 A TW 103101084A TW 103101084 A TW103101084 A TW 103101084A TW I526303 B TWI526303 B TW I526303B
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copper foil
layer
carrier
treated
resin
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TW201438890A (en
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Hideta Arai
Ryo Fukuchi
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Jx Nippon Mining & Metals Corp
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    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/06Wires; Strips; Foils
    • C25D7/0614Strips or foils
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D1/00Electroforming
    • C25D1/04Wires; Strips; Foils
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00Electroplating: Baths therefor
    • C25D3/02Electroplating: Baths therefor from solutions
    • C25D3/12Electroplating: Baths therefor from solutions of nickel or cobalt
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00Electroplating: Baths therefor
    • C25D3/02Electroplating: Baths therefor from solutions
    • C25D3/38Electroplating: Baths therefor from solutions of copper
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D9/00Electrolytic coating other than with metals
    • C25D9/04Electrolytic coating other than with metals with inorganic materials
    • C25D9/08Electrolytic coating other than with metals with inorganic materials by cathodic processes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/0242Structural details of individual signal conductors, e.g. related to the skin effect
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)

Description

表面處理銅箔、積層板、附載體銅箔、印刷配線板、印刷電路板、電子機器及印刷配線板之製造方法 Surface-treated copper foil, laminated board, copper foil with carrier, printed wiring board, printed circuit board, electronic device, and printed wiring board manufacturing method

本發明係關於一種表面處理銅箔、積層板、附載體銅箔、印刷配線板、印刷電路板、電子機器及印刷配線板之製造方法。 The present invention relates to a method of manufacturing a surface-treated copper foil, a laminated board, a copper foil with a carrier, a printed wiring board, a printed circuit board, an electronic device, and a printed wiring board.

印刷配線板於此半世紀取得重大發展,目前幾乎被用於所有電子機器。隨著近年來電子機器之小型化、高性能化需求之增大,搭載零件之高密度構裝化或訊號之高頻化不斷發展,對印刷配線板要求優異之高頻對應。 Printed wiring boards have made significant progress in the past half century and are now used in almost all electronic machines. In recent years, the demand for miniaturization and high performance of electronic devices has increased, and high-density mounting of components and high-frequency signals have been developed, and high-frequency correspondence is required for printed wiring boards.

為了確保輸出訊號之品質,對高頻用基板要求減少傳輸損耗。傳輸損耗主要包括由樹脂(基板側)引起之介電體損耗、及由導體(銅箔側)引起之導體損耗。樹脂之介電常數及介電損耗正切越減小,介電體損耗越減少。於高頻訊號中,導體損耗之主要原因在於:頻率越增高,因電流僅於導體之表面流通的集膚效應而使電流流通之截面積越減少,電阻越增高。 In order to ensure the quality of the output signal, it is required to reduce the transmission loss for the substrate for high frequency. The transmission loss mainly includes dielectric loss caused by the resin (substrate side) and conductor loss caused by the conductor (copper foil side). The dielectric constant and dielectric loss tangent of the resin are reduced, and the dielectric loss is reduced. In the high-frequency signal, the main reason for the conductor loss is that the higher the frequency, the smaller the cross-sectional area of the current flow due to the skin effect of the current flowing only on the surface of the conductor, and the higher the resistance.

作為以減少高頻用銅箔之傳輸損耗為目的的技術,例如於專利文獻1中揭示有一種高頻電路用金屬箔,其於金屬箔表面之單面或雙面被覆銀或銀合金,使銀或銀合金以外之被覆層薄於上述銀或銀合金被覆層的厚度而加於該銀或銀合金被覆層上。並且,記載有藉此可提供一種金屬 箔,其即便於如衛星通訊中所用之超高頻區域中,亦減小由集膚效應導致之損耗。 As a technique for reducing the transmission loss of the high-frequency copper foil, for example, Patent Document 1 discloses a metal foil for a high-frequency circuit which is coated with silver or a silver alloy on one surface or both surfaces of a metal foil surface. A coating layer other than silver or a silver alloy is added to the silver or silver alloy coating layer in a thickness thinner than the thickness of the silver or silver alloy coating layer. Also, it is described that a metal can be provided Foil, which reduces the loss caused by the skin effect even in ultra-high frequency regions such as those used in satellite communications.

又,於專利文獻2中揭示有一種高頻電路用粗化處理壓延銅箔,其特徵在於:壓延銅箔之再結晶退火後之壓延面中之藉由X射線繞射求出之(200)面的積分強度(I(200))相對於微粉末銅之藉由X射線繞射求出之(200)面的積分強度(I0(200)),為I(200)/I0(200)>40,對該壓延面進行利用電鍍之粗化處理後之粗化處理面的算術平均粗糙度(以下,稱為Ra)為0.02μm~0.2μm,十點平均粗糙度(以下,稱為Rz)為0.1μm~1.5μm,其係印刷電路基板用素材。並且,記載有藉此可提供一種可於超過1GHz之高頻下使用之印刷電路板。 Further, Patent Document 2 discloses a roughened copper foil for roughening a high-frequency circuit, which is characterized in that (X) is obtained by X-ray diffraction in a rolling surface after recrystallization annealing of a rolled copper foil. The integral intensity of the surface (I(200)) is the integrated intensity (I 0 (200)) of the (200) plane obtained by X-ray diffraction of the fine powder copper, which is I (200) / I 0 (200 >40, the arithmetic mean roughness (hereinafter referred to as Ra) of the roughened surface after the roughening treatment by the plating of the rolled surface is 0.02 μm to 0.2 μm, and the ten-point average roughness (hereinafter referred to as Rz) is 0.1 μm to 1.5 μm, which is a material for a printed circuit board. Further, it is described that a printed circuit board which can be used at a high frequency exceeding 1 GHz can be provided.

進而,於專利文獻3中揭示有一種電解銅箔,其特徵在於:銅箔之表面之一部分為由瘤狀突起構成的表面粗糙度為2~4μm之凹凸面。並且,記載有藉此可提供一種高頻傳輸特性優異之電解銅箔。 Further, Patent Document 3 discloses an electrolytic copper foil characterized in that one of the surfaces of the copper foil is an uneven surface having a surface roughness of 2 to 4 μm composed of a knob-like projection. Further, it is described that an electrolytic copper foil excellent in high-frequency transmission characteristics can be provided.

[專利文獻1]日本專利第4161304號公報 [Patent Document 1] Japanese Patent No. 4161304

[專利文獻2]日本專利第4704025號公報 [Patent Document 2] Japanese Patent No. 4704025

[專利文獻3]日本特開2004-244656號公報 [Patent Document 3] Japanese Laid-Open Patent Publication No. 2004-244656

已知由導體(銅箔側)引起之導體損耗係如上所述由電阻因集膚效應增大而引起,關於該電阻,不僅具有銅箔本身之電阻的影響,亦具有表面處理層之電阻的影響,該表面處理層之電阻係因為為了確保與樹脂基板之接合性而於銅箔表面進行的粗化處理而形成,具體而言,銅箔表面之粗糙度為導體損耗之主要因素,粗糙度越小,傳輸損耗越減少。 It is known that the conductor loss caused by the conductor (copper foil side) is caused by the increase of the resistance due to the skin effect as described above, and the resistance has not only the influence of the resistance of the copper foil itself but also the resistance of the surface treatment layer. The influence of the surface treatment layer is formed by roughening treatment on the surface of the copper foil in order to ensure adhesion to the resin substrate. Specifically, the roughness of the surface of the copper foil is a main factor of conductor loss, and roughness The smaller the transmission loss, the smaller the transmission loss.

本發明者對銅箔表面之粗糙度與傳輸損耗的關係進一步進 行深入研究,結果發現,未必銅箔表面之粗糙度越小,傳輸損耗越減少,尤其是若銅箔表面之粗糙度減小至某種程度,則傳輸損耗之減少與銅箔表面之粗糙度的關係出現明顯變動,難以僅藉由控制銅箔表面之粗糙度而良好地減少傳輸損耗。 The inventors further advance the relationship between the roughness of the surface of the copper foil and the transmission loss. After intensive research, it was found that the smaller the roughness of the surface of the copper foil, the less the transmission loss, especially if the roughness of the surface of the copper foil is reduced to some extent, the reduction of transmission loss and the roughness of the surface of the copper foil. The relationship has changed significantly, and it is difficult to reduce the transmission loss well by merely controlling the roughness of the surface of the copper foil.

本發明之目的在於提供一種即便用於高頻電路基板亦良好地抑制傳輸損耗之表面處理銅箔、積層板、附載體銅箔、印刷配線板、印刷電路板、電子機器及印刷配線板之製造方法。 An object of the present invention is to provide a surface-treated copper foil, a laminate, a copper foil with a carrier, a printed wiring board, a printed circuit board, an electronic device, and a printed wiring board which are excellent in suppressing transmission loss even when used for a high-frequency circuit board. method.

本發明者對若銅箔表面之粗糙度減小至某種程度,則傳輸損耗之減少與銅箔表面之粗糙度的關係出現明顯變動,難以僅藉由控制銅箔表面之粗糙度而良好地減少傳輸損耗的原因進行了研究,結果發現,銅箔之表面處理金屬種類及其附著量為對傳輸損耗造成影響的其他因素,藉由對該等因素與銅箔表面之粗糙度一同進行控制,可獲得即便用於高頻電路基板亦良好地抑制傳輸損耗之表面處理銅箔。 The inventors of the present invention have a significant change in the relationship between the decrease in transmission loss and the roughness of the surface of the copper foil if the roughness of the surface of the copper foil is reduced to some extent, and it is difficult to control the surface of the copper foil only by controlling the roughness of the surface of the copper foil. The reason for reducing the transmission loss was studied. It was found that the type of metal treated on the surface of the copper foil and its adhesion amount are other factors that affect the transmission loss, and these factors are controlled together with the roughness of the surface of the copper foil. A surface-treated copper foil which satisfactorily suppresses transmission loss even when used for a high-frequency circuit substrate can be obtained.

基於以上之見解而完成之本發明於一態樣係一種表面處理銅箔,其形成有表面處理層,於將x軸設為表面處理層中Co、Ni、Fe、Mo之合計附著量(μg/dm2),將y軸設為表面處理面之表面粗糙度Rz(μm)而繪製的附著量-表面粗糙度圖表中,該表面處理銅箔位於由如下4條直線包圍之區域內,x=0、y=0、y=-0.000189x+1.400000、及y=-0.002333x+9.333333。 The present invention based on the above findings is a surface-treated copper foil formed with a surface treatment layer in which the x-axis is set as the total adhesion amount of Co, Ni, Fe, and Mo in the surface treatment layer (μg). /dm 2 ), in the adhesion amount-surface roughness chart in which the y-axis is set to the surface roughness Rz (μm) of the surface-treated surface, the surface-treated copper foil is located in an area surrounded by the following four lines, x =0, y=0, y=-0.000189x+1.400000, and y=-0.002333x+9.333333.

於本發明之表面處理銅箔之一實施形態中,於上述附著量-表面粗糙度圖表中,其位於由如下4條直線包圍之區域內,x=0、 y=0、y=-0.000183x+1.100000、及y=-0.002200x+7.150000。 In one embodiment of the surface-treated copper foil of the present invention, in the above-mentioned adhesion amount-surface roughness chart, it is located in a region surrounded by the following four straight lines, x=0, y=0, y=-0.000183x+1.100000, and y=-0.002200x+7.150000.

於本發明之表面處理銅箔另一實施形態中,上述表面粗糙度Rz為1.3以下。 In another embodiment of the surface-treated copper foil of the present invention, the surface roughness Rz is 1.3 or less.

於本發明之表面處理銅箔再另一實施形態中,上述表面粗糙度Rz為1.0以下。 In still another embodiment of the surface-treated copper foil of the present invention, the surface roughness Rz is 1.0 or less.

於本發明之表面處理銅箔再另一實施形態中,其係可撓性印刷配線板用。 In still another embodiment of the surface-treated copper foil of the present invention, it is used for a flexible printed wiring board.

於本發明之表面處理銅箔再另一實施形態中,其係5GHz以上之高頻電路基板用。 In still another embodiment of the surface-treated copper foil of the present invention, it is used for a high-frequency circuit substrate of 5 GHz or more.

於本發明之表面處理銅箔再另一實施形態中,其不具有粗化處理層。 In still another embodiment of the surface-treated copper foil of the present invention, it does not have a roughened layer.

於本發明之表面處理銅箔再另一實施形態中,其具有粗化處理層。 In still another embodiment of the surface treated copper foil of the present invention, it has a roughened layer.

於本發明之表面處理銅箔再另一實施形態中,於上述表面處理層之表面具備樹脂層。 In still another embodiment of the surface-treated copper foil of the present invention, a resin layer is provided on the surface of the surface treatment layer.

於本發明之表面處理銅箔再另一實施形態中,上述樹脂層含有介電體。 In still another embodiment of the surface-treated copper foil of the present invention, the resin layer contains a dielectric.

本發明於另一態樣係一種附載體銅箔,其於載體之一面或兩面依序具有中間層及極薄銅層,上述極薄銅層為本發明之表面處理銅箔。 In another aspect, the invention provides a copper foil with a carrier having an intermediate layer and an ultra-thin copper layer on one or both sides of the carrier. The ultra-thin copper layer is the surface-treated copper foil of the present invention.

本發明之附載體銅箔於一實施形態中,於上述載體之一面依序具有上述中間層及上述極薄銅層,於上述載體之另一面具有粗化處理層。 In one embodiment, the copper foil with a carrier of the present invention has the intermediate layer and the ultra-thin copper layer sequentially on one side of the carrier, and has a roughened layer on the other surface of the carrier.

本發明於再另一態樣係一種積層板,其係將本發明之表面處理銅箔與樹脂基板積層而構成。 Still another aspect of the invention is a laminated board comprising a surface-treated copper foil of the present invention and a resin substrate.

本發明於再另一態樣係一種印刷配線板,其使用有本發明之積層板作為材料。 Still another aspect of the invention is a printed wiring board using the laminated board of the invention as a material.

本發明於再另一態樣係一種印刷電路板,其使用有本發明之積層板作為材料。 Still another aspect of the invention is a printed circuit board using the laminate of the present invention as a material.

本發明於再另一態樣係一種電子機器,其使用有本發明之印刷配線板或本發明之印刷電路板。 Still another aspect of the invention is an electronic machine using the printed wiring board of the invention or the printed circuit board of the invention.

本發明於再另一態樣係一種印刷配線板之製造方法,包括如下步驟:準備本發明之附載體銅箔與絕緣基板;將上述附載體銅箔與絕緣基板積層;及於將上述附載體銅箔與絕緣基板積層後,經過剝離上述附載體銅箔之載體的步驟而形成覆銅積層板,然後,藉由半加成法、減成法、部分加成法或改良半加成法中任一方法而形成電路。 According to still another aspect of the present invention, a method of manufacturing a printed wiring board includes the steps of: preparing a copper foil and an insulating substrate with a carrier of the present invention; laminating the copper foil with the carrier and the insulating substrate; After laminating the copper foil and the insulating substrate, the copper-clad laminate is formed by the step of peeling off the carrier with the carrier copper foil, and then, by semi-additive method, subtractive method, partial addition method or modified semi-additive method The circuit is formed by either method.

本發明於再另一態樣係一種印刷配線板之製造方法,包括如下步驟:於本發明之附載體銅箔的上述極薄銅層側表面形成電路;以埋沒上述電路之方式於上述附載體銅箔的上述極薄銅層側表面形成樹脂層;於上述樹脂層上形成電路;於上述樹脂層上形成電路後,將上述載體剝離;及於將上述載體剝離後去除上述極薄銅層,藉此而使形成於上述極薄銅層側表面之埋沒於上述樹脂層的電路露出。 According to still another aspect of the present invention, a method of manufacturing a printed wiring board includes the steps of: forming a circuit on a side surface of the ultra-thin copper layer of the copper foil with carrier of the present invention; and attaching the circuit to the carrier a surface of the copper foil on the side of the ultra-thin copper layer is formed with a resin layer; a circuit is formed on the resin layer; after the circuit is formed on the resin layer, the carrier is peeled off; and after the carrier is peeled off, the ultra-thin copper layer is removed. Thereby, the circuit buried in the resin layer formed on the surface of the ultra-thin copper layer is exposed.

根據本發明,可提供一種即便用於高頻電路基板亦良好地抑制傳輸損耗之表面處理銅箔、積層板、附載體銅箔、印刷配線板、印刷電路板、電子機器及印刷配線板之製造方法。 According to the present invention, it is possible to provide a surface-treated copper foil, a laminate, a copper foil with a carrier, a printed wiring board, a printed circuit board, an electronic device, and a printed wiring board which are excellent in suppressing transmission loss even when used for a high-frequency circuit board. method.

圖1係將x軸設為Co、Ni、Fe、Mo之合計附著量(μg/dm2),將y軸設為表面處理面之表面粗糙度Rz(μm)而繪製之實施例及比較例的附著量-表面粗糙度圖表。 1 is an example and a comparative example in which the x-axis is a total adhesion amount (μg/dm 2 ) of Co, Ni, Fe, and Mo, and the y-axis is a surface roughness Rz (μm) of the surface-treated surface. The amount of adhesion - surface roughness chart.

圖2A~C係使用有本發明之附載體銅箔之印刷配線板之製造方法之具體例的至鍍敷電路、去除阻劑為止之步驟中配線板剖面的模式圖。 2A to 2C are schematic views showing a cross section of a wiring board in a step of plating a circuit and removing a resist in a specific example of a method of manufacturing a printed wiring board with a copper foil with a carrier of the present invention.

圖3D~F係使用有本發明之附載體銅箔之印刷配線板之製造方法之具體例的自積層樹脂及第2層附載體銅箔至雷射開孔為止之步驟中配線板剖面的模式圖。 3D to 3F are patterns of a cross section of the wiring board in the step from the self-laminated resin and the second-layer carrier-attached copper foil to the laser opening using the specific example of the method for producing a printed wiring board with a copper foil with a carrier of the present invention. Figure.

圖4G~I係使用有本發明之附載體銅箔之印刷配線板之製造方法之具體例的自形成通孔填充物至剝離第1層載體為止之步驟中配線板剖面的模式圖。 4G to FIG. 4 are schematic views showing a cross section of the wiring board in the step from the formation of the via filler to the peeling of the first carrier, in a specific example of the method for producing a printed wiring board with a copper foil with a carrier of the present invention.

圖5J~K係使用有本發明之附載體銅箔之印刷配線板之製造方法之具體例的自快速蝕刻(flash etching)至形成凸塊、銅柱為止之步驟中配線板剖面的模式圖。 5J to K are schematic views showing a cross section of the wiring board in a step from flash etching to forming a bump or a copper pillar in a specific example of a method of manufacturing a printed wiring board with a copper foil with a carrier of the present invention.

(銅箔基材) (copper foil substrate)

於本發明中可使用之銅箔基材的形態並無特別限制,典型地可以壓延銅箔或電解銅箔之形態使用。通常,電解銅箔係利用硫酸銅鍍浴於鈦或不鏽鋼之轉筒上,使銅電解析出而製造,壓延銅箔係反覆進行利用壓延輥之塑性加工與熱處理而製造。多數情況下將壓延銅箔應用於要求撓曲性之用途。 The form of the copper foil substrate which can be used in the present invention is not particularly limited, and it can be typically used in the form of a rolled copper foil or an electrolytic copper foil. Usually, the electrolytic copper foil is produced by using a copper sulfate plating bath on a drum of titanium or stainless steel to electrolyze copper, and the rolled copper foil is repeatedly produced by plastic working and heat treatment using a calender roll. Calendered copper foil is used in most cases for applications requiring flexibility.

作為銅箔基材之材料,除通常用作印刷配線板之導體圖案之精銅或無氧銅等高純度的銅以外,例如亦可使用摻Sn銅、摻Ag銅、如添加有Cr、Zr或Mg等銅合金、添加有Ni及Si等卡遜系銅合金之銅合金。再者,於本說明書中,單獨使用術語「銅箔」時,亦包括銅合金箔。 As a material of the copper foil substrate, in addition to high-purity copper such as refined copper or oxygen-free copper which is generally used as a conductor pattern of a printed wiring board, for example, Sn-doped copper, Ag-doped copper, such as Cr, Zr may be used. Or a copper alloy such as Mg or a copper alloy to which a Cason copper alloy such as Ni or Si is added. Further, in the present specification, when the term "copper foil" is used alone, a copper alloy foil is also included.

再者,銅箔基材之板厚無需特別限定,例如為1~1000μm、或為1~500μm、或為1~300μm、或為3~100μm、或為5~70μm、或為6~35μm、 或為9~18μm。 Further, the thickness of the copper foil substrate is not particularly limited, and is, for example, 1 to 1000 μm, or 1 to 500 μm, or 1 to 300 μm, or 3 to 100 μm, or 5 to 70 μm, or 6 to 35 μm. Or it is 9~18μm.

又,本發明於另一態樣係一種附載體銅箔,其依序具有載體、中間層、及極薄銅層,上述極薄銅層為本發明之表面處理銅箔。即,於本發明中於另一態樣可使用依序具有載體、中間層、及極薄銅層之附載體銅箔作為銅箔基材。於本發明中,於使用附載體銅箔之情形時,於極薄銅層表面設置以下之粗化處理層等表面處理層。再者,關於附載體銅箔之另一實施形態,於下文中進行說明。 Further, the present invention is another aspect of the invention, a copper foil with a carrier, which has a carrier, an intermediate layer, and an extremely thin copper layer in this order, and the ultra-thin copper layer is the surface-treated copper foil of the present invention. That is, in the present invention, in another aspect, a copper foil with a carrier having a carrier, an intermediate layer, and an extremely thin copper layer in this order can be used as the copper foil substrate. In the present invention, in the case of using a copper foil with a carrier, a surface treatment layer such as a roughening treatment layer is provided on the surface of the ultra-thin copper layer. Further, another embodiment of the copper foil with a carrier will be described below.

(表面處理層) (surface treatment layer)

於銅箔基材之表面(於使用附載體銅箔之極薄銅層作為銅箔基材的情形時,為極薄銅層之表面),較佳為形成有利用用以確保與樹脂基板之接合性之選自粗化處理、防銹處理、耐熱處理、耐候處理、耐酸性處理、矽烷處理中一種以上之處理的表面處理層。即,如此,本發明之表面處理層係形成於與樹脂之接合面(無光澤面(M面))。粗化處理例如可藉由利用銅或銅合金形成粗化粒子而進行。粗化處理亦可為微細者。又,於粗化處理後,可進行覆蓋鍍敷處理。藉由該等粗化處理、防銹處理、耐熱處理、耐候處理、耐酸性處理、矽烷處理、於處理液中之浸漬處理或鍍敷處理而形成的表面處理層亦可含有選自由Cu、Ni、Fe、Co、Zn、Cr、Mo、W、P、As、Ag、Sn、Ge組成之群中任一單體或任一種以上之合金、或有機物。 On the surface of the copper foil substrate (when the ultra-thin copper layer with the carrier copper foil is used as the copper foil substrate, the surface of the ultra-thin copper layer) is preferably formed to ensure the use with the resin substrate. A surface treatment layer selected from the group consisting of a roughening treatment, a rustproof treatment, a heat treatment treatment, a weather resistance treatment, an acid resistance treatment, and a decane treatment. That is, in this manner, the surface treatment layer of the present invention is formed on the joint surface with the resin (matte surface (M surface)). The roughening treatment can be carried out, for example, by forming roughened particles using copper or a copper alloy. The roughening treatment can also be fine. Further, after the roughening treatment, a cover plating treatment can be performed. The surface treatment layer formed by the roughening treatment, the rustproof treatment, the heat treatment, the weather resistance treatment, the acid resistance treatment, the decane treatment, the immersion treatment in the treatment liquid, or the plating treatment may further contain a layer selected from Cu, Ni. Any one or a combination of any one or more of Fe, Co, Zn, Cr, Mo, W, P, As, Ag, Sn, and Ge.

(附著金屬量及表面粗糙度) (adhesion metal amount and surface roughness)

關於表面處理銅箔,雖表面粗糙度Rz越小,傳輸損耗越減少,但若表面粗糙度Rz減小至某種程度,則比起表面粗糙度,表面處理層中特定之金屬的附著量更明顯地對傳輸損耗造成影響。根據本發明者之研究,可知,此種表面處理金屬種之中,磁導率相對較高且導電率相對較低之Co、Ni、Fe、Mo尤其會對傳輸損耗造成影響。因此,關於本發明之表面處理銅箔,於表面處理層中,係於Co、Ni、Fe、Mo之合計附著量與表面粗糙度Rz之 關係方面被控制。具體而言,實施各種製造步驟,變更表面處理層中Co、Ni、Fe、Mo之合計附著量與表面粗糙度Rz而測定傳輸損耗,結果得知,若為於將x軸設為表面處理層中Co、Ni、Fe、Mo之合計附著量(μg/dm2),將y軸設為表面處理面之表面粗糙度Rz(μm)而繪製之附著量-表面粗糙度圖表中,由如下4條直線:x=0、y=0、y=-0.000189x+1.400000、及y=-0.002333x+9.333333 Regarding the surface-treated copper foil, the smaller the surface roughness Rz is, the smaller the transmission loss is. However, if the surface roughness Rz is reduced to some extent, the amount of adhesion of a specific metal in the surface treatment layer is greater than the surface roughness. Significantly affect the transmission loss. According to the study by the present inventors, it is understood that among such surface-treated metal species, Co, Ni, Fe, and Mo having relatively high magnetic permeability and relatively low conductivity have an influence on transmission loss. Therefore, the surface-treated copper foil of the present invention is controlled in the surface treatment layer in terms of the total adhesion amount of Co, Ni, Fe, and Mo and the surface roughness Rz. Specifically, various manufacturing steps were carried out, and the total adhesion amount of Co, Ni, Fe, and Mo in the surface treatment layer and the surface roughness Rz were measured to measure the transmission loss. As a result, it was found that the x-axis was set as the surface treatment layer. The total adhesion amount (μg/dm 2 ) of Co, Ni, Fe, and Mo, and the y-axis is the surface roughness Rz (μm) of the surface-treated surface, and the adhesion amount-surface roughness chart is drawn as follows: Straight line: x=0, y=0, y=-0.000189x+1.400000, and y=-0.002333x+9.333333

包圍之區域內進行控制之銅箔,則即便用於高頻電路基板亦良好地抑制傳輸損耗。 The copper foil that is controlled in the surrounding area satisfactorily suppresses transmission loss even when used for a high-frequency circuit board.

關於本發明之表面處理銅箔,由於Co、Ni、Fe、Mo之合計附著量與表面粗糙度Rz位於藉由上述4條直線包圍之區域內,因此即便用於例如較佳為5GHz以上、更佳為20GHz以上之高頻電路基板,亦可將傳輸損耗抑制為4dB/10cm以下之非常小的值。 In the surface-treated copper foil of the present invention, since the total adhesion amount of Co, Ni, Fe, and Mo and the surface roughness Rz are in a region surrounded by the above four straight lines, it is preferably used for, for example, 5 GHz or more. The high-frequency circuit board of 20 GHz or more can also suppress the transmission loss to a very small value of 4 dB/10 cm or less.

將該區域示於圖1之附著量-表面粗糙度圖表中。根據圖1可知,Co、Ni、Fe、Mo之合計附著量於與表面粗糙度Rz之關係方面,係以相對於減少表面粗糙度Rz而使其增加之方式進行控制,但並非單純地固定地增加,而係以自附著量3700μg/dm2附近使增加之比例下降的方式進行控制。 This area is shown in the adhesion amount-surface roughness chart of Fig. 1. As can be seen from Fig. 1, the total adhesion amount of Co, Ni, Fe, and Mo is controlled so as to increase the relationship with the surface roughness Rz with respect to the surface roughness Rz, but it is not simply fixed. The increase was controlled in such a manner that the ratio of increase was decreased in the vicinity of the self-adhesion amount of 3700 μg/dm 2 .

又,本發明之表面處理銅箔於上述附著量-表面粗糙度圖表中,較佳為於由如下4條直線包圍之區域內進行控制,x=0、y=0、y=-0.000183x+1.100000、及y=-0.002200x+7.150000。 Further, in the above-described adhesion amount-surface roughness chart, the surface-treated copper foil of the present invention is preferably controlled in a region surrounded by four straight lines, x=0, y=0, y=-0.000183x+ 1.100000, and y=-0.002200x+7.150000.

又,規定該區域之4條直線之中,直線x=0亦可為x=1、3、5、10、或100之各直線。 Further, among the four straight lines defining the region, the straight line x=0 may be a straight line of x=1, 3, 5, 10, or 100.

進而,規定該區域之4條直線之中,直線y=0亦可為y=0.001、0.01、0.05、0.10、0.20、或0.30之各直線。 Further, among the four straight lines defining the region, the straight line y=0 may be a straight line of y=0.001, 0.01, 0.05, 0.10, 0.20, or 0.30.

再者,於Co、Ni、Fe、Mo之合計附著量之值大的情形時,亦具有耐熱性、耐候性、耐酸性等更優異之效果。 In addition, when the value of the total adhesion amount of Co, Ni, Fe, and Mo is large, it is more excellent in heat resistance, weather resistance, acid resistance, and the like.

於表面粗糙度Rz之值大的情形時,亦具有剝離強度進一步增高之效果。 When the value of the surface roughness Rz is large, the peel strength is further increased.

又,本發明之表面處理銅箔於上述附著量-表面粗糙度圖表中,較佳為於由如下4條直線包圍之區域內進行控制,x=0、y=0、y=-0.000189x+1.400000、及x=445。於Co、Ni、Fe、Mo之合計附著量之值小的情形時,即便未將Rz設為如此小之值,亦具有傳輸損耗小之效果。又,Ni對鹼蝕刻性造成不良影響,故而如此於Ni之附著量成為445μg/dm2以下之情形時,鹼蝕刻性變良好,故而較佳。就提高鹼蝕刻性之觀點而言,上述直線x=445進而較佳為x=400,更佳為x=350,更佳為x=300,更佳為x=250,更佳為x=200。 Further, in the above-described adhesion amount-surface roughness chart, the surface-treated copper foil of the present invention is preferably controlled in a region surrounded by four straight lines, x=0, y=0, y=-0.000189x+ 1.400000, and x=445. When the value of the total adhesion amount of Co, Ni, Fe, and Mo is small, even if Rz is not set to such a small value, the transmission loss is small. Further, since Ni has an adverse effect on the alkali etching property, when the adhesion amount of Ni is 445 μg/dm 2 or less, the alkali etching property is improved, which is preferable. From the viewpoint of improving the alkali etching property, the above straight line x = 445 and further preferably x = 400, more preferably x = 350, more preferably x = 300, more preferably x = 250, more preferably x = 200. .

又,本發明之表面處理銅箔於上述附著量-表面粗糙度圖表中,較佳為於由如下4條直線包圍之區域內進行控制,x=0、y=0、y=-0.000183x+1.100000、及x=445。於Co、Ni、Fe、Mo之合計附著量之值小的情形時,即便未將Rz設為如此小之值,亦具有傳輸損耗小之效果。又,Ni對鹼蝕刻性造成不 良影響,故而如此於Ni之附著量成為445μg/dm2以下之情形時,鹼蝕刻性變良好,故而較佳。就提高鹼蝕刻性之觀點而言,上述直線x=445更佳為x=400,進而較佳為x=350,更佳為x=300,更佳為x=250,更佳為x=200。 Further, in the above-described adhesion amount-surface roughness chart, the surface-treated copper foil of the present invention is preferably controlled in a region surrounded by four straight lines, x=0, y=0, y=-0.000183x+ 1.100000, and x=445. When the value of the total adhesion amount of Co, Ni, Fe, and Mo is small, even if Rz is not set to such a small value, the transmission loss is small. Further, since Ni has an adverse effect on the alkali etching property, when the adhesion amount of Ni is 445 μg/dm 2 or less, the alkali etching property is improved, which is preferable. From the viewpoint of improving the alkali etching property, the above straight line x = 445 is more preferably x = 400, further preferably x = 350, more preferably x = 300, still more preferably x = 250, more preferably x = 200. .

又,本發明之表面處理銅箔於上述附著量-表面粗糙度圖表中,較佳為於由如下4條直線包圍之區域內進行控制,x=3010、y=0、y=-0.000189x+1.400000、及y=-0.002333x+9.333333。 Further, in the above-described adhesion amount-surface roughness chart, the surface-treated copper foil of the present invention is preferably controlled in a region surrounded by four straight lines, x=3010, y=0, y=-0.000189x+ 1.400000, and y=-0.002333x+9.333333.

於Co、Ni、Fe、Mo之合計附著量之值大的情形時,具有提高耐化學品性之效果。 When the value of the total adhesion amount of Co, Ni, Fe, and Mo is large, the effect of improving chemical resistance is obtained.

又,本發明之表面處理銅箔於上述附著量-表面粗糙度圖表中,較佳為於由如下3條直線包圍之區域內進行控制,即,X=3010、y=0、及y=-0.002200x+7.150000。 Further, in the above-described adhesion amount-surface roughness chart, the surface-treated copper foil of the present invention is preferably controlled in a region surrounded by three straight lines, that is, X = 3010, y = 0, and y = - 0.002200x+7.150000.

於Co、Ni、Fe、Mo之合計附著量之值大的情形時,具有提高耐化學品性之效果。 When the value of the total adhesion amount of Co, Ni, Fe, and Mo is large, the effect of improving chemical resistance is obtained.

若表面粗糙度Rz為上述區域內,則並無特別限定,為了進一步抑制傳輸損耗,較佳為控制在1.3μm以下,更佳為控制在1.0μm以下,更佳為控制在0.9μm以下,更佳為控制為0.8μm以下,更佳為控制為0.7μm以下,更佳為控制為0.6μm以下。 When the surface roughness Rz is in the above region, it is not particularly limited, and in order to further suppress transmission loss, it is preferably controlled to 1.3 μm or less, more preferably 1.0 μm or less, and even more preferably 0.9 μm or less. The control is preferably 0.8 μm or less, more preferably 0.7 μm or less, and even more preferably 0.6 μm or less.

(表面處理銅箔之製造方法) (Manufacturing method of surface-treated copper foil)

於本發明中,為了於銅箔基材(壓延銅箔或電解銅箔或附載體銅箔之 極薄銅層)與樹脂基材接合之面,提高積層後之銅箔的剝離強度,較佳為實施對脫脂後之銅箔之表面進行瘤狀之電鍍的粗化處理。通常之電解銅箔於製造時具有凹凸,藉由粗化處理增強電解銅箔之凸部,而進一步增大凹凸。壓延銅箔、或藉由含有調平劑之硫酸銅電解液製造的雙面平坦電解銅箔、或附載體銅箔的表面較通常之電解銅箔之析出面的表面平滑。藉由對該平滑之表面進行特定之條件下之粗化處理,可形成微細之凹凸。於本發明中,該粗化處理可藉由例如選自由Cu、Ni、Fe、Co、Zn、Cr、Mo、W、P、As、Ag、Sn、Ge組成之群中任一單體或任一種以上之合金的鍍敷、或利用有機物之表面處理等而進行。有進行通常之鍍銅等作為粗化前之預處理的情況,於粗化後,作為表面處理,亦有為了賦予耐熱性、耐化學品性而藉由上述金屬進行覆蓋鍍敷之情況。再者,亦可不進行粗化處理,而進行選自由Cu、Ni、Fe、Co、Zn、Cr、Mo、W、P、As、Ag、Sn、Ge組成之群中任一單體或任一種以上之合金的鍍敷。然後,作為表面處理,亦有為了賦予耐熱性、耐化學品性而藉由上述金屬進行覆蓋鍍敷之情況。於進行粗化處理之情形時,具有與樹脂之密接強度增高的優點。又,於未進行粗化處理之情形時,由於表面處理銅箔之製造步驟經簡化,因此具有可提高生產性,可減少成本,又,可減小粗糙度之優點。藉由調整此種銅箔表面之鍍敷處理的液體組成、鍍敷時間、電流密度,可控制本發明之表面處理層中Co、Ni、Fe、Mo之合計附著量(μg/dm2)與表面處理面之表面粗糙度Rz(μm)的關係。 In the present invention, in order to increase the peeling strength of the copper foil after lamination, in order to increase the peeling strength of the copper foil after lamination, the copper foil substrate (the ultra-thin copper layer of the rolled copper foil or the electrolytic copper foil or the copper foil with the carrier) is bonded to the resin substrate. In order to carry out the roughening treatment of the surface of the copper foil after degreasing. In general, the electrolytic copper foil has irregularities at the time of manufacture, and the convex portion of the electrolytic copper foil is reinforced by the roughening treatment to further increase the unevenness. The surface of the rolled copper foil or the double-sided flat electrolytic copper foil or the copper foil with a carrier prepared by the copper sulfate electrolyte containing a leveling agent is smoother than the surface of the deposition surface of the usual electrolytic copper foil. Fine irregularities can be formed by subjecting the smoothed surface to a roughening treatment under specific conditions. In the present invention, the roughening treatment may be performed by, for example, any one selected from the group consisting of Cu, Ni, Fe, Co, Zn, Cr, Mo, W, P, As, Ag, Sn, and Ge. The plating of one or more alloys or the surface treatment of an organic substance or the like is performed. In the case where normal copper plating or the like is used as the pre-treatment before roughening, after the roughening, as the surface treatment, the metal may be coated with the metal in order to impart heat resistance and chemical resistance. Further, any one or a group selected from the group consisting of Cu, Ni, Fe, Co, Zn, Cr, Mo, W, P, As, Ag, Sn, and Ge may be used without performing the roughening treatment. Plating of the above alloys. Then, as the surface treatment, there is a case where the metal is coated by plating in order to impart heat resistance and chemical resistance. In the case of roughening treatment, there is an advantage that the adhesion strength to the resin is increased. Further, in the case where the roughening treatment is not performed, since the manufacturing steps of the surface-treated copper foil are simplified, the productivity can be improved, the cost can be reduced, and the roughness can be reduced. By adjusting the liquid composition, plating time and current density of the plating treatment on the surface of the copper foil, the total adhesion amount (μg/dm 2 ) of Co, Ni, Fe, and Mo in the surface treatment layer of the present invention can be controlled. The relationship between the surface roughness Rz (μm) of the surface treated surface.

再者,為了控制表面處理銅箔之表面處理面的表面粗糙度Rz(μm),預先控制表面處理前之銅箔(銅箔基材)之處理側之表面的TD的粗糙度(Rz)及光澤度亦為重要。具體而言,表面處理前之銅箔之TD的表面粗糙度(Rz)為0.20~0.80μm,較佳為0.20~0.50μm,壓延方向(MD)在入射角60度之光澤度為350~800%,較佳為500~800%,進而若較習知 之表面處理提高電流密度,並縮短表面處理時間,則可減小進行表面處理後的表面粗糙度Rz。作為此種銅箔,可藉由如下方法而製作,即,調整壓延油之油膜當量而進行壓延(高光澤壓延)、或進行如化學蝕刻之化學研磨或磷酸溶液中之電解研磨、又,添加特定之添加劑而製造電解銅箔。如此,將處理前之銅箔之TD的表面粗糙度(Rz)與光澤度設為上述範圍,藉此可易於控制處理後之銅箔的表面粗糙度(Rz)。 Further, in order to control the surface roughness Rz (μm) of the surface-treated surface of the surface-treated copper foil, the TD roughness (Rz) of the surface of the treated side of the copper foil (copper foil substrate) before surface treatment is controlled in advance and Gloss is also important. Specifically, the surface roughness (Rz) of the TD of the copper foil before the surface treatment is 0.20 to 0.80 μm, preferably 0.20 to 0.50 μm, and the gloss of the rolling direction (MD) at an incident angle of 60 degrees is 350 to 800. %, preferably 500~800%, and if more conventional The surface treatment increases the current density and shortens the surface treatment time, thereby reducing the surface roughness Rz after the surface treatment. Such a copper foil can be produced by subjecting an oil film equivalent of a rolling oil to rolling (high gloss rolling), chemical polishing such as chemical etching, or electrolytic polishing in a phosphoric acid solution, and adding An electrolytic copper foil is produced by using a specific additive. Thus, the surface roughness (Rz) and the glossiness of the TD of the copper foil before the treatment are set to the above range, whereby the surface roughness (Rz) of the copper foil after the treatment can be easily controlled.

又,關於表面處理前之銅箔,MD之60度光澤度較佳為500~800%,更佳為501~800%,更佳為510~750%。若表面處理前之銅箔之MD的60度光澤度未達500%,則有Rz高於500%以上的情形之虞,若超過800%,則有產生難以製造的問題之虞。 Further, regarding the copper foil before the surface treatment, the 60 degree gloss of MD is preferably from 500 to 800%, more preferably from 501 to 800%, still more preferably from 510 to 750%. If the 60-degree gloss of the MD of the copper foil before the surface treatment is less than 500%, there is a case where Rz is higher than 500%, and if it exceeds 800%, there is a problem that it is difficult to manufacture.

再者,高光澤壓延可藉由將以下之式中規定之油膜當量設為13000~18000而進行。 Further, the high gloss rolling can be carried out by setting the oil film equivalent specified in the following formula to 13,000 to 18,000.

油膜當量={(壓延油黏度[cSt])×(穿透速度[mpm]+輥周邊速度[mpm])}/{(輥之咬入角[rad])×(材料之降伏應力[kg/mm2])} Oil film equivalent = {(calendering oil viscosity [cSt]) × (penetration speed [mpm] + roll peripheral speed [mpm])} / {(roller bite angle [rad]) × (material's lodging stress [kg / Mm 2 ])}

壓延油黏度[cSt]為40℃之動黏度。 The rolling oil viscosity [cSt] is a dynamic viscosity of 40 °C.

為了將油膜當量設為13000~18000,只要使用低黏度之壓延油,或使用減緩穿透速度等公知之方法即可。 In order to set the oil film equivalent to 13,000 to 18,000, it is sufficient to use a low-viscosity rolling oil or a known method such as slowing the penetration speed.

又,表面粗糙度Rz以及光澤度成為上述範圍之電解銅箔可藉由以下方法製作。 Further, the electrolytic copper foil having the surface roughness Rz and the glossiness within the above range can be produced by the following method.

<電解液組成> <electrolyte composition>

銅:90~110g/L Copper: 90~110g/L

硫酸:90~110g/L Sulfuric acid: 90~110g/L

氯:50~100ppm. Chlorine: 50~100ppm.

調平劑1(雙(3-磺丙基)二硫化物):10~30ppm Leveling agent 1 (bis(3-sulfopropyl) disulfide): 10~30ppm

調平劑2(胺化合物):10~30ppm Leveling agent 2 (amine compound): 10~30ppm

上述胺化合物可使用以下之化學式的胺化合物。 As the above amine compound, an amine compound of the following chemical formula can be used.

(上述化學式中,R1及R2係選自由羥烷基、醚基、芳基、芳香族取代烷基、不飽和烴基、烷基組成之一群中者) (In the above chemical formula, R 1 and R 2 are selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group)

<製造條件> <Manufacturing conditions>

電流密度:70~100A/dm2 Current density: 70~100A/dm 2

電解液溫度:50~60℃ Electrolyte temperature: 50~60°C

電解液線速度:3~5m/sec Electrolyte line speed: 3~5m/sec

電解時間:0.5~10分鐘(根據析出之銅厚、電流密度進行調整) Electrolysis time: 0.5~10 minutes (adjusted according to copper thickness and current density)

[附載體銅箔] [with carrier copper foil]

作為本發明另一實施形態之附載體銅箔於載體之一面或兩面,依序具有中間層、及極薄銅層。並且,上述極薄銅層為上述本發明一實施形態之表面處理銅箔。 The copper foil with a carrier according to another embodiment of the present invention has an intermediate layer and an ultra-thin copper layer on one or both sides of the carrier. Further, the ultra-thin copper layer is the surface-treated copper foil according to the embodiment of the present invention.

<載體> <carrier>

可於本發明中使用之載體典型地為金屬箔或樹脂膜,例如係以銅箔、銅合金箔、鎳箔、鎳合金箔、鐵箔、鐵合金箔、不鏽鋼箔、鋁箔、鋁合金箔、絕緣樹脂膜(例如聚醯亞胺膜、液晶聚合物(LCP)膜、聚對苯二甲酸乙二酯(PET)膜、聚醯胺膜、聚酯膜、氟樹脂膜等)之形態提供。 The carrier which can be used in the present invention is typically a metal foil or a resin film, for example, a copper foil, a copper alloy foil, a nickel foil, a nickel alloy foil, an iron foil, a ferroalloy foil, a stainless steel foil, an aluminum foil, an aluminum alloy foil, and an insulation. A resin film (for example, a polyimide film, a liquid crystal polymer (LCP) film, a polyethylene terephthalate (PET) film, a polyamide film, a polyester film, a fluororesin film, or the like) is provided.

作為可於本發明中使用之載體,較佳為使用銅箔。其原因在於:銅箔 由於導電率高,故而容易形成其後之中間層、極薄銅層。載體典型地以壓延銅箔或電解銅箔之形態提供。通常,電解銅箔係利用硫酸銅鍍浴於鈦或不鏽鋼之轉筒上,使銅電解析出而製造,壓延銅箔係反覆進行利用壓延輥之塑性加工與熱處理而製造。作為銅箔之材料,除精銅或無氧銅等高純度之銅以外,例如亦可使用摻Sn銅、摻Ag銅、如添加有Cr、Zr或Mg等銅合金、添加有Ni及Si等卡遜系銅合金之銅合金。 As the carrier which can be used in the present invention, copper foil is preferably used. The reason is: copper foil Since the electrical conductivity is high, it is easy to form an intermediate layer and an extremely thin copper layer thereafter. The carrier is typically provided in the form of a rolled copper foil or an electrolytic copper foil. Usually, the electrolytic copper foil is produced by using a copper sulfate plating bath on a drum of titanium or stainless steel to electrolyze copper, and the rolled copper foil is repeatedly produced by plastic working and heat treatment using a calender roll. As a material of the copper foil, in addition to high-purity copper such as refined copper or oxygen-free copper, for example, Sn-doped copper, Ag-doped copper, copper alloy such as Cr, Zr or Mg, or Ni and Si may be added. Caston copper alloy copper alloy.

對本發明中可使用之載體的厚度亦並無特別限制,只要適當調節為於發揮作為載體之作用方面適合的厚度即可,例如可設為5μm以上。但是,若過厚則生產成本增高,因此通常較佳為設為35μm以下。因此,載體之厚度典型地為12~70μm,更典型地為18~35μm。 The thickness of the carrier which can be used in the present invention is not particularly limited, and may be appropriately adjusted to exhibit a thickness suitable as a carrier, and may be, for example, 5 μm or more. However, if the production cost is increased if it is too thick, it is usually preferably 35 μm or less. Therefore, the thickness of the carrier is typically from 12 to 70 μm, more typically from 18 to 35 μm.

又,關於本發明中使用之載體,可藉由以如下方式控制形成有中間層之側的表面粗糙度Rz以及光澤度,而控制進行了表面處理後之極薄銅層表面的表面粗糙度Rz以及光澤度。 Further, with respect to the carrier used in the present invention, the surface roughness Rz of the surface of the extremely thin copper layer subjected to the surface treatment can be controlled by controlling the surface roughness Rz and the glossiness of the side on which the intermediate layer is formed in the following manner. And gloss.

對本發明中使用之載體,預先控制中間層形成前之載體其形成有中間層之側之表面之TD的粗糙度(Rz)及光澤度亦為重要。具體而言,中間層形成前之載體之TD的表面粗糙度(Rz)為0.20~0.80μm,較佳為0.20~0.50μm,壓延方向(MD)在入射角60度之光澤度為350~800%,較佳為500~800%。作為此種銅箔,可藉由如下方法而製作,即,調整壓延油之油膜當量而進行壓延(高光澤壓延)、或進行如化學蝕刻之化學研磨或磷酸溶液中之電解研磨、又,添加特定之添加劑而製造電解銅箔。如此,將處理前之銅箔之TD的表面粗糙度(Rz)與光澤度設為上述範圍,藉此可易於控制處理後之銅箔的表面粗糙度(Rz)。 For the carrier used in the present invention, it is also important to control the roughness (Rz) and gloss of the TD of the surface on the side on which the intermediate layer is formed in advance before the formation of the intermediate layer. Specifically, the surface roughness (Rz) of the TD of the carrier before the formation of the intermediate layer is 0.20 to 0.80 μm, preferably 0.20 to 0.50 μm, and the gloss of the rolling direction (MD) at an incident angle of 60 degrees is 350 to 800. %, preferably 500 to 800%. Such a copper foil can be produced by subjecting an oil film equivalent of a rolling oil to rolling (high gloss rolling), chemical polishing such as chemical etching, or electrolytic polishing in a phosphoric acid solution, and adding An electrolytic copper foil is produced by using a specific additive. Thus, the surface roughness (Rz) and the glossiness of the TD of the copper foil before the treatment are set to the above range, whereby the surface roughness (Rz) of the copper foil after the treatment can be easily controlled.

又,關於中間層形成前之載體,MD之60度光澤度較佳為500~800%,更佳為501~800%,更佳為510~750%。若表面處理前之銅箔之MD的60度光澤度未達500%,則有Rz高於500%以上的情形之虞,若超 過800%,則有產生難以製造的問題之虞。 Further, regarding the carrier before the formation of the intermediate layer, the 60 degree gloss of MD is preferably from 500 to 800%, more preferably from 501 to 800%, still more preferably from 510 to 750%. If the 60-degree gloss of the MD of the copper foil before the surface treatment is less than 500%, there is a case where the Rz is higher than 500%. After 800%, there is a problem that is difficult to manufacture.

再者,高光澤壓延可藉由將以下之式中規定之油膜當量設為13000~18000而進行。 Further, the high gloss rolling can be carried out by setting the oil film equivalent specified in the following formula to 13,000 to 18,000.

油膜當量={(壓延油黏度[cSt])×(穿透速度[mpm]+輥周邊速度[mpm])}/{(輥之咬入角[rad])×(材料之降伏應力[kg/mm2])} Oil film equivalent = {(calendering oil viscosity [cSt]) × (penetration speed [mpm] + roll peripheral speed [mpm])} / {(roller bite angle [rad]) × (material's lodging stress [kg / Mm 2 ])}

壓延油黏度[cSt]為40℃之動黏度。 The rolling oil viscosity [cSt] is a dynamic viscosity of 40 °C.

為了將油膜當量設為13000~18000,只要使用低黏度之壓延油,或使用減緩穿透速度等公知之方法即可。 In order to set the oil film equivalent to 13,000 to 18,000, it is sufficient to use a low-viscosity rolling oil or a known method such as slowing the penetration speed.

又,表面粗糙度Rz以及光澤度成為上述範圍之電解銅箔可藉由以下方法而製作。可使用該電解銅箔作為載體。 Further, the electrodeposited copper foil having the surface roughness Rz and the glossiness within the above range can be produced by the following method. The electrolytic copper foil can be used as a carrier.

<電解液組成> <electrolyte composition>

銅:90~110g/L Copper: 90~110g/L

硫酸:90~110g/L Sulfuric acid: 90~110g/L

氯:50~100ppm Chlorine: 50~100ppm

調平劑1((雙(3-磺丙基)二硫化物):10~30ppm Leveling agent 1 ((bis(3-sulfopropyl) disulfide): 10~30ppm

調平劑2(胺化合物):10~30ppm Leveling agent 2 (amine compound): 10~30ppm

上述胺化合物可使用以下之化學式的胺化合物。 As the above amine compound, an amine compound of the following chemical formula can be used.

(上述化學式中,R1及R2係選自由羥烷基、醚基、芳基、芳香族取代烷 基、不飽和烴基、烷基組成之一群中者) (In the above chemical formula, R 1 and R 2 are selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group)

<製造條件> <Manufacturing conditions>

電流密度:70~100A/dm2 Current density: 70~100A/dm 2

電解液溫度:50~60℃ Electrolyte temperature: 50~60°C

電解液線速度:3~5m/sec Electrolyte line speed: 3~5m/sec

電解時間:0.5~10分鐘(根據析出之銅厚、電流密度進行調整) Electrolysis time: 0.5~10 minutes (adjusted according to copper thickness and current density)

再者,亦可於與載體之設置有極薄銅層之側的表面為相反側的表面設置粗化處理層。可使用公知之方法設置該粗化處理層,亦可藉由上述粗化處理而設置。於與載體之設置有極薄銅層之側的表面為相反側的表面設置粗化處理層,於自該具有粗化處理層之表面側將載體積層於樹脂基板等支持體時,具有載體與樹脂基板不易剝離之優點。 Further, a roughened layer may be provided on the surface opposite to the surface on the side where the ultra-thin copper layer of the carrier is provided. The roughening treatment layer may be provided by a known method, or may be provided by the above-described roughening treatment. a roughened layer is provided on a surface opposite to the surface on the side where the ultra-thin copper layer is provided on the carrier, and when the carrier layer is supported on a support such as a resin substrate from the surface side of the roughened layer, the carrier has a carrier and The resin substrate is not easily peeled off.

<中間層> <intermediate layer>

於載體上設置有中間層。亦可於載體與中間層之間設置其他層。本發明中所用之中間層只要為如下構成,則並無特別限定,:於將附載體銅箔積層於絕緣基板之步驟前,極薄銅層不易自載體剝離,另一方面,於積層於絕緣基板之步驟後,極薄銅層可自載體剝離。例如,本發明之附載體銅箔的中間層亦可含有選自由Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn、該等之合金、該等之水合物、該等之氧化物、及有機物組成之群中一種或二種以上。又,中間層亦可為複數層。 An intermediate layer is disposed on the carrier. Other layers may also be provided between the carrier and the intermediate layer. The intermediate layer used in the present invention is not particularly limited as long as it is a structure in which the ultra-thin copper layer is not easily peeled off from the carrier before the step of laminating the copper foil with the carrier on the insulating substrate, and the insulating layer is laminated on the other hand. After the step of the substrate, the very thin copper layer can be peeled off from the carrier. For example, the intermediate layer of the copper foil with a carrier of the present invention may further contain a compound selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, Zn, such alloys, and the like, One or more of these oxides and organic compounds. Also, the intermediate layer may be a plurality of layers.

又,例如,中間層可藉由如下方式構成:自載體側形成由選自由以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn構成之元素群中一種元素構成的單一金屬層,或由選自由以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn構成之元素群中一種或二種以上之元素構成的合金層,於其上形成由選自由以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn構成之元素群中一種或二種以上之元素的水合物或氧化物構成之層。 Further, for example, the intermediate layer may be configured by forming an element selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn from the carrier side. a single metal layer or an alloy layer selected from one or more elements selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn. A layer composed of a hydrate or an oxide selected from one or more elements selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn is formed thereon.

又,例如,中間層可藉由如下方式構成,即,自載體側形成選自由以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn構成之元素群中一種元素構成之單一金屬層、或選自由以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn構成之元素群中一種或二種以上之元素構成之合金層,於其上形成選自由以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn構成之元素群中一種元素構成之單一金屬層、或選自由以Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn構成之元素群中一種或二種以上之元素構成的合金層。 Further, for example, the intermediate layer may be configured by forming one element selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn from the carrier side. a single metal layer or an alloy layer selected from one or more elements selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn. Forming a single metal layer selected from one element selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, Zn, or selected from the group consisting of Cr, Ni, Co, Fe An alloy layer composed of one or more elements of the element group consisting of Mo, Ti, W, P, Cu, Al, and Zn.

又,中間層中,作為上述有機物,可使用公知之有機物,又,較佳為使用含氮有機化合物、含硫有機化合物及羧酸之任一種以上。例如,作為具體之含氮有機化合物,較佳為使用作為具有取代基之三唑化合物之1,2,3-苯并三唑、羧基苯并三唑、N',N'-雙(苯并三唑基甲基)脲、1H-1,2,4-三唑及3-胺基-1H-1,2,4-三唑等。 Further, in the intermediate layer, a known organic substance can be used as the organic substance, and any one or more of a nitrogen-containing organic compound, a sulfur-containing organic compound, and a carboxylic acid are preferably used. For example, as a specific nitrogen-containing organic compound, it is preferred to use 1,2,3-benzotriazole, carboxybenzotriazole, N', N'-bis (benzo) as a triazole compound having a substituent. Triazolylmethyl)urea, 1H-1,2,4-triazole and 3-amino-1H-1,2,4-triazole, and the like.

含硫有機化合物較佳為使用巰基苯并噻唑、2-巰基苯并噻唑鈉、硫氰尿酸及2-苯并咪唑硫醇等。 As the sulfur-containing organic compound, mercaptobenzothiazole, sodium 2-mercaptobenzothiazole, thiocyanuric acid, 2-benzimidazolethiol or the like is preferably used.

作為羧酸,尤佳為使用單羧酸,其中較佳為使用油酸、亞麻油酸及次亞麻油酸等。 As the carboxylic acid, a monocarboxylic acid is particularly preferably used, and among them, oleic acid, linoleic acid, linoleic acid or the like is preferably used.

又,例如,中間層可於載體上依序積層鎳層、鎳-磷合金層或鎳-鈷合金層、及含鉻層而構成。由於鎳與銅之接合力高於鉻與銅之接合力,因此於剝離極薄銅層時,於極薄銅層與含鉻層之界面進行剝離。又,對中間層之鎳期待防止銅成分自載體向極薄銅層擴散的阻隔效果。中間層中鎳之附著量較佳為100μg/dm2以上且40000μg/dm2以下,更佳為100μg/dm2以上且4000μg/dm2以下,更佳為100μg/dm2以上且2500μg/dm2以下,更佳為100μg/dm2以上且未達1000μg/dm2,中間層中鉻之附著量較佳為5μg/dm2以上且100μg/dm2以下。於僅於單面設置中間層之情形時,較佳為於載體之相反面設置鍍Ni層等防銹層。上述中間層之鉻層可藉由鍍鉻 或鉻酸鹽處理而設置。 Further, for example, the intermediate layer may be formed by sequentially laminating a nickel layer, a nickel-phosphorus alloy layer or a nickel-cobalt alloy layer, and a chromium-containing layer on the carrier. Since the bonding strength between nickel and copper is higher than the bonding strength between chromium and copper, when the ultra-thin copper layer is peeled off, the interface between the ultra-thin copper layer and the chromium-containing layer is peeled off. Further, the nickel of the intermediate layer is expected to have a barrier effect of preventing the copper component from diffusing from the carrier to the ultra-thin copper layer. The intermediate layer is preferably nickel, deposition amount 100μg / dm 2 or more and 40000μg / 2 or less dm, more preferably 100μg / dm 2 or more and 4000μg / dm 2 or less, more preferably 100μg / dm 2 or more and 2500μg / dm 2 Hereinafter, it is more preferably 100 μg/dm 2 or more and less than 1000 μg/dm 2 , and the amount of chromium deposited in the intermediate layer is preferably 5 μg/dm 2 or more and 100 μg/dm 2 or less. In the case where the intermediate layer is provided only on one side, it is preferable to provide a rust-proof layer such as a Ni plating layer on the opposite side of the carrier. The chromium layer of the above intermediate layer can be provided by chrome plating or chromate treatment.

若中間層之厚度變得過大,則有中間層之厚度對進行了表面處理後之極薄銅層表面的表面粗糙度Rz以及光澤度造成影響的情況,因此極薄銅層之表面處理層表面之中間層的厚度較佳為1~1000nm,較佳為1~500nm,較佳為2~200nm,較佳為2~100nm,更佳為3~60nm。再者,中間層亦可設置於載體之雙面。 If the thickness of the intermediate layer becomes too large, the thickness of the intermediate layer affects the surface roughness Rz and the glossiness of the surface of the extremely thin copper layer after the surface treatment, and thus the surface of the surface of the extremely thin copper layer The thickness of the intermediate layer is preferably from 1 to 1000 nm, preferably from 1 to 500 nm, preferably from 2 to 200 nm, preferably from 2 to 100 nm, more preferably from 3 to 60 nm. Furthermore, the intermediate layer may also be disposed on both sides of the carrier.

<極薄銅層> <very thin copper layer>

於中間層之上設置有極薄銅層。亦可於中間層與極薄銅層之間設置其他層。具有該載體之極薄銅層為作為本發明一實施形態之表面處理銅箔。極薄銅層之厚度並無特別限制,通常薄於載體,例如為12μm以下。典型地為0.5~12μm,更典型地為1.5~5μm。又,於在中間層之上設置極薄銅層前,為了減少極薄銅層之針孔(pinhole),亦可進行利用銅-磷合金之打底鍍敷(strike plating)。打底鍍敷可列舉焦磷酸銅鍍敷液等。再者,極薄銅層亦可設置於載體之雙面。 An extremely thin copper layer is disposed on the intermediate layer. Other layers may be provided between the intermediate layer and the ultra-thin copper layer. The ultra-thin copper layer having the carrier is a surface-treated copper foil according to an embodiment of the present invention. The thickness of the ultra-thin copper layer is not particularly limited, and is usually thinner than the carrier, for example, 12 μm or less. It is typically from 0.5 to 12 μm, more typically from 1.5 to 5 μm. Further, before the ultra-thin copper layer is provided on the intermediate layer, in order to reduce the pinhole of the ultra-thin copper layer, strike plating using a copper-phosphorus alloy may be performed. The base plating may be, for example, a copper pyrophosphate plating solution. Furthermore, an extremely thin copper layer may be provided on both sides of the carrier.

又,本申請案之極薄銅層係以下述條件形成。其係為了藉由形成平滑之極薄銅層,而控制極薄銅層表面的表面粗糙度Rz以及光澤度。 Further, the ultra-thin copper layer of the present application is formed under the following conditions. It is to control the surface roughness Rz and the glossiness of the surface of the ultra-thin copper layer by forming a smooth ultra-thin copper layer.

.電解液組成 . Electrolyte composition

銅:80~120g/L Copper: 80~120g/L

硫酸:80~120g/L Sulfuric acid: 80~120g/L

氯:30~100ppm Chlorine: 30~100ppm

調平劑1((雙(3-磺丙基)二硫化物):10~30ppm Leveling agent 1 ((bis(3-sulfopropyl) disulfide): 10~30ppm

調平劑2(胺化合物):10~30ppm Leveling agent 2 (amine compound): 10~30ppm

上述胺化合物可使用以下之化學式的胺化合物。 As the above amine compound, an amine compound of the following chemical formula can be used.

(上述化學式中,R1及R2係選自由羥烷基、醚基、芳基、芳香族取代烷基、不飽和烴基、烷基組成之一群中者) (In the above chemical formula, R 1 and R 2 are selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group)

.製造條件 . Manufacturing conditions

電流密度:70~100A/dm2 Current density: 70~100A/dm 2

電解液溫度:50~65℃ Electrolyte temperature: 50~65°C

電解液線速度:1.5~5m/sec Electrolyte line speed: 1.5~5m/sec

電解時間:0.5~10分鐘(根據析出之銅厚、電流密度進行調整) Electrolysis time: 0.5~10 minutes (adjusted according to copper thickness and current density)

[表面處理表面上之樹脂層] [Resin layer on the surface treated surface]

於本發明之表面處理銅箔的表面處理表面之上亦可具備有樹脂層。上述樹脂層亦可為絕緣樹脂層。再者,於本發明之表面處理銅箔中,所謂「表面處理表面」,於粗化處理後,進行了用以設置耐熱層、防銹層、耐候性層等表面處理之情形時,係指進行了該表面處理後之表面處理銅箔的表面。又,於表面處理銅箔為附載體銅箔之極薄銅層的情形時,所謂「表面處理表面」,於粗化處理後,進行了用以設置耐熱層、防銹層、耐候性層等表面處理之情形時,係指進行了該表面處理後之極薄銅層的表面。 A resin layer may be provided on the surface-treated surface of the surface-treated copper foil of the present invention. The above resin layer may also be an insulating resin layer. Further, in the surface-treated copper foil of the present invention, the "surface-treated surface" is subjected to a surface treatment such as a heat-resistant layer, a rust-preventing layer, or a weather-resistant layer after the roughening treatment. The surface of the surface-treated copper foil after the surface treatment was carried out. In the case where the surface-treated copper foil is an extremely thin copper layer with a carrier copper foil, the "surface-treated surface" is subjected to a roughening treatment to provide a heat-resistant layer, a rust-proof layer, a weather-resistant layer, and the like. In the case of surface treatment, it refers to the surface of the ultra-thin copper layer after the surface treatment.

上述樹脂層可為接合劑,亦可為接合用之半硬化狀態(B階段狀態)的絕緣樹脂層。所謂半硬化狀態(B階段狀態),包括即便以手指接觸其表面亦無黏著感,可使該絕緣樹脂層重疊而保管,進而若受到加熱 處理則產生硬化反應之狀態。 The resin layer may be a bonding agent or an insulating resin layer in a semi-hardened state (B-stage state) for bonding. The semi-hardened state (B-stage state) includes that the insulating resin layer can be stacked and stored even when the surface is in contact with the finger, and the insulating resin layer can be stored. The treatment produces a state of hardening reaction.

上述樹脂層可為接合用樹脂、即接合劑,亦可為接合用之半硬化狀態(B階段狀態)的絕緣樹脂層。所謂半硬化狀態(B階段狀態),包括即便以手指接觸其表面亦無黏著感,可使該絕緣樹脂層重疊而保管,進而若受到加熱處理則產生硬化反應之狀態。 The resin layer may be a bonding resin, that is, a bonding agent, or may be an insulating resin layer in a semi-hardened state (B-stage state) for bonding. The semi-hardened state (B-stage state) includes a non-adhesive feeling even when the surface is in contact with a finger, and the insulating resin layer can be stacked and stored, and if it is subjected to heat treatment, a curing reaction occurs.

又,上述樹脂層可含有熱硬化性樹脂,亦可為熱塑性樹脂。又,上述樹脂層可含有熱塑性樹脂。上述樹脂層可含有公知之樹脂、樹脂硬化劑、化合物、硬化促進劑、介電體、反應觸媒、交聯劑、聚合物、預浸體、骨架材料等。又,上述樹脂層例如可使用國際公開編號WO2008/004399號、國際公開編號WO2008/053878、國際公開編號WO2009/084533、日本特開平11-5828號、日本特開平11-140281號、日本專利第3184485號、國際公開編號WO97/02728、日本專利第3676375號、日本特開2000-43188號、日本專利第3612594號、日本特開2002-179772號、日本特開2002-359444號、日本特開2003-304068號、日本專利第3992225號、日本特開2003-249739號、日本專利第4136509號、日本特開2004-82687號、日本專利第4025177號、日本特開2004-349654號、日本專利第4286060號、日本特開2005-262506號、日本專利第4570070號、日本特開2005-53218號、日本專利第3949676號、日本專利第4178415號、國際公開編號WO2004/005588、日本特開2006-257153號、日本特開2007-326923號、日本特開2008-111169號、日本專利第5024930號、國際公開編號WO2006/028207、日本專利第4828427號、日本特開2009-67029號、國際公開編號WO2006/134868、日本專利第5046927號、日本特開2009-173017號、國際公開編號WO2007/105635、日本專利第5180815號、國際公開編號WO2008/114858、國際公開編號WO2009/008471、日本特開2011-14727號、國際公開編號WO2009/001850、國際公開編號WO2009/145179、國 際公開編號WO2011/068157、日本特開2013-19056號中記載之物質(樹脂、樹脂硬化劑、化合物、硬化促進劑、介電體、反應觸媒、交聯劑、聚合物、預浸體、骨架材料等)及/或樹脂層之形成方法、形成裝置而形成。 Further, the resin layer may contain a thermosetting resin or a thermoplastic resin. Further, the resin layer may contain a thermoplastic resin. The resin layer may contain a known resin, a resin curing agent, a compound, a curing accelerator, a dielectric, a reaction catalyst, a crosslinking agent, a polymer, a prepreg, a skeleton material, and the like. Further, as the resin layer, for example, International Publication No. WO2008/004399, International Publication No. WO2008/053878, International Publication No. WO2009/084533, Japanese Patent Laid-Open No. Hei No. Hei No. Hei No. Hei No. Hei No. Hei No. Hei. No., International Publication No. WO97/02728, Japanese Patent No. 3676375, Japanese Patent Laid-Open No. 2000-43188, Japanese Patent No. 3612594, Japanese Patent Laid-Open No. 2002-179772, Japanese Patent Laid-Open No. 2002-359444, Japanese Patent Laid-Open No. 2003- No. 304068, Japanese Patent No. 3992225, Japanese Patent Laid-Open No. 2003-249739, Japanese Patent No. 4136509, Japanese Patent Laid-Open No. 2004-82687, Japanese Patent No. 4025177, Japanese Patent Laid-Open No. 2004-349654, and Japanese Patent No. 4286060 Japanese Patent Laid-Open No. 2005-262506, Japanese Patent No. 4570070, Japanese Patent Laid-Open No. 2005-53218, Japanese Patent No. 3949676, Japanese Patent No. 4178415, International Publication No. WO2004/005588, Japanese Patent Publication No. 2006-257153, Japanese Patent Laid-Open No. 2007-326923, Japanese Patent Laid-Open No. 2008-111169, Japanese Patent No. 5024930, International Publication No. WO2006/028207, Japanese Patent No. 4828427, and Japanese Special Publication 2009-6702 No. 9, International Publication No. WO2006/134868, Japanese Patent No. 5046927, Japanese Patent Laid-Open No. 2009-173017, International Publication No. WO2007/105635, Japanese Patent No. 5180815, International Publication No. WO2008/114858, International Publication No. WO2009/008471 , Japan Special Open 2011-14727, International Public Publication No. WO2009/001850, International Public Publication No. WO2009/145179, The materials described in JP-A-2011-068157 and JP-A-2013-19056 (resin, resin curing agent, compound, curing accelerator, dielectric, reaction catalyst, crosslinking agent, polymer, prepreg, The skeleton material or the like and/or the method of forming the resin layer and the forming device are formed.

又,關於上述樹脂層,其種類並無特別限定,作為較佳者,例如可列舉包含選自環氧樹脂、聚醯亞胺樹脂、多官能性氰酸酯化合物、順丁烯二醯亞胺化合物、聚順丁烯二醯亞胺化合物、順丁烯二醯亞胺系樹脂、芳香族順丁烯二醯亞胺樹脂、聚乙烯基縮醛樹脂、胺酯(urethane)樹脂、聚醚碸(亦稱為polyethersulphone、polyethersulfone)、聚醚碸(亦稱為polyethersulphone、polyethersulfone)樹脂、芳香族聚醯胺樹脂、芳香族聚醯胺樹脂聚合物、橡膠性樹脂、聚胺、芳香族聚胺、聚醯胺醯亞胺樹脂、橡膠改質環氧樹脂、苯氧基樹脂、羧基改質丙烯腈-丁二烯樹脂、聚苯醚、雙順丁烯二醯亞胺三樹脂、熱硬化性聚苯醚樹脂、氰酸酯系樹脂、羧酸之酸酐、多元羧酸之酸酐、具有可交聯之官能基的線狀聚合物、聚苯醚樹脂、2,2-雙(4-氰酸酯苯基)丙烷、含磷酚化合物、環烷酸錳、2,2-雙(4-環氧丙基苯基)丙烷、聚苯醚-氰酸酯系樹脂、矽氧烷改質聚醯胺醯亞胺樹脂、氰基酯樹脂、膦腈系樹脂、橡膠改質聚醯胺醯亞胺樹脂、異戊二烯、氫化型聚丁二烯、聚乙烯基丁醛、苯氧基、高分子環氧樹脂、芳香族聚醯胺、氟樹脂、雙酚、嵌段共聚聚醯亞胺樹脂及氰基酯樹脂之群中一種以上樹脂。 Further, the type of the resin layer is not particularly limited, and examples thereof include, for example, an epoxy resin, a polyimide resin, a polyfunctional cyanate compound, and a maleimide. Compound, poly-m-butylene iminoimide compound, maleimide-based resin, aromatic maleimide resin, polyvinyl acetal resin, urethane resin, polyether oxime (also known as polyethersulphone, polyethersulfone), polyether oxime (also known as polyethersulphone, polyethersulfone) resin, aromatic polyamide resin, aromatic polyamide resin polymer, rubber resin, polyamine, aromatic polyamine, Polyamidoximine resin, rubber modified epoxy resin, phenoxy resin, carboxyl modified acrylonitrile-butadiene resin, polyphenylene ether, bis-xenylene diimide Resin, thermosetting polyphenylene ether resin, cyanate resin, acid anhydride, acid anhydride, linear polymer with crosslinkable functional group, polyphenylene ether resin, 2,2-double (4-cyanate phenyl)propane, phosphorus-containing phenol compound, manganese naphthenate, 2,2-bis(4-epoxypropylphenyl)propane, polyphenylene ether-cyanate resin, helium oxygen Alkyl modified polyamidoximine resin, cyanoester resin, phosphazene resin, rubber modified polyamidoximine resin, isoprene, hydrogenated polybutadiene, polyvinyl butyral, One or more resins selected from the group consisting of a phenoxy group, a polymer epoxy resin, an aromatic polyamine, a fluororesin, a bisphenol, a block copolymer polyimine resin, and a cyanoester resin.

又,上述環氧樹脂係分子內具有2個以上之環氧基者,只要為可用於電子材料用途者,則可並無特別問題地使用。又,上述環氧樹脂較佳為使用分子內具有2個以上環氧丙基之化合物而進行環氧化的環氧樹脂。又,可將選自雙酚A型環氧樹脂、雙酚F型環氧樹脂、雙酚S型環氧樹脂、雙酚AD型環氧樹脂、酚醛清漆型環氧樹脂、甲酚酚醛清漆型環氧樹脂、脂環式環氧樹脂、溴化環氧樹脂、酚系酚醛清漆型環氧樹脂、萘型環 氧樹脂、溴化雙酚A型環氧樹脂、鄰甲酚酚醛清漆型環氧樹脂、橡膠改質雙酚A型環氧樹脂、環氧丙胺型環氧樹脂、異氰尿酸三環氧丙酯、N,N-二環氧丙基苯胺等環氧丙胺化合物、四氫鄰苯二甲酸二環氧丙酯等環氧丙酯化合物、含磷環氧樹脂、聯苯型環氧樹脂、聯苯酚醛清漆型環氧樹脂、三羥基苯基甲烷型環氧樹脂、四苯基乙烷型環氧樹脂之群中一種或兩種以上混合而使用,或可使用上述環氧樹脂之氫化體或鹵化體。 Moreover, those having two or more epoxy groups in the epoxy resin may be used without any particular problem as long as they are usable for electronic materials. Further, the epoxy resin is preferably an epoxy resin which is epoxidized using a compound having two or more epoxy propyl groups in its molecule. Further, it may be selected from the group consisting of bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, bisphenol AD type epoxy resin, novolak type epoxy resin, cresol novolac type Epoxy resin, alicyclic epoxy resin, brominated epoxy resin, phenolic novolac epoxy resin, naphthalene ring Oxygen resin, brominated bisphenol A type epoxy resin, o-cresol novolak type epoxy resin, rubber modified bisphenol A type epoxy resin, epoxidized propylamine type epoxy resin, triglycidyl isocyanurate , a glycidyl compound such as N,N-diepoxypropylaniline, a glycidyl ester compound such as diglycidyl tetrahydrophthalate, a phosphorus-containing epoxy resin, a biphenyl type epoxy resin, or a biphenol One or a mixture of two or more of an aldehyde varnish type epoxy resin, a trishydroxyphenylmethane type epoxy resin, and a tetraphenylethane type epoxy resin, or a hydrogenated or halogenated epoxy resin may be used. body.

作為上述含磷環氧樹脂,可使用公知之含有磷的環氧樹脂。又,上述含磷環氧樹脂較佳為例如以源自分子內具備2個以上之環氧基的9,10-二氫-9-氧雜-10-磷雜菲-10-氧化物之衍生物的形式獲得之環氧樹脂。 As the phosphorus-containing epoxy resin, a known phosphorus-containing epoxy resin can be used. Further, the phosphorus-containing epoxy resin is preferably derived, for example, from 9,10-dihydro-9-oxa-10-phosphaphenanthrene-10-oxide having two or more epoxy groups in its molecule. Epoxy resin obtained in the form of an object.

(於樹脂層含有介電體(介電體填料)之情形時) (when the resin layer contains a dielectric (dielectric filler))

上述樹脂層亦可含有介電體(介電體填料)。 The resin layer may also contain a dielectric (dielectric filler).

於在上述任一種樹脂層或樹脂組成物中含有介電體(介電體填料)之情形時,可用於形成電容器層之用途,而增大電容器電路之電容。該介電體(介電體填料)使用BaTiO3、SrTiO3、Pb(Zr-Ti)O3(通稱PZT)、PbLaTiO3.PbLaZrO(通稱PLZT)、SrBi2Ta2O9(通稱SBT)等具有鈣鈦礦(perovskite)結構之複合氧化物的介電體粉。 When a dielectric material (dielectric filler) is contained in any of the above resin layers or resin compositions, it can be used for forming a capacitor layer to increase the capacitance of the capacitor circuit. The dielectric (dielectric filler) used was BaTiO 3 , SrTiO 3 , Pb(Zr-Ti)O 3 (commonly known as PZT), and PbLaTiO 3 . A dielectric powder of a composite oxide having a perovskite structure such as PbLaZrO (commonly known as PLZT) or SrBi 2 Ta 2 O 9 (commonly known as SBT).

介電體(介電體填料)亦可為粉狀。於介電體(介電體填料)為粉狀之情形時,該介電體(介電體填料)之粉體特性,較佳為粒徑為0.01μm~3.0μm、較佳為0.02μm~2.0μm之範圍者。再者,於利用掃描型電子顯微鏡(SEM)對介電體拍攝照片,於該照片上之介電體的粒子之上劃出直線的情形時,將橫穿介電體粒子之直線之長度最長部分的介電體粒子之長度設為該介電體粒子之直徑。並且,將測定視野中介電體之粒子直徑的平均值設為介電體之粒徑。 The dielectric (dielectric filler) may also be in powder form. When the dielectric (dielectric filler) is in the form of a powder, the powder property of the dielectric (dielectric filler) is preferably from 0.01 μm to 3.0 μm, preferably 0.02 μm. The range of 2.0 μm. Further, when a photo is taken by a scanning electron microscope (SEM) on a dielectric body, and a straight line is drawn on the particles of the dielectric body on the photo, the length of the straight line crossing the dielectric particles is longest. The length of part of the dielectric particles is set to the diameter of the dielectric particles. Further, the average value of the particle diameters of the measurement field-directed dielectrics is defined as the particle diameter of the dielectric.

將上述樹脂層中所含之樹脂及/或樹脂組成物及/或化合物溶解於例如甲基乙基酮(MEK)、環戊酮、二甲基甲醯胺、二甲基乙醯胺、 N-甲基吡咯啶酮、甲苯、甲醇、乙醇、丙二醇單甲醚、二甲基甲醯胺、二甲基乙醯胺、環己酮、乙基賽珞蘇、N-甲基-2-吡咯啶酮、N,N-二甲基乙醯胺、N,N-二甲基甲醯胺等溶劑中而製成樹脂液(樹脂清漆),例如藉由輥式塗佈法等將其塗佈於上述表面處理銅箔的粗化處理表面之上,繼而,視需要進行加熱乾燥去除溶劑而設為B階段狀態。乾燥例如使用熱風乾燥爐即可,乾燥溫度只要為100~250℃、較佳為130~200℃即可。可使用溶劑溶解上述樹脂層之組成物,而製成樹脂固形物成分3wt%~70wt%、較佳為3wt%~60wt%、較佳為10wt%~40wt%、更佳為25wt%~40wt%之樹脂液。再者,就環境之觀點而言,於現階段最佳為使用甲基乙基酮與環戊酮之混合溶劑來進行溶解。再者,溶劑較佳為使用沸點為50℃~200℃之範圍的溶劑。 Dissolving the resin and/or resin composition and/or compound contained in the above resin layer in, for example, methyl ethyl ketone (MEK), cyclopentanone, dimethylformamide, dimethylacetamide, N-methylpyrrolidone, toluene, methanol, ethanol, propylene glycol monomethyl ether, dimethylformamide, dimethylacetamide, cyclohexanone, ethyl cyproterone, N-methyl-2- A resin liquid (resin varnish) is prepared in a solvent such as pyrrolidone, N,N-dimethylacetamide or N,N-dimethylformamide, and is coated, for example, by a roll coating method or the like. It is placed on the roughened surface of the surface-treated copper foil, and then heated and dried as necessary to remove the solvent to be in a B-stage state. Drying may be carried out, for example, using a hot air drying oven, and the drying temperature may be 100 to 250 ° C, preferably 130 to 200 ° C. The composition of the above resin layer may be dissolved in a solvent to form a resin solid content of 3 wt% to 70 wt%, preferably 3 wt% to 60 wt%, preferably 10 wt% to 40 wt%, more preferably 25 wt% to 40 wt%. Resin solution. Further, from the viewpoint of the environment, it is most preferable to use a mixed solvent of methyl ethyl ketone and cyclopentanone to dissolve at this stage. Further, the solvent is preferably a solvent having a boiling point of from 50 ° C to 200 ° C.

又,上述樹脂層較佳為依據MIL標準(美國軍用標準)中MIL-P-13949G而進行測定時之樹脂溢流量位於5%~35%的範圍之半硬化樹脂膜。 Further, the resin layer is preferably a semi-hardened resin film having a resin overflow flow rate in the range of 5% to 35% when measured in accordance with MIL-P-13949G in the MIL standard (US Military Standard).

於本案說明書中,所謂樹脂溢流量,係依據MIL標準中MIL-P-13949G,自附有將樹脂厚度設為55μm之樹脂的表面處理銅箔取樣4片10cm見方之試樣,於使該4片試樣重疊之狀態(積層體)下,於加壓溫度171℃、加壓壓力14kgf/cm2、加壓時間10分鐘之條件下進行貼合,根據測定此時之樹脂流出重量的結果並根據數1而算出之值。 In the present specification, the resin overflow rate is based on MIL-P-13949G in the MIL standard, and a sample of four 10 cm squares is sampled from a surface-treated copper foil to which a resin having a resin thickness of 55 μm is attached. The film samples were laminated under the conditions of a pressure of 171 ° C, a pressurization pressure of 14 kgf / cm 2 , and a pressurization time of 10 minutes, and the results of measuring the resin outflow weight at this time were The value calculated based on the number 1.

具備上述樹脂層之表面處理銅箔(附有樹脂之表面處理銅箔)係以如下態樣使用,即,於使其樹脂層與基材重疊後將整體熱壓合而使該樹脂層熱硬化,繼而於表面處理銅箔為附載體銅箔之極薄銅層的情形時,將載體剝離而使極薄銅層露出(當然露出部分為該極薄銅層之中間層 側之表面),自與表面處理銅箔經粗化處理之側為相反側的表面形成特定之配線圖案。 The surface-treated copper foil (resin-treated copper foil with resin) provided with the above-mentioned resin layer is used in such a manner that after the resin layer and the substrate are overlapped, the entire resin is thermocompression-bonded to thermally harden the resin layer. Then, in the case where the surface-treated copper foil is an extremely thin copper layer with a carrier copper foil, the carrier is peeled off to expose the ultra-thin copper layer (of course, the exposed portion is the intermediate layer of the extremely thin copper layer) The surface of the side) forms a specific wiring pattern from the surface on the opposite side to the side where the surface-treated copper foil is roughened.

若使用該附有樹脂之表面處理銅箔,則可減少多層印刷配線基板之製造時預浸材料的使用片數。並且,即便將樹脂層之厚度設為如可確保層間絕緣之厚度、或完全未使用預浸材料,亦可製造覆銅積層板。又,此時,亦可於基材之表面將絕緣樹脂底塗(undercoat)而進一步改善表面之平滑性。 When the surface-treated copper foil with a resin is used, the number of sheets of the prepreg used in the production of the multilayer printed wiring board can be reduced. Further, the copper clad laminate can be produced even if the thickness of the resin layer is such that the thickness of the interlayer insulation can be ensured or the prepreg material is not used at all. Further, at this time, the insulating resin may be undercoated on the surface of the substrate to further improve the smoothness of the surface.

再者,於未使用預浸材料之情形時,可節約預浸材料之材料成本,且亦簡化積層步驟,因此於經濟方面有利,並且,有製造之多層印刷配線基板厚度變薄如預浸材料之厚度程度,而可製造1層之厚度為100μm以下之極薄的多層印刷配線基板之優點。 Furthermore, when the prepreg material is not used, the material cost of the prepreg material can be saved, and the lamination step is also simplified, so that it is economically advantageous, and the thickness of the multilayer printed wiring substrate to be manufactured is thinned as a prepreg material. The thickness of the layer can be made to have an advantage of a very thin multilayer printed wiring board having a thickness of 100 μm or less.

該樹脂層之厚度較佳為0.1~120μm。 The thickness of the resin layer is preferably from 0.1 to 120 μm.

若樹脂層之厚度薄於0.1μm,則接合力下降,於不介隔預浸材料而將該附有樹脂之表面處理銅箔積層於具備有內層材料的基材時,具有難以確保與內層材料之電路之間的層間絕緣之情況。另一方面,若使樹脂層之厚度厚於120μm,則具有難以藉由1次塗佈步驟而形成目標厚度之樹脂層,而花費額外之材料費與工時,因此於經濟方面變得不利之情況。 When the thickness of the resin layer is less than 0.1 μm, the bonding strength is lowered, and when the resin-coated surface-treated copper foil is laminated on the substrate having the inner layer material without interposing the prepreg, it is difficult to ensure the inside. The case of interlayer insulation between circuits of layer materials. On the other hand, when the thickness of the resin layer is made thicker than 120 μm, it is difficult to form a resin layer having a target thickness by one application step, and it takes an extra material cost and man-hour, which is disadvantageous in terms of economy. Happening.

再者,於將具有樹脂層之表面處理銅箔用於製造極薄之多層印刷配線板之情形時,為了減小多層印刷配線板之厚度,較佳為將上述樹脂層之厚度設為0.1μm~5μm,更佳為設為0.5μm~5μm,更佳為設為1μm~5μm。 Further, in the case where a surface-treated copper foil having a resin layer is used for producing an extremely thin multilayer printed wiring board, in order to reduce the thickness of the multilayer printed wiring board, it is preferable to set the thickness of the above resin layer to 0.1 μm. More preferably, it is 0.5 μm to 5 μm, and more preferably 1 μm to 5 μm.

以下,示出若干使用有本發明之附載體銅箔的印刷配線板之製造步驟之例。 Hereinafter, examples of the manufacturing steps of a plurality of printed wiring boards using the copper foil with a carrier of the present invention are shown.

於本發明之印刷配線板之製造方法一實施形態中,包括如下步驟:準備本發明之附載體銅箔與絕緣基板;將上述附載體銅箔與絕緣基 板積層;於以使極薄銅層側與絕緣基板對向之方式積層上述附載體銅箔與絕緣基板後,經過剝離上述附載體銅箔之載體的步驟而形成覆銅積層板,然後,藉由半加成法、改良半加成法、部分加成法及減成法中任一方法而形成電路。絕緣基板亦可設為具有內層電路者。 In an embodiment of the method for manufacturing a printed wiring board according to the present invention, the method includes the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; and the copper foil and the insulating substrate with the carrier a laminate layer is formed by laminating the carrier-attached copper foil and the insulating substrate so that the ultra-thin copper layer side faces the insulating substrate, and then the copper-clad laminate is formed by peeling off the carrier with the carrier copper foil, and then borrowing The circuit is formed by any one of a semi-additive method, a modified semi-additive method, a partial addition method, and a subtractive method. The insulating substrate may also be provided as an inner layer circuit.

於本發明中,所謂半加成法,係指於絕緣基板或銅箔籽晶層上進行薄無電電鍍,於形成圖案後,使用電鍍及蝕刻而形成導體圖案之方法。 In the present invention, the semi-additive method refers to a method of forming a conductor pattern by plating and etching after performing thin electroless plating on an insulating substrate or a copper foil seed layer.

因此,於使用半加成法之本發明之印刷配線板之製造方法一實施形態中,包括如下步驟:準備本發明之附載體銅箔與絕緣基板;將上述附載體銅箔與絕緣基板積層;於將上述附載體銅箔與絕緣基板積層後,剝離上述附載體銅箔之載體;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,將剝離上述載體而露出之極薄銅層全部去除;於藉由利用蝕刻去除上述極薄銅層而露出之上述樹脂中設置對穿孔(through hole)或/及盲孔(blind via);對含有上述對穿孔或/及盲孔之區域進行除膠渣處理;於上述樹脂及含有上述對穿孔或/及盲孔之區域設置無電電鍍層;於上述無電電鍍層之上設置鍍敷阻劑;對上述鍍敷阻劑進行曝光,然後,去除形成有電路之區域的鍍敷阻劑;於去除上述鍍敷阻劑之形成有上述電路的區域中設置電鍍層;去除上述鍍敷阻劑;藉由快速蝕刻等去除位於形成有上述電路之區域以外之區域的無電電鍍層。 Therefore, in one embodiment of the method for producing a printed wiring board of the present invention using a semi-additive method, the method includes the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; and laminating the copper foil with the carrier and the insulating substrate; After laminating the copper foil with the carrier and the insulating substrate, the carrier of the copper foil with the carrier is peeled off; and the ultra-thin copper layer exposed by peeling off the carrier is removed by etching or plasma etching using an acid or the like. Providing a through hole or/and a blind via in the resin exposed by removing the ultra-thin copper layer by etching; removing the adhesive containing the above-mentioned perforated or/and blind via a slag treatment; providing an electroless plating layer on the resin and the region containing the perforation or/and the blind hole; providing a plating resist on the electroless plating layer; exposing the plating resist to the above, and then removing the formed a plating resist in a region of the circuit; a plating layer disposed in a region where the circuit is formed by removing the plating resist; removing the plating resist; removing the shape by rapid etching or the like An electroless plating layer in a region other than the region of the above circuit.

於使用半加成法之本發明之印刷配線板之製造方法另一實施形態中,包括如下步驟:準備本發明之附載體銅箔與絕緣基板;將上述附載體銅箔與絕緣基板積層;於將上述附載體銅箔與絕緣基板積層後,剝離上述附載體銅箔之載體;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,將剝離上述載體而露出之極薄銅層全部去除;於藉由利用蝕刻去除上述極薄銅層而露出之上述樹脂之表面設置無電電鍍層;於上述無電電鍍層之上 設置鍍敷阻劑;對上述鍍敷阻劑進行曝光,然後,去除形成有電路之區域的鍍敷阻劑;於去除上述鍍敷阻劑之形成有上述電路之區域中設置電鍍層;去除上述鍍敷阻劑;藉由快速蝕刻等去除位於形成有上述電路之區域以外之區域的無電電鍍層及極薄銅層。 In another embodiment of the method for producing a printed wiring board of the present invention using a semi-additive method, the method includes the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; and laminating the copper foil with the carrier and the insulating substrate; After laminating the copper foil with the carrier and the insulating substrate, the carrier of the copper foil with the carrier is peeled off; and the ultra-thin copper layer exposed by peeling off the carrier is completely removed by etching or plasma etching using an etching solution such as acid; Providing an electroless plating layer on a surface of the resin exposed by removing the ultra-thin copper layer by etching; on the electroless plating layer a plating resist is disposed; the plating resist is exposed, and then the plating resist is removed from the region where the circuit is formed; and the plating layer is disposed in the region where the circuit is formed by removing the plating resist; A plating resist; an electroless plating layer and an extremely thin copper layer in a region other than the region where the above-described circuit is formed are removed by rapid etching or the like.

於本發明中,所謂改良半加成法,係指如下方法,即,於絕緣層上積層金屬箔,藉由鍍敷阻劑保護非電路形成部,藉由電鍍增加電路形成部之銅厚後,去除阻劑,藉由(快速)蝕刻去除上述電路形成部以外之金屬箔,藉此於絕緣層上形成電路。 In the present invention, the modified semi-additive method refers to a method of laminating a metal foil on an insulating layer, protecting a non-circuit forming portion by a plating resist, and increasing a copper thickness of the circuit forming portion by plating. The resist is removed, and the metal foil other than the circuit forming portion is removed by (rapid) etching, thereby forming a circuit on the insulating layer.

因此,於使用改良半加成法之本發明之印刷配線板之製造方法一實施形態中,包括如下步驟:準備本發明之附載體銅箔與絕緣基板;將上述附載體銅箔與絕緣基板積層;於將上述附載體銅箔與絕緣基板積層後,剝離上述附載體銅箔之載體;於將上述載體剝離而露出之極薄銅層與絕緣基板上設置對穿孔或/及盲孔;對含有上述對穿孔或/及盲孔之區域進行除膠渣處理;對含有上述對穿孔或/及盲孔之區域設置無電電鍍層;於將上述載體剝離而露出之極薄銅層表面設置鍍敷阻劑;於設置上述鍍敷阻劑後,藉由電鍍形成電路;去除上述鍍敷阻劑;藉由快速蝕刻去除因去除上述鍍敷阻劑而露出之極薄銅層。 Therefore, in one embodiment of the method for producing a printed wiring board of the present invention using the modified semi-additive method, the method includes the steps of: preparing a copper foil with an insulating substrate of the present invention and an insulating substrate; and laminating the copper foil with the insulating substrate After laminating the copper foil with the carrier and the insulating substrate, the carrier of the copper foil with the carrier is peeled off; the ultra-thin copper layer exposed on the carrier is peeled off and the insulating substrate is provided with a perforation or/and a blind hole; Performing desmear treatment on the perforated or/and blind via regions; providing an electroless plating layer on the region containing the perforated or/and blind vias; and plating the surface of the extremely thin copper layer exposed by peeling the carrier After the plating resist is disposed, the circuit is formed by electroplating; the plating resist is removed; and the ultra-thin copper layer exposed by removing the plating resist is removed by rapid etching.

又,於上述樹脂層上形成電路之步驟亦可為於上述樹脂層上自極薄銅層側貼合其他附載體銅箔,使用貼合於上述樹脂層之附載體銅箔而形成上述電路之步驟。又,貼合於上述樹脂層上之其他附載體銅箔亦可為本發明之附載體銅箔。又,於上述樹脂層上形成電路之步驟亦可藉由半加成法、減成法、部分加成法或改良半加成法任一方法進行。又,於上述表面形成電路之附載體銅箔可於該附載體銅箔的載體之表面具有基板或樹脂層。 Further, a step of forming a circuit on the resin layer may be performed by laminating another carrier-attached copper foil from the ultra-thin copper layer side on the resin layer, and forming the circuit using a carrier-attached copper foil bonded to the resin layer. step. Further, other copper foil with a carrier adhered to the above resin layer may be the copper foil with a carrier of the present invention. Further, the step of forming a circuit on the resin layer may be carried out by any one of a semi-additive method, a subtractive method, a partial addition method or a modified semi-additive method. Further, the copper foil with a carrier on which the circuit is formed on the surface may have a substrate or a resin layer on the surface of the carrier on which the carrier copper foil is attached.

於使用改良半加成法之本發明之印刷配線板之製造方法另 一實施形態中,包括如下步驟:準備本發明之附載體銅箔與絕緣基板;將上述附載體銅箔與絕緣基板積層;於將上述附載體銅箔與絕緣基板積層後,剝離上述附載體銅箔之載體;於將上述載體剝離而露出之極薄銅層之上設置鍍敷阻劑;對上述鍍敷阻劑進行曝光,然後,去除形成有電路之區域的鍍敷阻劑;於去除上述鍍敷阻劑之形成有上述電路之區域中設置電鍍層;去除上述鍍敷阻劑;藉由快速蝕刻等去除位於形成有上述電路之區域以外之區域的無電電鍍層及極薄銅層。 A method of manufacturing a printed wiring board of the present invention using a modified semi-additive method In one embodiment, the method includes the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; laminating the copper foil with the carrier and the insulating substrate; and laminating the copper foil with the insulating substrate and peeling off the copper carrier a carrier for foil; a plating resist disposed on the extremely thin copper layer exposed by peeling off the carrier; exposing the plating resist, and then removing the plating resist in the region where the circuit is formed; A plating resist is formed in a region where the circuit is formed; a plating resist is removed; and an electroless plating layer and an extremely thin copper layer in a region other than the region where the circuit is formed are removed by rapid etching or the like.

於本發明中,所謂部分加成法,係指如下方法:於設置導體層而成之基板、視需要開出對穿孔或通孔(via hole)用之孔而成之基板上賦予觸媒核,進行蝕刻而形成導體電路,視需要設置阻焊劑或鍍敷阻劑後,於上述導體電路上,對對穿孔或通孔等藉由無電電鍍處理進行增厚,藉此製造印刷配線板。 In the present invention, the partial addition method refers to a method of providing a catalyst core on a substrate formed by providing a conductor layer and, if necessary, opening a hole for a via hole or a via hole. Etching is performed to form a conductor circuit, and if necessary, a solder resist or a plating resist is provided, and a via hole or a via hole is thickened by an electroless plating treatment on the conductor circuit to manufacture a printed wiring board.

因此,於使用部分加成法之本發明之印刷配線板之製造方法一實施形態中,包括如下步驟:準備本發明之附載體銅箔與絕緣基板;將上述附載體銅箔與絕緣基板積層;於將上述附載體銅箔與絕緣基板積層後,剝離上述附載體銅箔之載體;於將上述載體剝離而露出之極薄銅層與絕緣基板上設置對穿孔或/及盲孔;對含有上述對穿孔或/及盲孔之區域進行除膠渣處理;對含有上述對穿孔或/及盲孔之區域賦予觸媒核;於將上述載體剝離而露出之極薄銅層表面設置蝕刻阻劑;對上述蝕刻阻劑進行曝光,形成電路圖案;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,去除上述極薄銅層及上述觸媒核而形成電路;去除上述蝕刻阻劑;於藉由使用酸等腐蝕溶液之蝕刻或電漿等方法去除上述極薄銅層及上述觸媒核而露出的上述絕緣基板表面,設置阻焊劑或鍍敷阻劑;於未設置上述阻焊劑或鍍敷阻劑之區域中設置無電電鍍層。 Therefore, in an embodiment of the method for manufacturing a printed wiring board of the present invention using a partial addition method, the method includes the steps of: preparing a copper foil with an insulating substrate of the present invention and an insulating substrate; and laminating the copper foil with the carrier and the insulating substrate; After laminating the copper foil with the carrier and the insulating substrate, the carrier of the copper foil with the carrier is peeled off; the ultra-thin copper layer exposed on the carrier is peeled off and the insulating substrate is provided with a perforation or/and a blind hole; Performing desmear treatment on the region of the perforation or/and the blind hole; imparting a catalyst core to the region containing the perforation or/and the blind hole; and providing an etching resist on the surface of the extremely thin copper layer exposed by peeling the carrier; Exposing the etching resist to form a circuit pattern; removing the ultra-thin copper layer and the catalyst core by using etching or plasma etching of an acid or the like to form a circuit; removing the etching resist; a surface of the insulating substrate exposed by removing the ultra-thin copper layer and the catalyst core by etching or plasma etching using an acid or the like, and providing a solder resist or a plating resist; Is provided above the solder resist or plating resist in the plating zone is provided in the electroless plating layer.

於本發明中,所謂減成法,係指如下方法:藉由蝕刻等,選 擇性地去除覆銅積層板上之銅箔之不需要的部分,而形成導體圖案。 In the present invention, the subtractive method refers to a method of selecting by etching or the like. An unnecessary portion of the copper foil on the copper clad laminate is selectively removed to form a conductor pattern.

因此,於使用減成法之本發明之印刷配線板之製造方法一實施形態中,包括如下步驟:準備本發明之附載體銅箔與絕緣基板;將上述附載體銅箔與絕緣基板積層;於將上述附載體銅箔與絕緣基板積層後,剝離上述附載體銅箔之載體;於將上述載體剝離而露出之極薄銅層與絕緣基板設置對穿孔或/及盲孔;對含有上述對穿孔或/及盲孔之區域進行除膠渣處理;對含有上述對穿孔或/及盲孔之區域設置無電電鍍層;於上述無電電鍍層之表面設置電鍍層;於上述電鍍層或/及上述極薄銅層之表面設置蝕刻阻劑;對上述蝕刻阻劑進行曝光,形成電路圖案;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,去除上述極薄銅層、上述無電電鍍層及上述電鍍層而形成電路;去除上述蝕刻阻劑。 Therefore, in one embodiment of the method for producing a printed wiring board of the present invention using the subtractive method, the method includes the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; and laminating the copper foil with the insulating substrate; After laminating the copper foil with the carrier and the insulating substrate, the carrier of the copper foil with the carrier is peeled off; the ultra-thin copper layer and the insulating substrate exposed by peeling off the carrier are provided with perforations or/and blind vias; Or / and the area of the blind hole is subjected to desmear treatment; an electroless plating layer is provided on the region containing the above-mentioned perforated or/and blind holes; a plating layer is disposed on the surface of the electroless plating layer; and the plating layer or/and the above-mentioned electrode An etching resist is disposed on the surface of the thin copper layer; the etching resist is exposed to form a circuit pattern; and the ultra-thin copper layer, the electroless plating layer and the above are removed by etching or plasma etching using an acid or the like A circuit is formed to form a circuit; the above etching resist is removed.

於使用減成法之本發明之印刷配線板之製造方法另一實施形態中,包括如下步驟:準備本發明之附載體銅箔與絕緣基板;將上述附載體銅箔與絕緣基板積層;於將上述附載體銅箔與絕緣基板積層後,剝離上述附載體銅箔之載體;於將上述載體剝離而露出之極薄銅層與絕緣基板上設置對穿孔或/及盲孔;對含有上述對穿孔或/及盲孔之區域進行除膠渣處理;對含有上述對穿孔或/及盲孔之區域設置無電電鍍層;於上述無電電鍍層之表面形成遮罩;於未形成遮罩之上述無電電鍍層之表面設置電鍍層;於上述電鍍層或/及上述極薄銅層之表面設置蝕刻阻劑;對上述蝕刻阻劑進行曝光,形成電路圖案;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,去除上述極薄銅層及上述無電電鍍層而形成電路;去除上述蝕刻阻劑。 In another embodiment of the method for producing a printed wiring board according to the present invention using the subtractive method, the method includes the steps of: preparing a copper foil with a carrier of the present invention and an insulating substrate; and laminating the copper foil with the carrier and the insulating substrate; After the carrier-attached copper foil is laminated with the insulating substrate, the carrier of the carrier-attached copper foil is peeled off; the ultra-thin copper layer and the insulating substrate exposed by peeling the carrier are provided with perforations or/and blind vias; Or / and the area of the blind hole is subjected to desmear treatment; an electroless plating layer is provided on the region containing the above-mentioned perforated or/and blind holes; a mask is formed on the surface of the electroless plating layer; and the above-mentioned electroless electricity is not formed in the mask a plating layer is disposed on the surface of the plating layer; an etching resist is disposed on the surface of the plating layer or/and the ultra-thin copper layer; and the etching resist is exposed to form a circuit pattern; etching or plasma is performed by etching the solution using an acid or the like And the like, removing the ultra-thin copper layer and the electroless plating layer to form a circuit; and removing the etching resist.

亦可不進行設置對穿孔或/及盲孔之步驟、及其後之除膠渣步驟。 The step of providing a perforation or/and a blind hole, and the subsequent desmear step may also be omitted.

此處,使用圖式詳細地說明使用有本發明之附載體銅箔之印 刷配線板之製造方法的具體例。再者,此處,以具有形成有粗化處理層之極薄銅層的附載體銅箔為例進行說明,但並不限定於此,即便使用具有未形成粗化處理層之極薄銅層的附載體銅箔,亦可同樣地實施下述印刷配線板之製造方法。 Here, the printing using the copper foil with the carrier of the present invention will be described in detail using the drawings. A specific example of a method of manufacturing a brushed wiring board. Here, the copper foil with a carrier having the ultra-thin copper layer in which the roughened layer is formed is exemplified, but the invention is not limited thereto, and even a very thin copper layer having a roughened layer is not used. The carrier copper foil with a carrier can also implement the manufacturing method of the following printed wiring board similarly.

首先,如圖2-A所示,準備具有於表面形成有粗化處理層之極薄銅層的附載體銅箔(第1層)。 First, as shown in FIG. 2-A, a copper foil with a carrier (first layer) having an extremely thin copper layer having a roughened layer formed on its surface is prepared.

繼而,如圖2-B所示,於極薄銅層之粗化處理層上塗佈阻劑,進行曝光、顯影,將阻劑蝕刻為特定之形狀。 Then, as shown in FIG. 2-B, a resist is applied onto the roughened layer of the ultra-thin copper layer, exposed, developed, and the resist is etched into a specific shape.

繼而,如圖2-C所示,於形成電路用之鍍層後,去除阻劑,藉此形成特定之形狀之電路鍍層。 Then, as shown in FIG. 2-C, after the plating for the circuit is formed, the resist is removed, thereby forming a circuit plating of a specific shape.

繼而,如圖3-D所示,以覆蓋電路鍍層之方式(以埋沒電路鍍層之方式)於極薄銅層上設置嵌入樹脂而將樹脂層積層,繼而自極薄銅層側接合其他附載體銅箔(第2層)。 Then, as shown in FIG. 3-D, the resin layer is laminated on the ultra-thin copper layer by covering the circuit plating layer (by burying the circuit plating layer), and then the other carrier is bonded from the very thin copper layer side. Copper foil (layer 2).

繼而,如圖3-E所示,自第2層之附載體銅箔剝離載體。 Then, as shown in Fig. 3-E, the carrier was peeled off from the carrier copper foil of the second layer.

繼而,如圖3-F所示,於樹脂層之特定位置進行雷射開孔,使電路鍍層露出而形成盲孔。 Then, as shown in FIG. 3-F, a laser opening is performed at a specific position of the resin layer to expose the circuit plating layer to form a blind hole.

繼而,如圖4-G所示,於盲孔中嵌入銅而形成通孔填充物(via fill)。 Then, as shown in FIG. 4-G, copper is embedded in the blind via to form a via fill.

繼而,如圖4-H所示,於通孔填充物上,如上述圖2-B及圖2-C般形成電路鍍層。 Then, as shown in FIG. 4-H, a circuit plating layer is formed on the via fill material as in the above-described FIG. 2-B and FIG.

繼而,如圖4-I所示,自第1層之附載體銅箔剝離載體。 Then, as shown in Fig. 4-I, the carrier was peeled off from the carrier-attached copper foil of the first layer.

繼而,如圖5-J所示,藉由快速蝕刻去除兩表面之極薄銅層,而露出樹脂層內之電路鍍層之表面。 Then, as shown in FIG. 5-J, the extremely thin copper layer on both surfaces is removed by rapid etching to expose the surface of the circuit plating layer in the resin layer.

繼而,如圖5-K所示,於樹脂層內之電路鍍層上形成凸塊,於該焊料上形成銅柱。以上述方式製作使用有本發明之附載體銅箔之印刷配線板。 Then, as shown in FIG. 5-K, bumps are formed on the circuit plating layer in the resin layer, and copper pillars are formed on the solder. A printed wiring board using the copper foil with a carrier of the present invention was produced in the above manner.

上述其他附載體銅箔(第2層)可使用本發明之附載體銅 箔,可使用習知之附載體銅箔,進而亦可使用通常之銅箔。又,於圖4-H所示之第2層之電路上,進而可形成1層或複數層電路,亦可藉由半加成法、減成法、部分加成法或改良半加成法任一方法進行該等電路形成。 The above-mentioned other carrier copper foil (the second layer) can use the copper carrier of the present invention. As the foil, a conventional copper foil with a carrier can be used, and a usual copper foil can also be used. Further, in the circuit of the second layer shown in FIG. 4-H, a layer or a plurality of layers may be formed, or may be formed by a semi-additive method, a subtractive method, a partial addition method or a modified semi-additive method. Either method performs such circuit formation.

本發明之附載體銅箔較佳為以滿足以下(1)之方式控制極薄銅層表面之色差。於本發明中,所謂「極薄銅層表面之色差」,表示極薄銅層之表面的色差,或於實施有粗化處理等各種表面處理之情形時,表示其表面處理層表面之色差。即,本發明之附載體銅箔較佳為以滿足以下(1)之方式控制極薄銅層的粗化處理表面之色差。再者,於本發明之表面處理銅箔中,所謂「粗化處理表面」,於粗化處理後,進行了用以設置耐熱層、防銹層、耐候性層等之表面處理的情形時,係指進行了該表面處理後之表面處理銅箔(極薄銅層)的表面。又,於表面處理銅箔為附載體銅箔之極薄銅層之情形時,所謂「粗化處理表面」,於粗化處理後,進行了用以設置耐熱層、防銹層、耐候性層等之表面處理的情形時,係指進行了該表面處理後之極薄銅層的表面。 The copper foil with a carrier of the present invention preferably controls the chromatic aberration of the surface of the ultra-thin copper layer in such a manner as to satisfy the following (1). In the present invention, the "chromatic aberration on the surface of the ultra-thin copper layer" means the chromatic aberration on the surface of the ultra-thin copper layer, or the chromatic aberration on the surface of the surface-treated layer when various surface treatments such as roughening treatment are performed. That is, the copper foil with a carrier of the present invention preferably controls the chromatic aberration of the roughened surface of the ultra-thin copper layer in such a manner as to satisfy the following (1). In the surface-treated copper foil of the present invention, the "roughening treatment surface" is subjected to surface treatment for providing a heat-resistant layer, a rust-preventing layer, a weather-resistant layer, or the like after the roughening treatment. It refers to the surface of the surface-treated copper foil (very thin copper layer) after the surface treatment. Further, in the case where the surface-treated copper foil is an extremely thin copper layer with a carrier copper foil, the "roughening treatment surface" is used to provide a heat-resistant layer, a rust-proof layer, and a weather-resistant layer after the roughening treatment. In the case of surface treatment, the surface of the ultra-thin copper layer after the surface treatment is performed.

(1)極薄銅層表面之式差中,基於JISZ8730之色差△E* ab為45以上。 (1) In the formula of the surface of the ultra-thin copper layer, the color difference ΔE* ab based on JISZ8730 is 45 or more.

此處,色差△L、△a、△b係分別以色差計進行測定,添加黑/白/紅/綠/黃/藍,使用基於JIS Z8730之L* a* b表色系統而表示之綜合指標,以△L:黑白、△a:紅綠、△b:黃藍之形式表示。又,△E * ab係使用該等色差以下述式表示。 Here, the color difference ΔL, Δa, and Δb are measured by a color difference meter, and black/white/red/green/yellow/blue is added, and the combination is expressed by the L* a* b color system based on JIS Z8730. The index is expressed in the form of ΔL: black and white, Δa: red green, Δb: yellow blue. Further, ΔE*ab is expressed by the following formula using these chromatic aberrations.

上述色差可藉由提高極薄銅層形成時之電流密度、降低鍍敷液中之銅濃度、提高鍍敷液之線性流速而進行調整 The above color difference can be adjusted by increasing the current density when the ultra-thin copper layer is formed, reducing the copper concentration in the plating solution, and increasing the linear flow rate of the plating solution.

又,上述色差亦可藉由對極薄銅層之表面實施粗化處理而設置粗化處理層來進行調整。於設置粗化處理層之情形時,可藉由使用含有選自由銅 及鎳、鈷、鎢、鉬組成之群中一種以上之元素的電解液,較習知提高電流密度(例如40~60A/dm2),並縮短處理時間(例如0.1~1.3秒鐘)而進行調整。於在極薄銅層之表面未設置粗化處理層之情形時,可藉由如下方式達成,即,使用將Ni之濃度設為其他元素之2倍以上之鍍浴,於極薄銅層或耐熱層或防銹層或鉻酸鹽處理層或矽烷偶合處理層之表面,對Ni合金鍍敷(例如Ni-W合金鍍敷、Ni-Co-P合金鍍敷、Ni-Zn合金鍍敷),設定與習知相比較低之電流密度(0.1~1.3A/dm2)且長處理時間(20秒鐘~40秒鐘)而進行處理。 Further, the chromatic aberration may be adjusted by providing a roughening treatment layer by roughening the surface of the ultra-thin copper layer. In the case where the roughening treatment layer is provided, it is possible to increase the current density (for example, 40 to 60 A/by using an electrolytic solution containing one or more elements selected from the group consisting of copper and nickel, cobalt, tungsten, and molybdenum. Dm 2 ), and adjust the processing time (for example, 0.1 to 1.3 seconds). When the roughened layer is not provided on the surface of the ultra-thin copper layer, it can be achieved by using a plating bath in which the concentration of Ni is twice or more of other elements, in an extremely thin copper layer or Ni alloy plating (for example, Ni-W alloy plating, Ni-Co-P alloy plating, Ni-Zn alloy plating) on the surface of the heat-resistant layer or the rust-preventive layer or the chromate-treated layer or the decane coupling treatment layer Set a lower current density (0.1~1.3A/dm 2 ) and a longer processing time (20 seconds to 40 seconds) than conventional processing.

極薄銅層表面之式差中,若基於JISZ8730之色差△E* ab為45以上,則例如於在附載體銅箔之極薄銅層表面形成電路時,極薄銅層與電路之對比變得鮮明,其結果,視認性變良好而可精度良好地進行電路之位置對準。極薄銅層表面基於JISZ8730之色差△E* ab較佳為50以上,更佳為55以上,進而更佳為60以上。 In the case of the difference in the surface of the ultra-thin copper layer, if the color difference ΔE* ab based on JIS Z8730 is 45 or more, for example, when a circuit is formed on the surface of the ultra-thin copper layer with the carrier copper foil, the contrast between the extremely thin copper layer and the circuit becomes As a result, the visibility is improved, and the positional alignment of the circuit can be performed with high precision. The surface of the ultra-thin copper layer based on JIS Z8730 has a color difference ΔE* ab of preferably 50 or more, more preferably 55 or more, still more preferably 60 or more.

於對極薄銅層表面之色差進行如上所述之控制的情形時,與電路鍍層之對比變得鮮明,視認性變良好。因此,於如上所述之印刷配線板之例如如圖2-C所示之製造步驟中,可精度良好地於特定之位置形成電路鍍層。又,根據如上所述之印刷配線板之製造方法,由於成為將電路鍍層埋入於樹脂層中之構成,因此於例如如圖5-J所示之利用快速蝕刻去除極薄銅層時,電路鍍層經樹脂層保護,其形狀得以保持,藉此易於形成微細電路。又,由於電路鍍層經樹脂層保護,因此耐遷移性提高,而良好地抑制電路之配線之導通。因此,易於形成微細電路。又,於如圖5-J及圖5-K所示般藉由快速蝕刻去除極薄銅層時,電路鍍層之露出面成為自樹脂層凹陷之形狀,因此分別容易於該電路鍍層上形成凸塊,進而於其上形成銅柱,而提高製造效率。 When the chromatic aberration on the surface of the ultra-thin copper layer is controlled as described above, the contrast with the circuit plating layer becomes clear, and the visibility becomes good. Therefore, in the manufacturing step of the printed wiring board as described above, for example, as shown in FIG. 2-C, the circuit plating layer can be formed accurately at a specific position. Further, according to the method for manufacturing a printed wiring board as described above, since the circuit plating layer is buried in the resin layer, the circuit is removed by rapid etching, for example, as shown in FIG. 5-J. The plating layer is protected by a resin layer, and its shape is maintained, whereby it is easy to form a fine circuit. Further, since the circuit plating layer is protected by the resin layer, the migration resistance is improved, and the wiring of the circuit is favorably suppressed. Therefore, it is easy to form a fine circuit. Further, when the ultra-thin copper layer is removed by rapid etching as shown in FIGS. 5-J and 5-K, the exposed surface of the circuit plating layer is recessed from the resin layer, so that it is easy to form a convex on the circuit plating layer, respectively. The block, which in turn forms a copper pillar, increases manufacturing efficiency.

再者,嵌入樹脂(resin)可使用公知之樹脂、預浸體。例如 可使用含浸有BT(雙順丁烯二醯亞胺三)樹脂或BT樹脂之玻璃布的預浸體、Ajinomoto Fine-Techno股份有限公司製造之ABF膜或ABF。又,上述嵌入樹脂(resin)可使用本說明書中記載之樹脂層及/或樹脂及/或預浸體。 Further, as the resin, a known resin or a prepreg can be used. For example, it can be impregnated with BT (bis-s-butylene diimine III) A prepreg of glass cloth of resin or BT resin, ABF film manufactured by Ajinomoto Fine-Techno Co., Ltd. or ABF. Further, the resin layer and/or the resin and/or the prepreg described in the present specification can be used as the above-mentioned resin.

又,上述第一層中使用之附載體銅箔亦可於該附載體銅箔的表面具有基板或樹脂層。藉由具有該基板或樹脂層,第一層中使用之附載體銅箔受到支持,不易產生褶皺,因此具有生產性提高之優點。再者,只要上述基板或樹脂層具有支持上述第一層中使用之附載體銅箔之效果,則可使用所有基板或樹脂層。例如,作為上述基板或樹脂層,可使用本申請案說明書中記載之載體、預浸體、樹脂層或公知之載體、預浸體、樹脂層、金屬板、金屬箔、無機化合物之板、無機化合物之箔、有機化合物之板、有機化合物之箔。 Further, the copper foil with a carrier used in the first layer may have a substrate or a resin layer on the surface of the copper foil with the carrier. By having the substrate or the resin layer, the copper foil with a carrier used in the first layer is supported, and wrinkles are less likely to occur, so that productivity is improved. Further, as long as the substrate or the resin layer has an effect of supporting the copper foil with a carrier used in the first layer, all of the substrate or the resin layer can be used. For example, as the substrate or the resin layer, a carrier, a prepreg, a resin layer, or a known carrier, a prepreg, a resin layer, a metal plate, a metal foil, an inorganic compound plate, or an inorganic substance described in the specification of the present application can be used. A foil of a compound, a plate of an organic compound, or a foil of an organic compound.

可將本發明之表面處理銅箔自表面處理層側貼合於樹脂基板而製造積層體。樹脂基板只要為具有可應用於印刷配線板等之特性者,則並不受特別限制,例如,剛性PWB用可使用紙基材酚系樹脂、紙基材環氧樹脂、合成纖維布基材環氧樹脂、氟樹脂含浸布、玻璃布-紙複合基材環氧樹脂、玻璃布-玻璃不織布複合基材環氧樹脂及玻璃布基材環氧樹脂等,可撓性印刷基板(FPC)用可使用聚酯膜或聚醯亞胺膜、液晶聚合物(LCP)膜、氟樹脂及氟樹脂-聚醯亞胺複合材料等。再者,由於液晶聚合物(LCP)之介電損耗小,故而高頻電路用途之印刷配線板較佳為使用液晶聚合物(LCP)膜。 The surface-treated copper foil of the present invention can be bonded to the resin substrate from the surface treatment layer side to produce a laminate. The resin substrate is not particularly limited as long as it has characteristics suitable for use in a printed wiring board or the like. For example, a paper substrate phenol resin, a paper substrate epoxy resin, or a synthetic fiber cloth substrate ring can be used for the rigid PWB. Oxygen resin, fluororesin impregnated cloth, glass cloth-paper composite substrate epoxy resin, glass cloth-glass non-woven composite substrate epoxy resin, glass cloth substrate epoxy resin, etc., flexible printed circuit board (FPC) A polyester film or a polyimide film, a liquid crystal polymer (LCP) film, a fluororesin, and a fluororesin-polyimine composite material are used. Further, since the dielectric loss of the liquid crystal polymer (LCP) is small, it is preferable to use a liquid crystal polymer (LCP) film for the printed wiring board for high-frequency circuit use.

關於貼合之方法,於剛性PWB用之情形時,準備使玻璃布等基材含浸樹脂,使樹脂硬化直至半硬化狀態之預浸體。可藉由使銅箔與預浸體重疊並加熱加壓而進行。於FPC之情形時,經由接合劑、或不使用接合劑而使液晶聚合物或聚醯亞胺膜等基材於高溫高壓下與銅箔積層接 合,或對聚醯亞胺前驅物進行塗佈、乾燥、硬化等,藉此可製造積層板。 In the case of the rigid PWB, the bonding method is prepared by impregnating a substrate such as a glass cloth with a resin to cure the resin to a semi-hardened prepreg. This can be carried out by overlapping the copper foil with the prepreg and heating and pressurizing. In the case of FPC, a substrate such as a liquid crystal polymer or a polyimide film is laminated to a copper foil under high temperature and high pressure via a bonding agent or without using a bonding agent. The laminate or the polyimide precursor can be coated, dried, hardened, or the like, whereby a laminate can be produced.

本發明之積層體可用於各種印刷配線板(PWB),並無特別限制,例如,就導體圖案之層數的觀點而言,可用於單面PWB、雙面PWB、多層PWB(3層以上),就絕緣基板材料之種類的觀點而言,可用於剛性PWB、可撓性PWB(FPC)、軟硬複合PWB。 The laminate of the present invention can be used for various printed wiring boards (PWB), and is not particularly limited. For example, from the viewpoint of the number of layers of the conductor pattern, it can be used for single-sided PWB, double-sided PWB, and multilayer PWB (three or more layers). From the viewpoint of the type of the insulating substrate material, it can be used for rigid PWB, flexible PWB (FPC), and soft and hard composite PWB.

[實施例] [Examples]

準備厚度18μm之壓延銅箔(JX日鑛日石金屬製造之C1100)、或厚度18μm之電解銅箔作為實施例1~35及比較例1~28之銅箔基材。再者,銅箔基材於必要時可藉由上述方法控制表面處理前之表面粗糙度Rz與光澤度。 A rolled copper foil (C1100 manufactured by JX Nippon Mining & Metal Co., Ltd.) having a thickness of 18 μm or an electrolytic copper foil having a thickness of 18 μm was prepared as the copper foil substrates of Examples 1 to 35 and Comparative Examples 1 to 28. Further, the copper foil substrate can be controlled by the above method to control the surface roughness Rz and gloss before surface treatment.

又,準備以下所記載之附載體銅箔作為實施例36~40之銅箔基材。 Further, the copper foil with a carrier described below was prepared as the copper foil substrate of Examples 36 to 40.

對實施例36~38、40,準備厚度18μm之電解銅箔作為載體,對實施例39,準備厚度18μm之壓延銅箔(JX日鑛日石金屬製造之C1100)作為載體。並且,於下述條件下,於載體之表面形成中間層,於中間層之表面形成極薄銅層。再者,載體於必要時可藉由上述方法控制形成中間層之側的表面中間層形成前之表面的表面粗糙度Rz與光澤度。 For Examples 36 to 38 and 40, an electrolytic copper foil having a thickness of 18 μm was prepared as a carrier, and in Example 39, a rolled copper foil (C1100 manufactured by JX Nippon Mining & Metal Co., Ltd.) having a thickness of 18 μm was prepared as a carrier. Further, an intermediate layer was formed on the surface of the carrier under the following conditions, and an extremely thin copper layer was formed on the surface of the intermediate layer. Further, the carrier may, if necessary, control the surface roughness Rz and glossiness of the surface before the formation of the surface intermediate layer on the side where the intermediate layer is formed by the above method.

.實施例36 . Example 36

<中間層> <intermediate layer>

(1)Ni層(鍍Ni) (1) Ni layer (Ni plating)

對載體,以如下條件於卷對卷(roll to roll)型之連續鍍敷生產線上進行電鍍,藉此形成1000μg/dm2之附著量的Ni層。將具體之鍍敷條件記載於以下。 The carrier was subjected to electroplating on a continuous roll-to-roll type continuous plating line under the following conditions, thereby forming a Ni layer of an adhesion amount of 1000 μg/dm 2 . The specific plating conditions are described below.

硫酸鎳:270~280g/L Nickel sulfate: 270~280g/L

氯化鎳:35~45g/L Nickel chloride: 35~45g/L

乙酸鎳:10~20g/L Nickel acetate: 10~20g/L

硼酸:30~40g/L Boric acid: 30~40g/L

光澤劑:糖精、丁二醇等 Gloss: saccharin, butylene glycol, etc.

十二基硫酸鈉:55~75ppm Sodium dodecyl sulfate: 55~75ppm

pH值:4~6 pH: 4~6

浴溫:55~65℃ Bath temperature: 55~65°C

電流密度:10A/dm2 Current density: 10A/dm 2

(2)Cr層(電解鉻酸鹽處理) (2) Cr layer (electrolytic chromate treatment)

繼而,於將(1)中形成之Ni層表面水洗及酸洗後,繼而於卷對卷型之連續鍍敷生產線上,於Ni層之上以如下條件進行電解鉻酸鹽處理,藉此使11μg/dm2之附著量的Cr層附著。 Then, after the surface of the Ni layer formed in (1) is washed with water and pickled, and then subjected to electrolytic chromate treatment on the Ni layer under the following conditions on a roll-to-roll continuous plating line, A Cr layer having an adhesion amount of 11 μg/dm 2 was attached.

重鉻酸鉀:1~10g/L、鋅:0g/L Potassium dichromate: 1~10g/L, zinc: 0g/L

pH值:7~10 pH: 7~10

液溫:40~60℃ Liquid temperature: 40~60°C

電流密度:2A/dm2 Current density: 2A/dm 2

<極薄銅層> <very thin copper layer>

繼而,於將(2)中形成之Cr層表面水洗及酸洗後,繼而於卷對卷型之連續鍍敷生產線上,以如下條件進行電鍍,藉此於Cr層之上形成厚度1.5μm之極薄銅層,從而製作附載體極薄銅箔。 Then, after the surface of the Cr layer formed in (2) is washed with water and pickled, and then subjected to electroplating on a roll-to-roll type continuous plating line, the thickness is 1.5 μm formed on the Cr layer. An extremely thin copper layer is used to make an extremely thin copper foil with a carrier.

銅濃度:90~110g/L Copper concentration: 90~110g/L

硫酸濃度:90~110g/L Sulfuric acid concentration: 90~110g/L

氯化物離子濃度:50~90ppm Chloride ion concentration: 50~90ppm

調平劑1(雙(3-磺丙基)二硫化物):10~30ppm Leveling agent 1 (bis(3-sulfopropyl) disulfide): 10~30ppm

調平劑2(胺化合物):10~30ppm Leveling agent 2 (amine compound): 10~30ppm

再者,使用下述胺化合物作為調平劑2。 Further, the following amine compound was used as the leveling agent 2.

(上述化學式中,R1及R2係選自由羥烷基、醚基、芳基、芳香族取代烷基、不飽和烴基、烷基組成之一群中者) (In the above chemical formula, R 1 and R 2 are selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group)

電解液溫度:50~80℃ Electrolyte temperature: 50~80°C

電流密度:100A/dm2 Current density: 100A/dm 2

電解液線速度:1.5~5m/sec Electrolyte line speed: 1.5~5m/sec

.實施例37 . Example 37

<中間層> <intermediate layer>

(1)Ni-Mo層(鎳鉬合金鍍敷) (1) Ni-Mo layer (nickel-molybdenum alloy plating)

對載體,以如下條件於卷對卷型之連續鍍敷生產線上進行電鍍,藉此形成3000μg/dm2之附著量的Ni-Mo層。將具體之鍍敷條件記載於以下。 The carrier was subjected to electroplating on a roll-to-roll continuous plating line under the following conditions, thereby forming a Ni-Mo layer having an adhesion amount of 3000 μg/dm 2 . The specific plating conditions are described below.

(液體組成)硫酸Ni六水合物:50g/dm3,鉬酸鈉二水合物:60g/dm3,檸檬酸鈉:90g/dm3 (liquid composition) Ni hexahydrate: 50 g/dm 3 , sodium molybdate dihydrate: 60 g/dm 3 , sodium citrate: 90 g/dm 3

(液溫)30℃ (liquid temperature) 30 ° C

(電流密度)1~4A/dm2 (current density) 1~4A/dm 2

(通電時間)3~25秒鐘 (Power-on time) 3~25 seconds

<極薄銅層> <very thin copper layer>

於(1)中形成之Ni-Mo層之上形成極薄銅層。除將極薄銅層之厚度設為2μm以外,以與實施例36同樣之條件形成極薄銅層。 An extremely thin copper layer is formed on the Ni-Mo layer formed in (1). An extremely thin copper layer was formed under the same conditions as in Example 36 except that the thickness of the ultra-thin copper layer was 2 μm.

.實施例38 . Example 38

<中間層> <intermediate layer>

(1)Ni層(鍍Ni) (1) Ni layer (Ni plating)

以與實施例36相同之條件形成Ni層。 A Ni layer was formed under the same conditions as in Example 36.

(2)有機物層(有機物層形成處理) (2) Organic layer (organic layer formation treatment)

繼而,於將(1)中形成之Ni層表面水洗及酸洗後,繼而以下述條件對Ni層表面噴淋含有濃度1~30g/L之羧基苯并三唑(CBTA)之液溫40℃、pH值5之水溶液20~120秒鐘而進行噴霧,藉此形成有機物層。 Then, after the surface of the Ni layer formed in (1) was washed with water and pickled, the surface of the Ni layer was sprayed with a liquid temperature of 40 ° C containing a concentration of 1 to 30 g/L of carboxybenzotriazole (CBTA) under the following conditions. The aqueous solution having a pH of 5 was sprayed for 20 to 120 seconds to form an organic layer.

<極薄銅層> <very thin copper layer>

於(2)中形成之有機物層之上形成極薄銅層。除將極薄銅層之厚度設為3μm以外,以與實施例36同樣之條件形成極薄銅層。 An extremely thin copper layer is formed on the organic layer formed in (2). An extremely thin copper layer was formed under the same conditions as in Example 36 except that the thickness of the ultra-thin copper layer was changed to 3 μm.

.實施例39、40 . Example 39, 40

<中間層> <intermediate layer>

(1)Co-Mo層(鈷鉬合金鍍敷) (1) Co-Mo layer (cobalt-molybdenum alloy plating)

對載體,以如下條件於卷對卷型之連續鍍敷生產線上進行電鍍,藉此形成4000μg/dm2之附著量的Co-Mo層。將具體之鍍敷條件記載於以下。 The carrier was subjected to electroplating on a roll-to-roll continuous plating line under the following conditions, thereby forming a Co-Mo layer of an adhesion amount of 4000 μg/dm 2 . The specific plating conditions are described below.

(液體組成)硫酸Co:50g/dm3,鉬酸鈉二水合物:60g/dm3,檸檬酸鈉:90g/dm3 (liquid composition) sulfuric acid Co: 50 g/dm 3 , sodium molybdate dihydrate: 60 g/dm 3 , sodium citrate: 90 g/dm 3

(液溫)30℃ (liquid temperature) 30 ° C

(電流密度)1~4A/dm2 (current density) 1~4A/dm 2

(通電時間)3~25秒鐘 (Power-on time) 3~25 seconds

<極薄銅層> <very thin copper layer>

於(1)中形成之Co-Mo層之上形成極薄銅層。除將極薄銅層之厚度於實施例39中設為5μm、於實施例40中設為3μm以外,以與實施例36同樣之條件形成極薄銅層。 An extremely thin copper layer is formed on the Co-Mo layer formed in (1). An extremely thin copper layer was formed under the same conditions as in Example 36 except that the thickness of the ultra-thin copper layer was set to 5 μm in Example 39 and 3 μm in Example 40.

繼而,關於實施例1~40及比較例1~28中準備之壓延銅箔、電解銅箔、附載體銅箔,於表1~3所示之條件下進行鍍敷作為表面處理。表1表示各液1~11之液體組成、pH值、溫度、電流密度。表2及表3表示藉由記載之浴組成及時間依序進行鍍敷處理1~4。再者,於該鍍敷後,藉由Zn、Ni或該等之合金鍍敷、及鉻酸鹽處理確保耐熱性,進而藉由塗佈胺基系矽烷而提高剝離強度。 Then, the rolled copper foil, the electrolytic copper foil, and the copper foil with a carrier prepared in Examples 1 to 40 and Comparative Examples 1 to 28 were plated under the conditions shown in Tables 1 to 3 as a surface treatment. Table 1 shows the liquid composition, pH, temperature, and current density of each of the liquids 1 to 11. Tables 2 and 3 show that the plating treatments 1 to 4 are sequentially performed by the bath composition and time described. Further, after the plating, heat resistance is ensured by Zn, Ni or alloy plating and chromate treatment, and the peel strength is improved by coating the amine-based decane.

胺基系矽烷之塗佈條件如下所述。 The coating conditions of the amino decane are as follows.

.胺基系矽烷:N-2-(胺基乙基)-3-胺基丙基三甲氧基矽烷 . Amino decane: N-2-(aminoethyl)-3-aminopropyltrimethoxydecane

.矽烷濃度:5.0vol%(剩餘部分:水) . Decane concentration: 5.0 vol% (remaining part: water)

.處理溫度:45~55℃ . Processing temperature: 45~55°C

.處理時間:5秒鐘 . Processing time: 5 seconds

.矽烷處理後之乾燥:100℃×3秒鐘 . Drying after decane treatment: 100 ° C × 3 seconds

再者,實施例5、11、18、20、21、25、26、27、31、34、40、比較例27之表面處理相當於平滑鍍敷處理(非粗化處理之表面處理),此外之實施例及比較例中的表面處理相當於粗化處理。 Further, the surface treatments of Examples 5, 11, 18, 20, 21, 25, 26, 27, 31, 34, 40, and Comparative Example 27 correspond to a smooth plating treatment (surface treatment without non-roughening treatment), The surface treatment in the examples and comparative examples corresponds to the roughening treatment.

對於以上述方式製作之實施例及比較例之各樣品,如下所述般進行各種評價。 Each of the samples of the examples and the comparative examples produced in the above manner was subjected to various evaluations as described below.

<附著量之測定> <Measurement of adhesion amount>

對於測定表面處理層之各種金屬的附著量,係使50mm×50mm之銅箔表面之皮膜溶解於混合有HNO3(2重量%)與HCl(5重量%)之溶液中,藉由ICP發光分光分析裝置(SII NanoTechnology股份有限公司製造,SFC- 3100)將該溶液中之金屬濃度定量,算出每單位面積之金屬量(μg/dm2)而導出。此時,為了不使與欲進行測定之面為相反面的金屬附著量混入,視需要進行遮蔽,並進行分析。再者,測定係對實施了上述Zn、Ni或該等之合金鍍敷、及鉻酸鹽處理、進而胺基系矽烷處理後之樣品進行。 For measuring the adhesion amount of various metals of the surface treatment layer, a film of a surface of a copper foil of 50 mm × 50 mm was dissolved in a solution in which HNO 3 (2% by weight) and HCl (5% by weight) were mixed, and ICP emission was used for spectroscopy. The analysis device (manufactured by SII NanoTechnology Co., Ltd., SFC-3100) quantifies the metal concentration in the solution, and calculates the amount of metal per unit area (μg/dm 2 ). At this time, in order to prevent the metal adhesion amount which is opposite to the surface to be measured from being mixed, it is shielded as necessary and analyzed. Further, the measurement was carried out on a sample obtained by performing the above-described Zn, Ni or the alloy plating, the chromate treatment, and the amine-based decane treatment.

<表面粗糙度Rz之測定> <Measurement of Surface Roughness Rz>

使用小阪研究所股份有限公司製造之接觸粗糙度計SP-11,依據JIS B0601-1994而對表面處理面測定十點平均粗糙度。於測定基準長度0.8mm、評價長度4mm、截斷值0.25mm、進給速度0.1mm/秒鐘之條件下變更測定位置,進行10次,求出10次測定之值。 The ten-point average roughness of the surface-treated surface was measured in accordance with JIS B0601-1994 using a contact roughness meter SP-11 manufactured by Kosaka Research Institute Co., Ltd. The measurement position was changed under the conditions of a measurement reference length of 0.8 mm, an evaluation length of 4 mm, a cutoff value of 0.25 mm, and a feed rate of 0.1 mm/sec, and the measurement was performed 10 times, and the value of 10 measurements was obtained.

<傳輸損耗之測定> <Measurement of transmission loss>

對18μm厚之各樣品,將該各樣品經表面處理之側與市售之液晶聚合物樹脂(可樂麗股份有限公司製造之Vecstar CTZ-50μm)貼合後,以利用蝕刻使特性阻抗成為50Ω之方式形成微波傳輸帶線路,使用HP公司製造之網路分析儀HP8720C測定穿透係數,而求出頻率20GHz及頻率40GHz之傳輸損耗。作為頻率20GHz之傳輸損耗的評價,將未達3.7dB/10cm評價為◎,將3.7dB/10cm以上且未達4.1dB/10cm評價為○,將4.1dB/10cm以上且未達5.0dB/10cm評價為△,將5.0dB/10cm以上評價為×。再者,對附載體銅箔,於將極薄銅層經表面處理之側與上述市售之液晶聚合物樹脂(可樂麗股份有限公司製造之Vecstar CTZ-50μm)貼合後,將載體剝離,然後,對極薄銅層進行鍍銅,使極薄銅層與鍍銅層之合計厚度成為18μm。然後,進行與上述同樣之測定。 For each sample having a thickness of 18 μm, the surface of each of the samples was bonded to a commercially available liquid crystal polymer resin (Vecstar CTZ-50 μm manufactured by Kuraray Co., Ltd.), and the characteristic impedance was 50 Ω by etching. In the manner of forming a microstrip line, the transmission coefficient was measured using a network analyzer HP8720C manufactured by HP, and the transmission loss at a frequency of 20 GHz and a frequency of 40 GHz was obtained. The evaluation of the transmission loss at a frequency of 20 GHz was evaluated as ◎ as less than 3.7 dB/10 cm, and as ○ at 3.7 dB/10 cm or more and less than 4.1 dB/10 cm, and 4.1 dB/10 cm or more and less than 5.0 dB/10 cm. The evaluation was Δ, and 5.0 dB/10 cm or more was evaluated as ×. Further, after attaching the carrier copper foil to the surface of the ultra-thin copper layer and the commercially available liquid crystal polymer resin (Vecstar CTZ-50 μm manufactured by Kuraray Co., Ltd.), the carrier was peeled off. Then, the ultra-thin copper layer was plated with copper so that the total thickness of the ultra-thin copper layer and the copper-plated layer was 18 μm. Then, the same measurement as described above was carried out.

<接合性> <joinability>

首先,對設置有被覆層(表面處理層)之銅箔,藉由真空加熱加壓將市售之液晶聚合物樹脂(可樂麗股份有限公司製造之Vecstar CTZ-50μm)之液晶聚合物膜接合。 First, a liquid crystal polymer film of a commercially available liquid crystal polymer resin (Vecstar CTZ-50 μm manufactured by Kuraray Co., Ltd.) was bonded to a copper foil provided with a coating layer (surface treatment layer) by vacuum heat and pressure.

繼而,對積層有液晶聚合物之銅箔,依據90°剝離法(JIS C 6471 8.1)測定剝離強度。再者,對附載體銅箔,藉由真空加熱加壓使極薄銅層之設置有被覆層之側(經表面處理之側)與上述市售之液晶聚合物樹脂(可樂麗股份有限公司製造之Vecstar CTZ-50μm)接合後,將載體剝離,然後,對極薄銅層進行鍍銅,使極薄銅層與鍍銅層之合計厚度成為18μm。然後,進行與上述同樣之測定。 Then, the peeling strength was measured according to the 90° peeling method (JIS C 6471 8.1) on the copper foil in which the liquid crystal polymer was laminated. Further, the copper foil with a carrier is subjected to vacuum heating and pressurization to provide the ultra-thin copper layer on the side of the coating layer (the surface-treated side) and the above-mentioned commercially available liquid crystal polymer resin (manufactured by Kuraray Co., Ltd.). After the bonding of the Vecstar CTZ-50 μm), the carrier was peeled off, and then the ultra-thin copper layer was plated with copper so that the total thickness of the ultra-thin copper layer and the copper-plated layer was 18 μm. Then, the same measurement as described above was carried out.

<鹼蝕刻性> <alkali etching property>

再者,對實施例11與實施例34,對積層有上述液晶聚合物之銅箔進行鹼蝕刻性的調查。 Further, in Example 11 and Example 34, the copper foil in which the liquid crystal polymer was laminated was investigated for alkali etching property.

.使用藥液:Meltex股份有限公司製造之A-Process . Use of liquid medicine: A-Process manufactured by Meltex Co., Ltd.

.溫度:50℃ . Temperature: 50 ° C

.攪拌速度:200rpm . Stirring speed: 200rpm

其結果,實施例11中,目測確認到於300秒鐘內全部溶解。另一方面,實施例34中,至全部溶解為止需要315秒鐘之時間。因此,可知,實施例11之鹼蝕刻性優異。 As a result, in Example 11, it was confirmed by visual observation that it was all dissolved in 300 seconds. On the other hand, in Example 34, it took 315 seconds until all dissolved. Therefore, it is understood that the alkali etching property of Example 11 is excellent.

將評價結果示於表4及表5中。又,圖1中,表示將x軸設為Co、Ni、Fe、Mo之合計附著量(μg/dm2),將y軸設為表面處理面之表面粗糙度Rz(μm)而繪製的實施例及比較例之附著量-表面粗糙度圖表。 The evaluation results are shown in Tables 4 and 5. In addition, FIG. 1 shows an example in which the x-axis is the total adhesion amount (μg/dm 2 ) of Co, Ni, Fe, and Mo, and the y-axis is the surface roughness Rz (μm) of the surface-treated surface. Examples of adhesion and surface roughness of the comparative examples.

(評價結果) (Evaluation results)

實施例之任一者於將x軸設為表面處理層中Co、Ni、Fe、Mo之合計附著量(μg/dm2),將y軸設為表面處理面之表面粗糙度Rz(μm)而繪製之附著量-表面粗糙度圖表中,均位於由x=0、y=0、y=-0.000189x+1.400000、及y=-0.002333x+9.333333之4條直線包圍之區域內,故而將傳輸損耗良好地抑制為4.0dB/10cm以下。進而任一實施例均具有良好之接合性。 In any of the examples, the x-axis is the total adhesion amount (μg/dm 2 ) of Co, Ni, Fe, and Mo in the surface treatment layer, and the y-axis is the surface roughness Rz (μm) of the surface-treated surface. The plotted adhesion-surface roughness chart is located in the area surrounded by 4 lines of x=0, y=0, y=-0.000189x+1.400000, and y=-0.002333x+9.333333, so The transmission loss is satisfactorily suppressed to 4.0 dB/10 cm or less. Further, any of the examples has good adhesion.

另一方面,比較例之任一者均為藉由上述4條直線包圍之區域外,故而傳輸損耗大於4.0dB/10cm而不良。 On the other hand, any of the comparative examples is outside the region surrounded by the above four straight lines, and thus the transmission loss is more than 4.0 dB/10 cm and is defective.

再者,於本實施例中,使用對厚度18μm之銅箔或附載體銅箔的極薄銅層進行鍍銅,而使極薄銅層與鍍銅層之厚度之合計厚度成為18μm的銅箔,如上所述,由於在高頻區域中存在電流僅於導體表面流通之集膚效應的現象,故而銅箔厚度對阻抗控制造成影響,但並未嚴重干預傳輸損耗。因此認為,對18μm以外之厚度的銅箔,藉由控制本發明之粗糙度與表面處理之金屬量,亦可抑制傳輸損耗。 Further, in the present embodiment, copper plating is performed using an extremely thin copper layer of a copper foil having a thickness of 18 μm or a copper foil with a carrier, and a copper foil having a total thickness of the ultra-thin copper layer and the copper plating layer is 18 μm. As described above, since there is a phenomenon in which a current is distributed only on the surface of the conductor in the high-frequency region, the thickness of the copper foil affects the impedance control, but does not seriously interfere with the transmission loss. Therefore, it is considered that the copper foil having a thickness other than 18 μm can also suppress the transmission loss by controlling the roughness of the present invention and the amount of metal to be surface-treated.

Claims (22)

一種表面處理銅箔,其形成有表面處理層,於將x軸設為表面處理層中Co、Ni、Fe、Mo之合計附著量(μg/dm2),將y軸設為表面處理面之表面粗糙度Rz(μm)而繪製的附著量-表面粗糙度圖表中,該表面處理銅箔位於由如下4條直線包圍之區域內,x=220、y=0、y=-0.000189x+1.400000、及y=-0.002333x+9.333333。 A surface-treated copper foil having a surface-treated layer formed by using a x-axis as a total adhesion amount (μg/dm 2 ) of Co, Ni, Fe, and Mo in a surface-treated layer, and a y-axis as a surface-treated surface In the adhesion amount-surface roughness chart drawn by the surface roughness Rz (μm), the surface-treated copper foil is located in a region surrounded by the following four straight lines, x=220, y=0, y=-0.000189x+1.400000 And y=-0.002333x+9.333333. 如申請專利範圍第1項之表面處理銅箔,於該附著量-表面粗糙度圖表中,其位於由如下4條直線包圍之區域內,x=220、y=0、y=-0.000183x+1.100000、及y=-0.002200x+7.150000。 The surface-treated copper foil according to claim 1 of the patent application, in the adhesion amount-surface roughness chart, is located in a region surrounded by the following four straight lines, x=220, y=0, y=-0.000183x+ 1.100000, and y=-0.002200x+7.150000. 一種表面處理銅箔,其形成有表面處理層,於將x軸設為表面處理層中Co、Ni、Fe、Mo之合計附著量(μg/dm2),將y軸設為表面處理面之表面粗糙度Rz(μm)而繪製的附著量-表面粗糙度圖表中,該表面處理銅箔位於由如下4條直線包圍之區域內,x=0、y=0、y=0.30、及y=-0.002333x+9.333333。 A surface-treated copper foil having a surface-treated layer formed by using a x-axis as a total adhesion amount (μg/dm 2 ) of Co, Ni, Fe, and Mo in a surface-treated layer, and a y-axis as a surface-treated surface In the adhesion amount-surface roughness chart drawn by the surface roughness Rz (μm), the surface-treated copper foil is located in a region surrounded by the following four straight lines, x=0, y=0, y=0.30, and y= -0.002333x+9.333333. 如申請專利範圍第3項之表面處理銅箔,於該附著量-表面粗糙度圖表中,其位於由如下4條直線包圍之區域內, x=0、y=0、y=0.30、及y=-0.002200x+7.150000。 The surface-treated copper foil of claim 3, in the adhesion amount-surface roughness chart, is located in an area surrounded by the following four straight lines, x=0, y=0, y=0.30, and y=-0.002200x+7.150000. 一種表面處理銅箔,其形成有表面處理層,於將x軸設為表面處理層中Co、Ni、Fe、Mo之合計附著量(μg/dm2),將y軸設為表面處理面之表面粗糙度Rz(μm)而繪製的附著量-表面粗糙度圖表中,該表面處理銅箔位於由如下4條直線包圍之區域內,x=0、y=0.70、y=-0.000189x+1.400000、及y=-0.002333x+9.333333。 A surface-treated copper foil having a surface-treated layer formed by using a x-axis as a total adhesion amount (μg/dm 2 ) of Co, Ni, Fe, and Mo in a surface-treated layer, and a y-axis as a surface-treated surface In the adhesion amount-surface roughness chart drawn by the surface roughness Rz (μm), the surface-treated copper foil is located in a region surrounded by the following four straight lines, x=0, y=0.70, y=-0.000189x+1.400000 And y=-0.002333x+9.333333. 如申請專利範圍第5項之表面處理銅箔,於該附著量-表面粗糙度圖表中,其位於由如下3條直線包圍之區域內,x=0、y=0.70、及y=-0.000183x+1.100000。 The surface-treated copper foil of claim 5, in the adhesion amount-surface roughness chart, is located in a region surrounded by three straight lines, x=0, y=0.70, and y=-0.000183x. +1.100000. 如申請專利範圍第1至6項中任一項之表面處理銅箔,其中,該表面粗糙度Rz為1.3以下。 The surface-treated copper foil according to any one of claims 1 to 6, wherein the surface roughness Rz is 1.3 or less. 如申請專利範圍第7項之表面處理銅箔,其中,該表面粗糙度Rz為1.0以下。 The surface-treated copper foil according to claim 7, wherein the surface roughness Rz is 1.0 or less. 如申請專利範圍第1至6項中任一項之表面處理銅箔,其係可撓性印刷配線板用。 The surface-treated copper foil according to any one of claims 1 to 6, which is used for a flexible printed wiring board. 如申請專利範圍第1至6項中任一項之表面處理銅箔,其係5GHz以上之高頻電路基板用。 The surface-treated copper foil according to any one of claims 1 to 6, which is used for a high-frequency circuit substrate of 5 GHz or more. 如申請專利範圍第1至6項中任一項之表面處理銅箔,其不具有粗化處理層。 The surface-treated copper foil according to any one of claims 1 to 6, which does not have a roughened layer. 如申請專利範圍第1至6項中任一項之表面處理銅箔,其具有粗化處理層。 The surface-treated copper foil according to any one of claims 1 to 6, which has a roughened layer. 如申請專利範圍第1至6項中任一項之表面處理銅箔,其於該表面處理層之表面具備樹脂層。 The surface-treated copper foil according to any one of claims 1 to 6, which has a resin layer on the surface of the surface treatment layer. 如申請專利範圍第13項之表面處理銅箔,其中,該樹脂層含有介電體。 The surface-treated copper foil of claim 13, wherein the resin layer contains a dielectric. 一種附載體銅箔,其於載體之一面或兩面依序具有中間層及極薄銅層,該極薄銅層為申請專利範圍第1至6項中任一項之表面處理銅箔。 A copper foil with a carrier having an intermediate layer and an ultra-thin copper layer on one or both sides of the carrier, the ultra-thin copper layer being the surface-treated copper foil according to any one of claims 1 to 6. 如申請專利範圍第15項之附載體銅箔,於該載體之一面依序具有該中間層及該極薄銅層,於該載體之另一面具有粗化處理層。 The copper foil with carrier of claim 15 is characterized in that the intermediate layer and the ultra-thin copper layer are sequentially provided on one side of the carrier, and the roughened layer is provided on the other side of the carrier. 一種積層板,其係將申請專利範圍第1至16項中任一項之表面處理銅箔與樹脂基板積層而構成。 A laminated board comprising a surface-treated copper foil according to any one of claims 1 to 16 and a resin substrate. 一種印刷配線板,其使用有申請專利範圍第17項之積層板作為材料。 A printed wiring board using a laminate having the scope of claim 17 as a material. 一種印刷電路板,其使用有申請專利範圍第17項之積層板作為材料。 A printed circuit board using a laminate having the scope of claim 17 as a material. 一種電子機器,其使用有申請專利範圍第18項之印刷配線板或申請專利範圍第19項之印刷電路板。 An electronic machine using the printed wiring board of claim 18 or the printed circuit board of claim 19 of the patent application. 一種印刷配線板之製造方法,包括如下步驟:準備申請專利範圍第15或16項之附載體銅箔與絕緣基板;將該附載體銅箔與絕緣基板積層;及於將該附載體銅箔與絕緣基板積層後,經過剝離該附載體銅箔之載體的步驟而形成覆銅積層板, 然後,藉由半加成法、減成法、部分加成法或改良半加成法中任一方法而形成電路。 A manufacturing method of a printed wiring board, comprising the steps of: preparing a copper foil and an insulating substrate with a carrier of claim 15 or 16; laminating the copper foil with the insulating substrate; and bonding the copper foil with the carrier After the insulating substrate is laminated, the copper-clad laminate is formed by the step of peeling off the carrier with the carrier copper foil. Then, the circuit is formed by any one of a semi-additive method, a subtractive method, a partial addition method, or a modified semi-additive method. 一種印刷配線板之製造方法,包括如下步驟:於申請專利範圍第15或16項之附載體銅箔的該極薄銅層側表面形成電路;以埋沒該電路之方式於該附載體銅箔的該極薄銅層側表面形成樹脂層;於該樹脂層上形成電路;於該樹脂層上形成電路後,將該載體剝離;及於將該載體剝離後去除該極薄銅層,藉此而使形成於該極薄銅層側表面之埋沒於該樹脂層的電路露出。 A manufacturing method of a printed wiring board, comprising the steps of: forming a circuit on a side surface of the ultra-thin copper layer of a copper foil with a carrier of claim 15 or 16; and burying the circuit in the copper foil with the carrier a surface of the ultra-thin copper layer is formed with a resin layer; a circuit is formed on the resin layer; after the circuit is formed on the resin layer, the carrier is peeled off; and after the carrier is peeled off, the ultra-thin copper layer is removed, thereby The circuit buried in the resin layer on the side surface of the ultra-thin copper layer is exposed.
TW103101084A 2013-01-11 2014-01-10 Surface-processed copper foil, laminated circuit board, carrier copper foil, printed wiring board, printed circuit board, electronic machine and printed wiring board manufacturing method TWI526303B (en)

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