TW201523816A - 晶片封裝結構及其製造方法 - Google Patents

晶片封裝結構及其製造方法 Download PDF

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TW201523816A
TW201523816A TW102145621A TW102145621A TW201523816A TW 201523816 A TW201523816 A TW 201523816A TW 102145621 A TW102145621 A TW 102145621A TW 102145621 A TW102145621 A TW 102145621A TW 201523816 A TW201523816 A TW 201523816A
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wafer
package structure
chip package
heat dissipation
wafer holder
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TW102145621A
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TWI524482B (zh
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Tsung-Jen Liao
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Chipmos Technologies Inc
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Priority to TW102145621A priority Critical patent/TWI524482B/zh
Priority to CN201410111967.7A priority patent/CN104716110B/zh
Priority to US14/304,975 priority patent/US9123684B2/en
Publication of TW201523816A publication Critical patent/TW201523816A/zh
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Publication of TWI524482B publication Critical patent/TWI524482B/zh

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Abstract

一種晶片封裝結構，其包括一導線架、一晶片、至少一散熱柱以及一封裝膠體。導線架包括一晶片座以及多個引腳。晶片座具有至少一貫孔。引腳環繞晶片座設置。晶片設置於晶片座上並電性連接至引腳。晶片包括一主動表面以及相對主動表面之一背面。晶片以背面設置於晶片座上。散熱柱設置於背面並穿過貫孔。封裝膠體包覆晶片、至少部份引腳以及晶片座。封裝膠體包括至少一開口，以暴露散熱柱。一種製造此晶片封裝結構的方法亦被提出。

Description

晶片封裝結構及其製造方法
本發明是有關於一種半導體封裝結構及其製造方法，且特別是有關於一種晶片封裝結構及其製造方法。
在半導體產業中，積體電路(Integrated Circuits,IC)的生產，主要分為三個階段：晶圓(wafer)的製造、積體電路的製作以及積體電路的封裝(Package)等。其中，裸晶片係經由晶圓(Wafer)製作、電路設計、光罩製作以及切割晶圓等步驟而完成，而每一顆由晶圓切割所形成的裸晶片，在經由裸晶片上之接點與外部訊號電性連接後，可再以封膠材料將裸晶片包覆著，其封裝之目的在於防止裸晶片受到濕氣、熱量、雜訊的影響，並提供裸晶片與外部電路之間電性連接的媒介，如此即完成積體電路的封裝步驟。
隨著積體電路之密集度的增加，晶片的封裝結構越來越複雜而多樣化。另一方面，為了提高封裝結構的散熱效果，通常會在封裝結構上設置散熱片。傳統散熱方式是藉由黏膠(adhesive) 或是銲料(solder)將散熱片貼附在封裝結構表面，然而此種散熱方式散熱片往往無法牢固地貼合在封裝結構上，以至於散熱片可能從封裝結構上剝離或脫落，而影響產品的生產良率以及使用上的可靠度，更需額外耗費散熱片的成本。
本發明提供一種晶片封裝結構，其可提升散熱效率，節省生產成本。
本發明提供一種晶片封裝結構的製作方法，其製作出的晶片封裝結構可提升散熱效率，節省生產成本。
本發明的一種晶片封裝結構，其包括一導線架、一晶片、至少一散熱柱以及一封裝膠體。導線架包括一晶片座以及多個引腳。晶片座具有至少一貫孔。引腳環繞晶片座設置。晶片設置於晶片座上並電性連接至引腳。晶片包括一主動表面以及相對主動表面之一背面。晶片以背面設置於晶片座上。散熱柱設置於背面並穿過貫孔。封裝膠體包覆晶片、至少部份引腳以及晶片座。封裝膠體包括至少一開口，以暴露散熱柱。
一種晶片封裝結構之製造方法包括下列步驟。提供一晶圓。晶圓包括一具有一導電圖案之主動表面以及相對主動表面之一背面，其中晶圓包括多個彼此連接且陣列排列之晶片。設置一具有多個開孔的圖案化乾膜層於晶圓的背面。進行一電鍍製程，以圖案化乾膜層為罩幕而分別於開孔內形成多個散熱柱。移除圖 案化乾膜層。切割晶圓以使晶片彼此分離。各晶片具有散熱柱的至少其中之一。提供一導線架。導線架包括一晶片座以及多個引腳。晶片座具有至少一貫孔。引腳環繞晶片座設置。設置晶片的其中之一於晶片座上並電性連接晶片至引腳，並以晶片之散熱柱穿過貫孔。提供一封裝膠體，以包覆晶片、至少部份引腳以及晶片座。封裝膠體包括至少一開口，並暴露散熱柱。
在本發明的一實施例中，上述的散熱柱的數量為多個。
在本發明的一實施例中，上述的散熱柱位於貫孔內，且開口暴露散熱柱。
在本發明的一實施例中，上述的開口的數量為多個。開口分別暴露散熱柱。
在本發明的一實施例中，上述的貫孔的數量為多個。散熱柱分別位於貫孔內。
在本發明的一實施例中，上述的開口至少暴露各散熱柱的一頂面。
在本發明的一實施例中，上述的晶片封裝結構更包括多個導線。導線分別電性連接晶片與引腳。
在本發明的一實施例中，上述的各引腳包括一內引腳以及一外引腳。導線分別電性連接晶片與內引腳。
在本發明的一實施例中，上述的封裝膠體包覆內引腳。
在本發明的一實施例中，上述的晶片座用以承載晶片的一上表面與各引腳用以與晶片電性連接的一上表面之間具有一高 度差。
在本發明的一實施例中，上述的開口暴露至少部份晶片座。
基於上述，本發明的晶片封裝結構將散熱柱透過電鍍的方式直接形成於晶片的背面，並將晶片設置於導線架的晶片座上，且散熱柱穿過晶片座的貫孔，而封裝膠體更包括對應於散熱柱的開口，以暴露散熱柱。如此，本發明的晶片封裝結構即可透過被封裝膠體暴露的散熱柱將晶片所產生的熱能直接散逸至外界。因此，本發明的晶片封裝結構確實可提升晶片封裝結構的散熱效能，更可省去設置散熱膏或散熱片等額外的散熱元件的成本。
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。
100、100a、100b‧‧‧晶片封裝結構
110‧‧‧導線架
112‧‧‧晶片座
112a‧‧‧貫孔
114‧‧‧引腳
114a‧‧‧內引腳
114b‧‧‧外引腳
120‧‧‧晶片
122‧‧‧主動表面
124‧‧‧背面
126‧‧‧導電圖案
130‧‧‧散熱柱
140‧‧‧封裝膠體
142‧‧‧開口
150‧‧‧基材
160‧‧‧導線
170‧‧‧圖案化乾膜層
172‧‧‧開孔
圖1A至圖1G是依照本發明的一實施例的一種晶片封裝結構的製作方法的流程剖面示意圖。
圖2是圖1G的晶片設置於晶片座上的仰視示意圖。
圖3是依照本發明的一實施例的一種晶片封裝結構的剖面示意圖。
圖4是依照本發明的另一實施例的一種晶片封裝結構的剖面示意圖。
有關本發明之前述及其他技術內容、特點與功效，在以下配合參考圖式之各實施例的詳細說明中，將可清楚的呈現。以下實施例中所提到的方向用語，例如：「上」、「下」、「前」、「後」、「左」、「右」等，僅是參考附加圖式的方向。因此，使用的方向用語是用來說明，而並非用來限制本發明。並且，在下列各實施例中，相同或相似的元件將採用相同或相似的標號。
圖1A至圖1G是依照本發明的一實施例的一種晶片封裝結構的製作方法的流程剖面示意圖。本實施例的晶片封裝結構的製作方法可包括下列步驟：首先，請先參照圖1A，提供一晶圓，其如圖1A所示包括一主動表面122、相對於主動表面122之一背面124以及一導電圖案126。晶圓包括多個彼此連接且陣列排列之晶片120。在此須說明的是，為了圖面簡潔，圖1A僅繪示晶圓的多個陣列排列的晶片120中的其中之一，也就是說，晶片120可為一晶圓級晶片。此外，在本實施例中，導電圖案126可例如透過電鍍而形成於晶圓的主動表面122上，其可作為各晶片120的球底金屬層(Under-Bump Metallization,UBM)或重配置線路層(Redistribution Layer，RDL)。在本實施例中，晶圓可例如以其主動表面122設置於一基材150上，其中，基材150可例如為一膠帶或是乾膜層(dry film)，並如圖1A所示覆蓋導電圖案126。
接著，請參照圖1B，設置一具有多個開孔172的圖案化 乾膜層170於晶片120的背面124上，接著再以圖案化乾膜層170為電鍍罩幕進行一電鍍製程，以分別形成如圖1C所示的多個散熱柱130於上述的多個開孔172內，也就是形成散熱柱130於開孔172所暴露的部份背面124上，其中，各晶片120具有上述的散熱柱130的至少其中之一，且散熱柱130不與背面124上的其他線路層電性連接。之後，再移除圖案化乾膜層，以暴露出背面124以及形成於其上的散熱柱130。在另一可行之實施例中，晶片120上的散熱柱130及導電圖案126是先以相同上述之製程預先電鍍形成於晶圓上，之後，再切割晶圓以使晶片120彼此分離。在本實施例中，可例如沿著如圖1D所示的切線切割晶圓，以得到單體晶片120，以進行後續之封裝製程。
接著，請參照圖1E，將上述的多個晶片120的其中之一設置於一導線架110的一晶片座112上，其中，導線架110包括晶片座112以及多個引腳114。引腳114環繞晶片座112設置，而晶片座112具有至少一貫孔112a。晶片120以其背面124設置於晶片座112上，並電性連接至引腳114。詳細來說，貫孔112a的位置對應於散熱柱130，使晶片120以其背面124設置於晶片座112上時，散熱柱130得以穿過貫孔112a。並且，晶片120的背面124的尺寸應大於貫孔112a的尺寸，使晶片120的背面124得以承靠於晶片座112上。在本實施例中，晶片120可例如透過一黏著層固定於晶片座112上，並透過多個導線160電性連接至引腳114，也就是說，晶片120是利用打線接合(wire bonding)的 方式與引腳114形成電性連接。
具體而言，各引腳114可包括一內引腳114a以及一外引腳114b，而導線160則分別連接於晶片120的導電圖案126與內引腳114a之間，以電性連接晶片120與內引腳114a。此外，在本實施例中，晶片座112用以承載晶片120的一上表面與各內引腳114a用以與晶片120電性連接的一上表面之間可具有一高度差。在本實施例中，導線架110的晶片座112為沉置設計，也就是晶片座112的上表面低於各內引腳114a的上表面。當然，任何所屬技術領域中具有通常知識者應了解，本實施例的圖式僅用以舉例說明，本發明並不以此為限。
請接續參照圖1F，形成一封裝膠體140，使其包覆晶片120、至少部份引腳114、散熱柱130、導線160以及晶片座112。在本實施例中，封裝膠體140可例如包覆內引腳114a而暴露外引腳114b。接著，再如圖1G所示，利用例如一雷射鑽孔(laser drill)製程，於封裝膠體140形成至少一開口142，以暴露至少部份散熱柱130。在本實施例中，封裝膠體140至少暴露各散熱柱130的一頂面。如此，本實施例的晶片封裝結構100即大致製作完成。
依上述製作方法所製作出的晶片封裝結構100如圖1G所示包括導線架110、晶片120、至少一散熱柱130以及封裝膠體140。導線架110包括晶片座112以及多個環繞晶片座112的引腳114。晶片座112具有至少一貫孔112a，對應散熱柱130設置。晶片120設置於晶片座112上並電性連接至引腳114。在本實施例 中，晶片120包括相對的主動表面122以及背面124，且散熱柱130設置於背面124並穿過晶片座112的貫孔112a，使晶片120得以其背面124設置於晶片座112上。封裝膠體140包覆晶片120、至少部份引腳114以及晶片座112並包括至少一開口142，以暴露散熱柱130。
如此配置，本實施例的晶片封裝結構100即可透過設置於晶片120的背面124的散熱柱130而直接將晶片120所產生的熱能散逸至外界，因而可提升散熱效能，亦可省去設置散熱膏或散熱片等額外的散熱元件的成本。當然，在本發明的其他實施例中，晶片封裝結構100亦可依產品的需求而選擇性地設置散熱片於封裝膠體140相對於開口142的一上表面上，以進一步提升晶片封裝結構100的散熱效率。或者，亦可將晶片座112之下表面部分外露於封裝膠體140。在本實施例中，開口142可如圖4所示之暴露至少部分晶片座112。如此，則可無需另外設置散熱片，而可直接將暴露於外的晶片座112當成散熱片使用。此外，由於散熱柱130係設置於晶片120的背面124，且不與晶片120的其他線路電性連接，因此，即使散熱柱130因長期暴露於封裝膠體140外而產生氧化的情形，亦不會影響晶片120本身的電性效能。
圖2是圖1G的晶片設置於晶片座上的仰視示意圖。在此須說明的是，圖2省略了圖1G中的封裝膠體140，以更清楚呈現晶片120與晶片座112間的設置關係。請同時參照圖1G以及圖2，在本實施例中，散熱柱130的數量為多個，晶片座112的貫孔112a 的數量則可如圖2所示例如為一個，而散熱柱130皆位於貫孔112a內。封裝膠體140的開口142的數量可對應於散熱柱130的數量而為多個，且開口142分別對應散熱柱130設置，以分別暴露對應的散熱柱130。
圖3是依照本發明的一實施例的一種晶片封裝結構的剖面示意圖。在此必須說明的是，本實施例的晶片封裝結構100a與圖1G所示的晶片封裝結構100大致相似，因此，本實施例沿用前述實施例的元件標號與部分內容，其中採用相同的標號來表示相同或近似的元件，並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例，本實施例不再重複贅述。以下將針對本實施例的晶片封裝結構100a與圖1G所示的晶片封裝結構100的不同之處加以說明。在本實施例中，晶片封裝結構100a的散熱柱130的數量為多個，且晶片座112的貫孔112a以及封裝膠體140的開口142的數量亦為多個，其中，貫孔112a以及開口142分別對應散熱柱130設置。也就是說，各散熱柱130如圖3所示分別位於對應的各個貫孔112a內，而封裝膠體140的各開口142則分別暴露對應的散熱柱130，使晶片封裝結構100a得以透過暴露的散熱柱130將晶片120所產生的熱能散逸至外界。
圖4是依照本發明的另一實施例的一種晶片封裝結構的剖面示意圖。在此必須說明的是，本實施例的晶片封裝結構100b與圖1G所示的晶片封裝結構100大致相似，因此，本實施例沿用前述實施例的元件標號與部分內容，其中採用相同的標號來表示 相同或近似的元件，並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例，本實施例不再重複贅述。以下將針對本實施例的晶片封裝結構100b與圖1G所示的晶片封裝結構100的不同之處加以說明。
在本實施例中，晶片封裝結構100b的散熱柱130的數量為多個，晶片座112的貫孔112a的數量則可如圖2以及圖4所示為一個。散熱柱130位於貫孔112a內。此外，本實施例的封裝膠體140的開口142的數量可為一個，以如圖4所示暴露出各個散熱柱130的頂面，使晶片封裝結構100b可透過暴露的散熱柱130將晶片120所產生的熱能散逸至外界。當然，任何所屬技術領域中具有通常知識者應了解，上述之實施例僅為舉例說明，本發明並不限制散熱柱130、貫孔112a以及開口142的數量。於其他未繪示的實施例中，使用者亦可依產品需求而自行排列組合上述實施例的特徵，只要散熱柱130可穿過貫孔112a而使晶片120承靠於晶片座112上，且封裝膠體140可利用其開口142而暴露散熱柱130即可。
綜上所述，本發明的晶片封裝結構將散熱柱透過電鍍的方式直接形成於晶片的背面，且散熱柱穿過晶片座的貫孔，使晶片得以背面設置於導線架的晶片座上，且封裝膠體更包括對應於散熱柱的開口，以暴露散熱柱。如此，本發明的晶片封裝結構即可透過設置於晶片背面的散熱柱將晶片所產生的熱能直接散逸至外界，因而可提升晶片封裝結構的散熱效能，亦可省去設置散熱 膏或散熱片等額外的散熱元件的成本。當然，本發明的晶片封裝結構亦可依產品的需求而選擇性地設置散熱片於封裝膠體上，以進一步提升晶片封裝結構的散熱效率。此外，由於散熱柱係設置於晶片背面，且不與晶片的其他線路電性連接，因而可避免散熱柱因長期暴露而氧化，進而影響晶片電性效能的問題。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
100‧‧‧晶片封裝結構
110‧‧‧導線架
112‧‧‧晶片座
112a‧‧‧貫孔
114‧‧‧引腳
114a‧‧‧內引腳
114b‧‧‧外引腳
120‧‧‧晶片
122‧‧‧主動表面
124‧‧‧背面
126‧‧‧導電圖案
130‧‧‧散熱柱
140‧‧‧封裝膠體
142‧‧‧開口
160‧‧‧導線

Claims (10)

  1. 一種晶片封裝結構，包括：一導線架，包括一晶片座以及多個引腳，該晶片座具有至少一貫孔，該些引腳環繞該晶片座設置；一晶片，設置於該晶片座上並電性連接至該些引腳，該晶片包括一主動表面以及相對該主動表面之一背面，該晶片以該背面設置於該晶片座上；至少一散熱柱，直接設置於該背面並穿過該貫孔；以及一封裝膠體，包覆該晶片、至少部份該些引腳以及該晶片座，該封裝膠體包括至少一開口，以暴露該散熱柱。
  2. 如申請專利範圍第1項所述的晶片封裝結構，其中該散熱柱的數量為多個。
  3. 如申請專利範圍第2項所述的晶片封裝結構，其中該些散熱柱位於該貫孔內，且該開口暴露該些散熱柱。
  4. 如申請專利範圍第2項所述的晶片封裝結構，其中該開口的數量為多個，該些開口分別暴露該些散熱柱。
  5. 如申請專利範圍第2項所述的晶片封裝結構，其中該貫孔的數量為多個，該些散熱柱分別位於該些貫孔內。
  6. 如申請專利範圍第1項所述的晶片封裝結構，其中該開口至少暴露各該散熱柱的一頂面。
  7. 如申請專利範圍第1項所述的晶片封裝結構，更包括多個導線，該些導線分別電性連接該晶片與該些引腳。
  8. 如申請專利範圍第1項所述的晶片封裝結構，更包括一散熱片，設置於該封裝膠體相對於該開口的一上表面。
  9. 如申請專利範圍第1項所述的晶片封裝結構，其中該開口暴露至少部份該晶片座。
  10. 一種晶片封裝結構之製造方法，包括：提供一晶圓，該晶圓包括一具有一導電圖案之主動表面以及相對該主動表面之一背面，其中該晶圓包括多個彼此連接且陣列排列之晶片；設置一具有多個開孔的圖案化乾膜層於該晶圓的該背面；進行一電鍍製程，以圖案化乾膜層為罩幕而分別於該些開孔內形成多個散熱柱；移除該圖案化乾膜層；切割該晶圓以使該些晶片彼此分離，各該晶片具有該些散熱柱的至少其中之一；提供一導線架，該導線架包括一晶片座以及多個引腳，該晶片座具有至少一貫孔，該些引腳環繞該晶片座設置；設置該些晶片的其中之一於該晶片座上並電性連接該晶片至該些引腳，並以該晶片之散熱柱穿過該貫孔；提供一封裝膠體，以包覆該晶片、至少部份該些引腳以及該晶片座，該封裝膠體包括至少一開口，並暴露該散熱柱。
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