TW201406222A - Multilayer printed circuit board and method for manufacturing same - Google Patents

Abstract

The present disclosure relates to a method for manufacturing a multilayer printed circuit board. The method includes steps as follows. First, a number of copper clad laminates are provided. Second, the copper layers of the copper clad laminates are patterned to obtain conductive patterns, and then a number of first printed circuit boards are formed. Third, a banding sheet is banded on one surface of each of certain first printed circuit boards. At least one though hole is formed in each of the banding sheets and a conductive material is filled in the at least one though hole to obtain a number of second printed circuit boards. Four, two banding sheets are respectively banded on two opposite surfaces of each of certain first printed circuit boards. At least one though hole is formed in each of the banding sheets and a conductive material is filled in the though hole to get a number of third printed circuit boards. Five, the first printed circuit board, the second printed circuit board, the third printed circuit board and one or two copper foils are laminated to each other. And then the copper foils are patterned to obtain conductive patterns to form a multilayer printed circuit board. A multilayer printed circuit board made by the above method is also provided.

Description

Multilayer circuit board and manufacturing method thereof

The invention relates to a circuit board manufacturing technology, in particular to a multilayer circuit board and a manufacturing method thereof.

With the development of electronic products in the direction of miniaturization and high speed, circuit boards have also developed from single-sided circuit boards and double-sided circuit boards to multi-layer circuit boards. Multi-layer circuit board refers to a circuit board with multiple layers of conductive lines, which has more wiring area and higher interconnection density, and thus has been widely used, see the literature Takahashi, A. Ooki, N. Nagai, A. Akahoshi, H Mukoh, A. Wajima, M. Res. Lab., High density multilayer printed circuit board for HITAC M-880, IEEE Trans. on Components, Packaging, and Manufacturing Technology, 1992, 15(4): 418-425.

At present, multi-layer circuit boards are usually produced by a build-up method, that is, by layer stacking. The method for fabricating a multilayer wiring board by a conventional build-up method includes the steps of: first, fabricating an inner layer board comprising at least one layer of insulating material and two conductive circuit layers, the two conductive circuit layers The phase is electrically conducted by at least one conductive hole. In the second step, an adhesive sheet and a copper foil layer are respectively pressed on the two conductive circuit layers of the inner layer board, wherein the copper foil layer is electrically conductively connected to the inner layer board by the adhesive sheet Layer bonding, selectively etching the copper foil layer to form the outermost conductive trace pattern to form a multilayer wiring substrate; and third step, using a laser drilling method or the like on the multilayer wiring Forming at least one blind hole on the substrate, plating the at least one blind hole to electrically conduct the copper foil layer and the conductive circuit layer of the inner layer plate; and fourth, forming at least one through hole on the multilayer circuit substrate And plating the through holes to electrically connect the two outermost conductive line patterns of the multilayer circuit substrate, thereby obtaining a multilayer wiring board. If more layers of the multi-layer circuit board are required, follow a similar method in the second to third steps, that is, continue to press a copper foil on the two outermost conductive circuit patterns of the multilayer circuit substrate, and selectively etch. The copper foil layer electrically connects the conductive circuit layers to be connected. In this way, more layers of the multilayer circuit board can be obtained.

However, in the manufacturing process of the above multilayer circuit board, each time a layer is added, a pressing process is required, and when a plurality of layers of the circuit board are produced, the number of pressing times is correspondingly large, which is disadvantageous for the process. Simplification, production costs are relatively high, and production efficiency is relatively low.

In view of the above, it is necessary to provide a method for fabricating a multilayer wiring board and a multilayer wiring board obtained by the method to improve the fabrication efficiency of the multilayer wiring board.

A method for manufacturing a multilayer circuit board, comprising the steps of: providing N copper-clad substrates, wherein N is a natural number greater than or equal to 4, each of the copper-clad substrates comprising an insulating layer and being bonded to the insulating layer opposite to each other a first copper foil layer and a second copper foil layer; a first copper foil layer of each of the copper-clad substrates is formed into a first conductive line pattern, and a second copper foil layer of each of the copper-clad substrates is formed Forming a second conductive line pattern, and the first conductive line pattern and the second conductive line pattern are electrically connected to each other by at least one conductive hole, thereby forming N the copper clad substrates into N first circuit substrates; Taking N-2M+1 first circuit substrates from the N first circuit substrates, where M is a natural number greater than or equal to 2, and N is greater than 2M-1, as described in N-2M+1 A first conductive film pattern surface of each of the first circuit substrates in the first circuit substrate is attached to a first film, the first film has at least one first through hole, and the at least one first through hole Filling the hole with a first conductive material, the first conductive material and the adjacent first conductive material The circuit patterns are electrically connected to each other, thereby forming N-2M+1 first circuit substrates into N-2M+1 second circuit substrates; taking M-1 first circuit substrates in N of the first circuit substrates And affixing the second film to the first conductive line pattern surface of each of the M-1 first circuit substrates, and each of the M-1 first circuit substrates a second conductive line pattern surface of a circuit substrate is attached to the third film, the second film has at least one second through hole, the third film has at least one third through hole, and at least one of the at least one Filling a second conductive material with the second conductive material, the second conductive material is electrically connected to the adjacent first conductive line pattern, and filling the third conductive material with the third conductive material, the third conductive The material and the adjacent second conductive line pattern are electrically connected to each other, thereby forming M-1 first circuit substrates into M-1 third circuit substrates; and pressing the remaining M first circuit substrates at a time, The N-2M+1 second circuit substrates and the M-1 third circuit substrates to form a 2N layer line a circuit board, in the 2N layer circuit board, adjacent insulating layers are bonded together by a first film, a second film or a third film, and two first circuit substrates are located on the 2N layer circuit The outermost sides of the board, or a first circuit substrate and a second circuit substrate are located on the outermost sides of the 2N layer circuit board, or two second circuit boards are located at the outermost two of the 2N layer circuit boards side.

A method for manufacturing a multilayer circuit board, comprising the steps of: providing N copper-clad substrates, wherein N is a natural number greater than or equal to 3, each of the copper-clad substrates comprising an insulating layer and being bonded to the insulating layer opposite to each other a first copper foil layer and a second copper foil layer; a first copper foil layer of each of the copper-clad substrates is formed into a first conductive line pattern, and a second copper foil layer of each of the copper-clad substrates is formed Forming a second conductive line pattern, and the first conductive line pattern and the second conductive line pattern are electrically connected to each other by at least one conductive hole, thereby forming N the copper clad substrates into N first circuit substrates; N-2M first circuit substrates are taken from the N first circuit substrates, wherein M is a natural number, and N is greater than 2M, and each of the N-2M first circuit substrates is a first conductive line pattern surface of a circuit substrate is attached to the first film, the first film has at least one first through hole, and the first conductive material is filled with the first conductive material, the first conductive material Conducting electrical continuity with adjacent first conductive line patterns, thereby - 2M of the first circuit substrates are formed into N-2M second circuit substrates; M first circuit substrates are taken from the N first circuit substrates, and each of the M first circuit substrates The first conductive circuit pattern surface of the first circuit substrate is attached to the second film, and the third conductive film pattern surface of each of the first circuit substrates of the M first circuit substrates is attached to the third film. The second film has at least one second through hole, each of the third film has at least one third through hole, and the second conductive material is filled in the at least one second through hole, the second The conductive material is electrically connected to the adjacent first conductive line pattern, and the third conductive material is filled with the third conductive material, and the third conductive material and the adjacent second conductive line pattern are electrically connected to each other. Thus, the M first circuit substrates are made into M third circuit substrates; the first copper foil is provided, and the remaining M first circuit substrates, N-2M second circuit substrates, and M are pressed at a time. The third circuit substrate and the first copper foil to form 2N+1 a circuit substrate, in the 2N+1 layer circuit substrate, adjacent insulating layers are bonded together by a first film, a second film or a third film, and the adjacent insulating layer and the first copper foil are Bonded together by a first film or a second film, and the first copper foil is located on the outermost side of the 2N+1 layer circuit substrate, one of the first circuit substrate or one of the second lines The substrate is located on the outermost side of the 2N+1 layer circuit substrate; and the first copper foil piece is formed into a conductive line pattern via selective etching to obtain a 2N+1 layer wiring board.

A method for manufacturing a multilayer circuit board, comprising the steps of: providing N copper-clad substrates, wherein N is a natural number greater than or equal to 3, each of the copper-clad substrates comprising an insulating layer and being bonded to the insulating layer opposite to each other a first copper foil layer and a second copper foil layer; a first copper foil layer of each of the copper-clad substrates is formed into a first conductive line pattern, and a second copper foil layer of each of the copper-clad substrates is formed Forming a second conductive line pattern, and the first conductive line pattern and the second conductive line pattern are electrically connected to each other by at least one conductive hole, thereby forming N the copper clad substrates into N first circuit substrates; Taking N-2M-1 first circuit substrates from the N first circuit substrates, wherein M is a natural number, and N is greater than 2M+1, in N-2M-1 of the first circuit substrates The first conductive line pattern surface of each of the first circuit substrates is attached to a first film, the first film has at least one first through hole, and the first at least one first through hole is filled with the first a conductive material, the first conductive material and the corresponding first conductive line pattern are mutually Turning on, so that N-2M-1 of the first circuit substrates are made into N-2M-1 second circuit substrates; and M+1 first circuit substrates are taken from N of the first circuit substrates, The first conductive line pattern surface of each of the first circuit substrates of the first circuit substrate of M+1 is attached to the second film, and each of the first lines of the M+1 first circuit substrates a second conductive line pattern surface in the substrate is attached to the third film, the second film has at least one second through hole, the third film has at least one third through hole, and the at least one second pass The hole is filled with a second conductive material, and the second conductive material is electrically connected to the adjacent first conductive line pattern, and the third conductive material is filled in the at least one third through hole, and the third conductive material is The adjacent second conductive line patterns are electrically connected to each other, thereby forming M+1 the first circuit substrates into M+1 third circuit substrates; providing the first copper foil and the second copper foil, and pressing once The first copper foil, the remaining M first circuit substrates, N-2M-1 of the second circuit substrates, M+1 the third circuit substrate and the second copper foil to form a 2N+2 layer circuit substrate, in the 2N+2 layer circuit substrate, the first copper foil and the second The copper foils are respectively located on the outermost sides of the 2N+2 layer circuit substrate, and the adjacent insulating layers are bonded together by the first film, the second film or the third film, and the adjacent insulating layers and The first copper foil and the adjacent insulating layer and the second copper foil are bonded together by the first film or the second film or the third film; and the first copper foil and the first copper foil The two copper foil sheets were respectively patterned into conductive lines by selective etching to obtain a 2N+2 layer wiring board.

A method for manufacturing a multilayer circuit board, comprising the steps of: providing N+1 copper-clad substrates, wherein N is a natural number greater than or equal to 1, each of the copper-clad substrates comprising an insulating layer and being bonded to the insulating layer a first copper foil layer and a second copper foil layer on opposite sides; forming a first conductive line pattern on each of the copper-clad substrates, and forming a second copper layer on each of the copper-clad substrates Forming a second conductive line pattern by the foil layer, and the first conductive line pattern and the second conductive line pattern are electrically connected to each other by at least one conductive hole, thereby forming N+1 the copper-clad substrates into N+1 a first circuit substrate; taking N first circuit substrates from the N+1 of the first circuit substrates, and first conducting in the first circuit substrate of each of the N first circuit substrates The first graphic film has at least one first through hole, and the first conductive material is filled in the at least one first through hole, the first conductive material and the adjacent first The conductive line patterns are electrically conductive to each other, thereby N the first line bases Forming N second circuit substrates; pressing the N second circuit substrates and the remaining one of the first circuit substrates at a time to form a 2N+2 layer circuit board, each of the 2N+2 layer circuit boards The first film in the second circuit substrate is closer to the first circuit substrate than the second conductive circuit pattern, and the adjacent insulating layers are bonded together by the first film.

A multi-layer circuit board is formed by using a multi-layer circuit board manufacturing method as described above, the multi-layer circuit board comprising a plurality of insulating layers, a multi-layer film and a plurality of layers of conductive lines, each of which is provided with a layer on each of opposite sides of the insulating layer a conductive circuit pattern, and the conductive circuit patterns on both sides of each insulating layer are electrically connected by at least one conductive hole disposed in the insulating layer, and each of the opposite sides of each layer of film is provided with a layer of the conductive line pattern, and each The conductive line patterns on opposite sides of the layer film are electrically conducted by a conductive material disposed in the film, and the conductive material in the film is formed by printing a conductive paste.

The multi-layer circuit board manufacturing method provided by the technical solution simultaneously manufactures a plurality of circuit substrates, and then forms a film on one or both surfaces of a part of the circuit substrate by bonding, and forms a through hole in the film and is formed with a conductive material. Thus, if necessary, a copper foil, a wiring substrate to which a film and a conductive material are bonded, or a circuit substrate on which a film is not attached are stacked at the same time, whereby a multilayer wiring board can be obtained by one press. Since the plurality of circuit substrates can be simultaneously fabricated, the time for manufacturing the circuit board can be shortened. Since each circuit substrate is separately fabricated, the yield of the circuit board can be improved compared to the layer-by-layer stacking method in the prior art.

The multi-layer circuit board provided by the technical solution and the manufacturing method thereof will be further described in detail below with reference to the accompanying drawings and the embodiments.

The method for fabricating the ten-layer circuit board provided by the first embodiment of the present technical solution includes the following steps:

In the first step, referring to Figure 1, four copper clad substrates 10 are provided. Each of the copper clad substrates 10 includes an insulating layer 11 and a first copper foil layer 12 and a second copper foil layer 13 bonded to opposite sides of the insulating layer 11.

The copper-clad substrate 10 may be a fiberglass-based copper-clad substrate, a paper-based copper-clad substrate, a composite copper-clad substrate, an alimentamide-based nonwoven fabric-based copper-clad substrate, or a synthetic fiber-based copper-clad substrate. Of course, two, three, five or more of the copper clad substrate 10 may be selected according to the number of circuit board layers formed.

In the second step, referring to FIG. 2, at least one first conductive via 14 is formed on each of the copper clad substrates 10, and each of the first copper foil layers 12 is formed into a first conductive trace pattern 15 for each The second copper foil layer 13 is formed to form a second conductive line pattern 16 , and the first conductive line pattern 15 and the second conductive line pattern 16 are electrically connected to each other by the at least one first conductive via 14 to obtain four first The circuit substrate 110.

The first conductive via 14 can be formed by the following method: first, a through hole is formed on the copper clad substrate 10 by mechanical drilling, and the through hole sequentially penetrates the first copper foil layer 12 and is insulated. The layer 11 and the second copper foil layer 13 are subjected to desmear treatment; and then, a metal such as copper, silver or gold is electroplated inside the through hole by electroplating to obtain the first layer. a conductive hole 14. Preferably, copper is electroplated inside the through hole. More preferably, the through holes are completely filled by a plating hole filling process during electroplating. Of course, the metal may be plated before the hole wall of the through hole to form the first conductive hole 14 , and then filled in the through hole; or after the through hole is formed in the through hole The conductive paste is filled therein, and the conductive paste is cured to form the first conductive vias 14.

It is also understood by those skilled in the art that a blind hole may be formed on the copper clad substrate 10 by laser ablation, and the blind hole penetrates the first copper foil layer 12 and the insulating layer 11 and then Forming a plating metal in the interior of the blind hole by using a plating hole filling process to obtain the first conductive hole 14; the first copper foil layer 12 may be formed by opening a copper window A conductive hole 14 is etched to open the copper window, and then ablated on the insulating layer 11 by laser ablation to form a blind hole. Then, a plating hole filling process is used to fill the inside of the blind hole. Metal, thereby obtaining the first conductive vias 14.

The first conductive line pattern 15 and the second conductive line pattern 16 can be formed by an image transfer process and an etching process.

In this embodiment, the first conductive line pattern 15 and the second conductive line pattern 16 on the four first circuit substrates 110 are set according to the circuit board to be actually formed, and the first conductive in each of the copper-clad substrates 10 The line pattern 15 and the second conductive line pattern 16 may be the same or different.

In the third step, referring to FIG. 3-4, one of the four first circuit substrates 110 is formed into a second circuit substrate 120. The manufacturing method of the second circuit substrate 120 may include the following steps:

First, the first film 17 and the release film 18 are sequentially laminated on the first conductive line pattern 15 of the first circuit substrate 110, and the first conductive circuit pattern 16 of the first circuit substrate 110 is attached and protected. Membrane 19. Next, the first circuit substrate 110, the first film 17 and the release film 18 and the protective film 19 are pre-compressed to bond the first film 17 and the first circuit substrate 110 together, and at the same time The protective film 19 is adhered to the second conductive line pattern 16. The release film 18 is removed. Then, at least one first through hole 20 is formed on the first film 17, the first through hole 20 penetrating the first film 17, and a part of the first conductive line pattern 15 is from the first through hole The bottom of 20 is exposed. Furthermore, a first conductive material 21 is formed in the first through hole 20, so that the first conductive material 21 and the first conductive line pattern 15 are electrically connected to each other. Finally, the protective film 19 is removed to obtain the second wiring substrate 120.

In this embodiment, the first film 17 is a semi-cured film, which may be a glass fiber prepreg, a paper-based prepreg, a composite prepreg, an arylamine fiber nonwoven prepreg, a synthetic fiber prepreg or a pure resin prepreg.

The pre-compression is used to heat the first film 17 to make the first film 17 have a certain viscosity, thereby being bonded to the first circuit substrate 110. The pre-compression temperature, the pre-compression pressure and the pre-compression time of the first film 17 are both much smaller than the temperature required for the pressing of the first film 17, the pressure required for pressing, and the pressing force. Time, therefore, the first film 17 after pre-compression still retains its semi-curing properties. In this embodiment, the pre-compression temperature of the first film 17 ranges from 60 to 110 ° C, the pre-compression time ranges from 10 to 60 seconds, and the pre-compression pressure ranges from 5 to 15 kg/cm 2 . The pressing temperature corresponding to the first film 17 ranges from 180 to 250 ° C, the pressing time ranges from 60 to 120 minutes, and the pressing pressure ranges from 200 to 300 kg/cm 2 . Preferably, the pre-compression temperature of the first film 17 is 80 ° C, the pre-compression time is 30 seconds, the pre-compression pressure is 10 kg/cm 2 , the pressing temperature is 210 ° C, and the pressing time is For 80 minutes, the pressure of the press is 250 kg/cm2.

In this embodiment, the release film 18 is a mylar for protecting the first film 17 to prevent the first film 17 from contacting an object (for example, when pre-compression). The steel plate used for pre-compression bonding or the press fixture is bonded and cannot be separated. The release film 18 may also be other release materials such as a polyethylene release film or a polypropylene release film.

The protective film 19 is used to protect the second conductive trace pattern 16 to prevent oxidation and damage of the second conductive trace pattern 16 in the subsequent step of pre-compression or fabrication of the first conductive via. In the embodiment, the protective film 19 comprises a polyester film and a low-viscosity adhesive layer adhered to the polyester film. Of course, the polyester film may also be a polymer film such as a polyethylene film or a polypropylene film, and only needs to have good heat resistance.

In this embodiment, the first through hole 20 is formed by laser drilling. In addition, since the laser drilling process ablates the first film 17 by a high-energy laser to form a hole, some residue is generated during ablation, and therefore, preferably, after the laser drilling The first through hole 20 is subjected to desmear treatment, and the residue removing residue may be selected by a plasma degumming treatment process or a chemical degumming process.

In this embodiment, the first conductive material 21 is filled in the first through hole 20 by printing a metal conductive paste. The metal conductive paste may be a conductive copper paste, a conductive silver paste, a conductive solder paste or the like, preferably a conductive copper paste. Specifically, first, the metal conductive paste is filled in the first through hole 20 by screen printing; then, the conductive metal paste is baked to cure the conductive metal paste to form the first conductive material 21. The baking temperature of the conductive metal paste is lower than the curing temperature of the first film 17, so that the semi-curing property of the first film 17 is not affected.

In addition, before the first film 17 and the release film 18 are superposed, preferably, the first conductive line pattern 15 may be subjected to a surface roughening process, such as a browning process, to enhance the first film. The bonding force between the 17 and the first conductive line pattern 15.

Of course, a plurality of the second circuit substrates 120 may be fabricated according to the number of formed circuit board layers.

In the fourth step, referring to FIG. 5, two of the four first circuit substrates 110 are formed into two third circuit substrates 130. Each of the third circuit substrates 130 can be manufactured by the following steps:

First, the second film 22 and the release film are laminated on the first conductive line pattern 15 of the first circuit substrate 110, and the third film is laminated on the second conductive line pattern 16 of the first circuit substrate 110. 23 and release film. Next, the first circuit substrate 110, the second film 22, and the third film 23 are pre-compressed to bond the second film 22, the first circuit substrate 110, and the third film 23 together. Then, the release film on both sides of the first circuit substrate 110 is removed. Further, at least one second through hole 24 is formed in the second film 22, the second through hole 24 passes through the second film 22, and a part of the first conductive line pattern 15 is from the second pass The bottom of the hole 24 is exposed, and at least one third through hole 25 is formed in the third film 23, the third through hole 25 passes through the third film 23, and a part of the second conductive line pattern 16 is from the first The bottom of the three-way hole 25 is exposed. Finally, a second conductive material 26 is formed in the second through hole 24, and a third conductive material 27 is formed in the third through hole 25, so that the second conductive material 26 and the first conductive line The patterns 15 are electrically connected to each other, and the third conductive material 27 and the second conductive line pattern 16 are electrically conducted to each other to obtain the third circuit substrate 130.

In this embodiment, the positions and the number of the second through holes 24 and the third through holes 25 of the two third circuit substrates 130 are set according to actual circuit boards to be prepared, and the third circuit boards 130 are The positions and the number of the second through holes 24 and the third through holes 25 may be the same or different.

In addition, this step is similar to the third step described above. In this step, the material and function of the release film are the same as those of the release film 18 in the third step, and the conditions and functions of the pre-compression are also the third step. The conditions and functions of the pre-compression in the same are the same. The second through hole 24 and the third through hole 25 may be formed in the same manner as the first through hole 20 in the third step. Forming the second conductive material 26 and the third conductive material 27 in the second through hole 24 and the third through hole 25, and forming the first conductive material 21 in the first through hole 20 in the third step. The same way. In addition, preferably, the second through hole 24 and the third through hole 25 are desmeared after the laser drilling to remove the residue in the second through hole 24 and the third through hole 25. In addition to the residue treatment, a plasma desmear treatment process or a chemical degumming treatment process may be selected. Preferably, before the second film 22 and the third film 23 are superposed, the first conductive line pattern 15 and the second conductive line pattern 16 are also subjected to surface roughening treatment.

Of course, the third circuit substrate 130 may not be formed according to the number of formed circuit board layers, or one or two or more of the third circuit substrates 130 may be formed.

In the fifth step, referring to FIG. 6, a first copper foil piece 28 and a second copper foil piece 29 are provided, which are sequentially stacked and pressed together for the second copper foil piece 29, one of the third circuit substrates 130, and one The first circuit substrate 110, the other of the third circuit substrate 130, one of the second circuit substrate 120, and the first copper foil piece 28 are integrally formed. In the whole, the first copper foil piece 28 and the second copper foil piece 29 are respectively the outermost conductive layers on the whole two sides, and the adjacent insulating layers 11 are separated by the second film 22 or the The three films 23 are bonded together, and the adjacent insulating layer 11 and the copper foil are bonded together by the first film 17 or the second film 22 or the third film. Specifically, the second copper foil sheet 29 is directly bonded to the second film 22 of the third circuit substrate 130, and the first circuit substrate 110 and the second copper foil sheet 29 are directly bonded to the second copper foil sheet 29. The third film 23 of the three-circuit substrate 130 is directly bonded, and the other third circuit substrate 130 is located between the first circuit substrate 110 and the first copper foil 28, and directly bonded to the first circuit substrate 110. The second circuit substrate 120 is located between the third circuit substrate 130 and the first copper foil 28 which are far from the second copper foil sheet 29, and the first copper foil 28 and the second circuit substrate 120. The first film 17 is bonded.

Aligning and stacking the second copper foil sheet 29, one of the third circuit substrate 130, one of the first circuit substrate 110, the other of the third circuit substrate 130, one of the second circuit substrates 120, and The first copper foil 28 should ensure the third circuit substrate 130, one of the first circuit substrate 110, the other of the third circuit substrate 130, and one of the second circuit substrates 120. Precise alignment. In the actual operation, in the process of stacking, the third circuit substrate 130, one of the first circuit substrate 110, the other of the third circuit substrate 130, and one of the second circuit substrates 120 may be The alignment holes are respectively set, and the fixtures having the positioning pins corresponding to the alignment holes are aligned.

In this embodiment, since the opposite surfaces of each of the third circuit substrates 130 respectively have a second film 22 and a third film 23, the second circuit substrate 120 is opposite to the second copper foil 29 The adjacent surface has a first film 17, which has a certain fluidity due to the heating of the semi-cured material. After the pressing process, one of the third circuit substrate 130, one of the first circuit substrate 110, and the other third Each of the first conductive line pattern 15 and the second conductive line pattern 16 of the circuit substrate 130 and the second circuit substrate 120 are respectively embedded in the insulation formed by the first film 17, the second film 22 and the third film 23. In the layer, the second copper foil piece 29 is adhered to the second film 22 of the third circuit substrate 130, and the first copper foil piece 28 is opposite to the first film 17 of the second circuit substrate 120. Sticky so that the layers are tightly bonded.

In the sixth step, referring to FIG. 7, the second copper foil piece 29 is formed into a third conductive line pattern 30, and the first copper foil piece 28 is formed into a fourth conductive line pattern 31.

The third conductive line pattern 30 and the fourth conductive line pattern 31 can be formed by an image transfer process and an etching process.

In the seventh step, referring to FIG. 8, a first solder resist layer 32 is formed on the surface of the third conductive trace pattern 30, and a second solder resist layer 33 is formed on the surface of the fourth conductive trace pattern 31 to obtain ten layers. Circuit board 100.

The first solder resist layer 32 and the second solder resist layer 33 can be formed by printing a solder resist ink. The first solder resist layer 32 serves to protect the third conductive trace pattern 30, and the second solder resist layer 33 serves to protect the fourth conductive trace pattern 31.

It can be understood that the manufacturing method of the circuit board provided by the technical solution can also be applied to the manufacture of the multilayer circuit board of other layers. Wherein, when the multi-layer circuit board is produced, one, two or three types of the three circuit substrates, the first circuit substrate 110, the second circuit substrate 120, and the third circuit substrate 130 may be selected, and the quantity of each may be One or more, of course, one of the first copper foil sheets 28 or a first copper foil sheet 28 and a second copper foil sheet 29 may be selected for combination.

Method 1: The method is used to form a 2N layer circuit board, and N is a natural number greater than or equal to 4. Specifically, first, M first circuit substrates 110 (M is a natural number greater than or equal to 2, and N is greater than 2M-1), M-1 third circuit substrates 130, (N-2M+1) The second circuit substrate 120 is aligned and stacked to form a stacked substrate, and the two first circuit substrates 110 are respectively located on the outermost sides of the stacked substrate, or a first circuit substrate 110 and a second circuit substrate are provided. 120 are respectively located on the outermost sides of the laminated substrate, or two second circuit substrates 120 are respectively located on the outermost sides of the laminated substrate, and a first film 17 is disposed between adjacent insulating layers 11 The second film 22 or the third film 23; secondly, a 2N layer circuit board is obtained after the laminated substrate is press-fitted at one time. In the 2N layer circuit board, two first circuit substrates 110 are respectively located on the outermost sides of the 2N layer circuit board, or one first circuit substrate 110 and one second circuit substrate 120 are respectively located on the 2N layer circuit. The outermost sides of the board, or the two second circuit boards 120 are respectively located on the outermost sides of the 2N layer circuit board, and the adjacent insulating layers 11 are separated by the first film 17, the second film 22 or The third film 23 is bonded together. For the method for superposing the stacked substrates, reference may be made to the following embodiments:

Second Embodiment: In this embodiment, M is a natural number greater than or equal to 2, and N is greater than 2M-1) The stacked substrate may be formed by: firstly, M first circuit substrates 110 One of the first circuit substrates 110 serves as the outermost circuit substrate; secondly, among the remaining M-1 first circuit substrates 110 and M-1 third circuit substrates 130, a third circuit substrate 130 and a first The circuit substrate 110 is stacked to form a first stacking unit having only two circuit substrates, thereby obtaining M-1 first stacked units; then, N-2M+1 second circuit substrates 120 are stacked to form a second only a second stacking unit of the circuit substrate 120, the second stacking unit may include one or a plurality of second circuit substrates 120; finally, stacking M-1 of the first stacking unit and the second stacking unit as the most The first circuit substrate 110 of the outer circuit substrate is disposed, and the third circuit substrate 130 of each of the first stacking units is closer to the first circuit substrate 110 of the corresponding first stacking unit as the first outermost circuit substrate. Circuit substrate 110, making the second The first film 17 of each of the second circuit substrates 120 in the stack unit is closer to the first circuit substrate 110 as the outermost circuit substrate than the second conductive line pattern 16 of the corresponding second circuit substrate 120, thereby obtaining The stacked substrate is described.

Of course, the stacking manner of the first stacking unit and the second stacking unit may be different, and specifically, the second stacking unit may be located adjacent to the first stacking unit and the Between the first circuit substrate 110 as the outermost circuit substrate; the second stacking unit may also be located between two adjacent first stacking units; the second stacking unit may also be located at the distance as the outermost layer The first circuit substrate 110 of the circuit substrate is on the first circuit substrate 110 of the first stacking unit which is the farthest.

When layering or subtracting the multilayer circuit board in this embodiment, it is only necessary to increase or decrease the number of the first stacking unit in the stacked substrate; or increase or decrease in the laminated substrate. The number of the second stacking units may be sufficient; or the number of the second circuit substrates 120 in the second stacking unit may be increased or decreased in the stacked substrate.

It can be understood by those skilled in the art that when the multi-layer circuit board in this embodiment is layered or de-layered, the first circuit of the superimposed substrate of the multi-layer circuit board formed as the outermost circuit substrate can also be formed in this embodiment. One or a plurality of second circuit substrates 120 are stacked on the substrate 110 to obtain a new multilayer circuit board. Among the new multilayer circuit boards, a first circuit substrate 110 and a second circuit substrate 120 are respectively new. The outermost circuit substrate on both sides of the multilayer circuit board, or the two second circuit substrates 120 are respectively the outermost circuit substrates on both sides of the new multilayer circuit board.

Referring to FIG. 9, the following describes an embodiment of a fourteen-layer circuit board 200 obtained by a stacking method of the second embodiment with N=7 and M=3 as an example. The fourteen-layer circuit board 200 is formed by aligning and stacking three first circuit substrates 110, two third circuit substrates 130, and two second circuit substrates 120 into a stacked substrate, and presses the stack at a time. Formed after the substrate is combined. In the fourteen-layer circuit board 200, two first circuit substrates 110 are respectively located on the outermost sides of the fourteen-layer circuit board 200, and the adjacent insulating layers 11 are separated by a first film 17, The two films 22 or the third film 23 are bonded together. Specifically, the stacked substrate of the fourteen-layer circuit board 200 can be formed by: firstly, a first circuit substrate 110 is used as the outermost circuit substrate of the stacked substrate, and the remaining two first lines are In the substrate 110 and the two third circuit substrates 130, one first circuit substrate 110 and one third circuit substrate 130 are stacked to form a first stacked unit, thereby obtaining two first stacked units, and two two and one second. The circuit substrate 120 is stacked to form a second stacking unit. Secondly, one of the second stacking substrates 120 is directly attached to the first circuit substrate 110 as the outermost circuit substrate. The stacking unit is sequentially stacked on the second circuit substrate 120 farthest from the first circuit substrate 110 as the outermost circuit substrate, so that the third circuit substrate 130 in each of the first stacked units is in the corresponding first stacked unit. The first circuit substrate 110 is adjacent to the first circuit substrate 110 as the outermost circuit substrate, and the first film 17 of each of the second circuit substrates 120 is opposite to the corresponding second circuit substrate 120. The second wiring layer 16 are close to the circuit substrate 110 as a first outermost layer of the circuit substrate, to thereby obtain the laminated substrate.

Third Embodiment: In this embodiment, M is a natural number greater than or equal to 2, and N=3M-2) The stacked substrate can be formed by: firstly, M first circuit substrates 110 are One of the first circuit substrates 110 serves as the outermost circuit substrate; secondly, among the remaining M-1 first circuit substrates 110, M-1 second circuit substrates 120, and M-1 third circuit substrates 130, A first circuit substrate 110, a second circuit substrate 120 and a third circuit substrate 130 are stacked to form a third stacking unit having only three circuit substrates, thereby obtaining (M-1) third stacked units; finally, M-1 of the third stacked units are stacked on the first circuit substrate 110 as the outermost circuit substrate, and the third circuit substrate 130 of each of the third stacked units is compared with the corresponding third stacked unit. The first circuit substrate 110 is adjacent to the first circuit substrate 110 as the outermost circuit substrate, thereby obtaining the laminated substrate.

Of course, the three circuit boards of the third stacking unit are stacked in a plurality of manners. Specifically, in each third stacking unit, the third circuit substrate 130 is disposed on the adjacent first circuit substrate. Between the 110 and the second circuit substrate 120, at this time, among the formed stacked substrates, the second circuit substrate 120 of each of the third stacked units is closer to the third circuit substrate 130 of the corresponding third stacked unit. The first circuit substrate 110 of the outermost circuit substrate; or in each third stacking unit, the first circuit substrate 110 is disposed between the adjacent third circuit substrate 130 and the second circuit substrate 120. In the formed stacked substrate, the third circuit substrate 130 of each of the third stacked units is closer to the first circuit substrate 110 as the outermost circuit substrate than the second circuit substrate 120 of the corresponding third stacked unit; or In each of the third stacking units, the second circuit substrate 120 of the third stacking unit is disposed between the adjacent third circuit substrate 130 and the first circuit substrate 110. At this time, the formed overlap In the substrate, the A circuit substrate 110 is directly attached to the first film 17, and the third circuit substrate 130 of each third stacking unit is closer to the second circuit substrate 120 of the corresponding third stacking unit as the outermost circuit substrate. The first circuit substrate 110.

When layering or subtracting the multilayer circuit board in this embodiment, it is only necessary to increase or decrease the number of the third stacking unit in the stacked substrate.

It can be understood by those skilled in the art that when the multilayer circuit board in this embodiment is layered or layered, one or more second stacking units as in the second embodiment may be added to the stacked substrate. The number of the second circuit substrates 120 in the second stacking unit may be one or plural, and the second stacking unit may be located adjacent to the third stacking unit and the first outermost circuit substrate A circuit board 110 may be located between the two adjacent third stacking units, or may be stacked on the third stacking unit which is the farthest from the first circuit board 110 which is the outermost circuit board. It is also understood by those skilled in the art that when the multilayer circuit board in this embodiment is layered or layered, one or more first stacking units as in the second embodiment may be added to the stacked substrate. . It is also understood by those skilled in the art that when the multilayer circuit board in this embodiment is layered or layered, the first stacking unit and the first layer as described in the second embodiment may be simultaneously added to the stacked substrate. Two stacking units.

In addition, those skilled in the art can also understand that when the multilayer circuit board in the embodiment is layered or layered, the laminated substrate of the multilayer circuit board formed in the embodiment can also be used as the outermost circuit substrate. One or a plurality of second circuit substrates 120 are stacked on the first circuit substrate 110 or the first circuit substrate 110 as the outermost circuit substrate on the laminated substrate of the multilayer wiring board formed in the present embodiment. Obtaining a new multi-layer circuit board, wherein the first circuit substrate 110 and the second circuit substrate 120 are respectively the outermost circuit substrate on both sides of the new multilayer circuit board, or two The second circuit substrate 120 is the outermost circuit substrate on both sides of the new multilayer circuit board.

Referring to FIG. 10, the following describes the structure of the fourteen-layer circuit board 210 obtained by a stacking method of the third embodiment with N=7 and M=3 as an example. The fourteen-layer circuit board 210 is formed by aligning and stacking three first circuit substrates 110, two third circuit substrates 130, and two second circuit substrates 120 into a stacked substrate, and presses the stack at a time. Formed after the substrate is combined. In the fourteen-layer circuit board 210, one first circuit substrate 110 and one second circuit substrate 120 are respectively located on the outermost sides of the fourteen-layer circuit board 210, and the adjacent insulating layers 11 are The first film 17, the second film 22, or the third film 23 are bonded together. Specifically, the stacked substrate of the fourteen-layer circuit board 210 can be formed by stacking one second circuit substrate 120, one third circuit substrate 130, and one first circuit substrate 110 into one only one. a third stacking unit of the circuit substrate, wherein the first circuit substrate 110 of the third stacking unit is located between the adjacent third circuit substrate 130 and the second circuit substrate 120, and the two third stacked units are looped Arranging and stacking on the first circuit substrate 110 as the outermost circuit substrate, and making the third circuit substrate 130 of each of the third stacked units closer to the second circuit substrate 120 of the corresponding third stacked unit as the outermost layer The first circuit substrate 110 of the circuit substrate is obtained, thereby obtaining the laminated substrate.

Method 2: The method is used to form a 2N+1 layer circuit board, and N is a natural number greater than or equal to 3. Specifically, first, M first circuit substrates 110 (M is a natural number, and N is greater than 2M), M third circuit substrates 130, N-2M second circuit substrates 120, and a first copper foil 28 Aligning and stacking a laminated substrate, and placing the first copper foil piece 28 on an outermost side of the laminated substrate, the first circuit substrate 110 or the second circuit substrate 120 being located on the stack The outermost side of the substrate, and between the adjacent insulating layer 11 is a first film 17, a second film 22 or a third film 23, and between the adjacent insulating layer 11 and the first copper foil 28 a first film 17 or a second film 22; secondly, after the laminated substrate is pressed once, a 2N+1 layer circuit substrate is obtained, and in the 2N+1 layer circuit substrate, the first copper foil piece 28 is located The outermost side of the 2N+1 layer circuit substrate, the first circuit substrate 110 or the second circuit substrate 120 is located on the outermost side of the 2N+1 layer circuit substrate, and the adjacent insulation The layers 11 are bonded together by the first film 17, the second film 22 or the third film 23, and the adjacent insulating layer 11 and the first copper foil 28 are bonded together. The first film 17 or the second film 22 is bonded together; finally, the first copper foil 28 of the 2N+1 layer circuit substrate is selectively etched to form a conductive line pattern, thereby obtaining a 2N+1 layer. circuit board. For the method for superposing the stacked substrates, reference may be made to the following embodiments:

The fourth embodiment: In this embodiment, where M is a natural number greater than or equal to 1, and N is greater than 2M, the laminated substrate can be formed by: first, a third circuit substrate 130 and a first The circuit substrate 110 is stacked to form a first stacking unit having only two circuit substrates, thereby obtaining M first stacked units; secondly, N-2M of the second circuit substrates 120 are stacked to form a second stacked unit; Stacking the M first stacking units and the second stacking unit on the first copper foil sheet 28, and making the third circuit substrate 130 in each of the first stacking units more corresponding to the first The first circuit substrate 110 in the stacking unit is adjacent to the first copper foil sheet 28, and the first film 17 of each of the second circuit substrates 120 in the second stacking unit is larger than the corresponding second circuit substrate 120 The second conductive line patterns 16 are all adjacent to the first copper foil piece 28, thereby obtaining the laminated substrate.

Certainly, the stacking manner of the first stacking unit and the second stacking unit may be different, and specifically, the second stacking unit may be located adjacent to the first stacking unit and the first Between the copper foil sheets 28; the second stacking unit may also be located between the two adjacent first stacking units; the second stacking unit may also be stacked on the first copper foil sheet 28 Far from the first circuit substrate 110 of the first stacking unit.

When layering or subtracting the multilayer circuit board in this embodiment, it is only necessary to increase or decrease the number of the first stacking unit in the stacked substrate; or increase or decrease in the laminated substrate. The number of the second stacking units may be sufficient; or the number of the second circuit substrates 120 in the second stacking unit may be increased or decreased in the stacked substrate.

Referring to FIG. 11, the following describes the structure of the thirteen-layer circuit substrate 220 obtained by a stacking method of the fourth embodiment with N=6 and M=3 as an example. The thirteen-layer circuit substrate 220 is formed by aligning and stacking two first circuit substrates 110, two third circuit substrates 130, two second circuit substrates 120, and a first copper foil sheet 28 into a stacked substrate. And formed after pressing the laminated substrate at a time. In the thirteen-layer circuit substrate 220, the first copper foil 28 is located on the outermost side of the thirteen-layer circuit substrate 220, and the second circuit substrate 120 is the thirteen-layer circuit substrate 220. The outermost side, and the adjacent insulating layers 11 are bonded together by the first film 17, the second film 22 or the third film 23, between the adjacent insulating layer 11 and the first copper foil 28 Bonded together by the third film 23. Specifically, the laminated substrate of the thirteen-layer circuit substrate 220 can be formed by stacking a first circuit substrate 110 and a third circuit substrate 130 to form a first stacked unit, thereby obtaining two first Stacking unit, stacking two second circuit substrates 120 to form a second stacking unit; stacking the two first stacking units in sequence on the first copper foil, so that the third of each first stacking unit The circuit substrate 130 is closer to the first copper foil piece 28 than the first circuit substrate 110 of the corresponding first stacking unit, and the second stacked unit is stacked on the first stack farthest from the first copper foil piece 28. On the first circuit substrate 110 of the unit, and the first conductive film 17 of each of the second circuit substrates 120 is closer to the first copper foil 28 than the second conductive circuit pattern 16 of the corresponding second circuit substrate 120. Thereby obtaining the laminated substrate.

The fifth embodiment: In this embodiment, M is a natural number greater than or equal to 1, and N=3M, and the laminated substrate can be formed by: forming a first circuit substrate 110 and a second circuit substrate. 120 and a third circuit substrate 130 are stacked into a third stacking unit having only three circuit substrates, thereby forming M third stacked units; and M of the third stacked units are stacked on the first copper foil sheet 28 And, the third circuit substrate 130 of each of the third stacking units is brought closer to the first copper foil sheet 28 than the first one of the corresponding third stacking units, thereby obtaining the stacked substrate.

Of course, the three circuit boards of the third stacking unit are stacked in a plurality of manners. Specifically, in each third stacking unit, the third circuit substrate 130 is disposed on the adjacent first circuit substrate. Between the 110 and the second circuit substrate 120, at this time, among the formed stacked substrates, the second circuit substrate 120 of each of the third stacked units is closer to the third circuit substrate 130 of the corresponding third stacked unit. The first copper foil 28 is disposed; or in each third stacking unit, the first circuit substrate 110 is disposed between the adjacent third circuit substrate 130 and the second circuit substrate 120. In the stacked substrate, the third circuit substrate 130 of each third stacking unit is closer to the first copper foil sheet 28 than the second one of the corresponding third stacking units; or each third stack In the merging unit, the second circuit substrate 120 is disposed between the adjacent third circuit substrate 130 and the first circuit substrate 110. In this case, among the formed stacked substrates, the first circuit substrate 110 and the The first film 17 is directly attached, and each of the third stacked units The second substrate 130 than the corresponding circuit of the third stacking unit of the third line of the substrate 28 adjacent to the first copper foil.

When layering or subtracting the multilayer circuit board in this embodiment, it is only necessary to increase or decrease the number of the third stacking unit in the stacked substrate.

A person skilled in the art can understand that when the multilayer circuit board in the embodiment is layered or layered, one or more second stacking units as in the second embodiment may be added to the stacked substrate. The number of the second circuit substrates 120 in the second stacking unit may be one or plural, wherein the second stacking unit may be located adjacent to the third stacking unit and the first copper foil piece Between 28, between the two adjacent third stacking units, or stacked on the third stacking unit farthest from the first copper foil sheet 28. It is also understood by those skilled in the art that when the multilayer circuit board in this embodiment is layered or layered, one or more first stacking units as in the second embodiment may be added to the stacked substrate. . It is also understood by those skilled in the art that when the multilayer circuit board in this embodiment is layered or layered, the first stacking unit and the first layer as described in the second embodiment may be simultaneously added to the stacked substrate. Two stacking units.

Referring to FIG. 12, the following describes the structure of the thirteen-layer circuit substrate 230 obtained by a stacking method of the fifth embodiment with N=6 and M=2 as an example. The thirteen-layer circuit substrate 230 is formed by aligning and stacking two first circuit substrates 110, two third circuit substrates 130, two second circuit substrates 120, and a first copper foil sheet 28 into a stacked substrate. And formed after pressing the laminated substrate at a time. In the thirteen-layer circuit substrate 230, the first copper foil piece 28 is located on the outermost side of the thirteen-layer circuit substrate 230, and one first circuit substrate 110 is the most of the thirteen-layer circuit board 230. The other side of the insulating layer 11 is bonded together by the first film 17, the second film 22 or the third film 23, and the adjacent insulating layer 11 and the first copper foil 28 are borrowed. The first film 17 is bonded together. Specifically, the laminated substrate of the thirteen-layer circuit substrate 230 can be formed by stacking one second circuit substrate 120, one third circuit substrate 130, and one first circuit substrate 110 into one only one. a third stacking unit of the circuit board, wherein the third circuit substrate 130 of the third stacking unit is located between the first circuit substrate 110 and the second circuit substrate 120, and the two third stacked units are arranged in a loop Stacked on the first copper foil sheet 28, and the second circuit substrate 120 of each third stacking unit is closer to the first copper foil sheet 28 than the third one of the corresponding third stacking units Thereby obtaining the laminated substrate.

Method 3: The method is used to form a 2N+2 layer circuit board, and N is a natural number greater than or equal to 4. Specifically, first, M first circuit substrates 110 (M is a natural number, and N is greater than 2M+1), M+1 third circuit substrates 130, N-2M-1 second circuit substrates 120, and one The first copper foil piece 28 and the second copper foil piece 29 are aligned and stacked to form a laminated substrate, and the first copper foil piece 28 and the second copper foil piece 29 are respectively located at the outermost side of the laminated substrate. a conductive layer on both sides, and a first film 17, a second film 22 or a third film 23 between the adjacent insulating layers 11, between the adjacent insulating layer 11 and the first copper foil 28 and adjacent thereto a first film 17 or a second film 22 or a third film is disposed between the insulating layer 11 and the second copper foil sheet 29; secondly, a 2N+2 layer circuit substrate is obtained by pressing the laminated substrate at a time. In the 2N+2 layer circuit substrate, the first copper foil piece 28 and the second copper foil piece 29 are respectively located on the outermost sides of the 2N+2 layer circuit substrate, and the adjacent insulating layer 11 The first film 17, the second film 22 or the third film 23 are bonded together, and the adjacent insulating layer 11 and the first copper foil 28 are adjacent to each other and the adjacent insulating layer 11 and second copper foil 29 The first film 17 or the second film 22 or the third film 23 are bonded together; finally, the first copper foil 28 and the second copper foil 29 of the 2N+2 layer circuit substrate are respectively The conductive line pattern is formed by selective etching, that is, a 2N+2 layer wiring board is obtained. For the method for superposing the stacked substrates, reference may be made to the following embodiments:

Sixth embodiment: In this embodiment, M is a natural number greater than or equal to 1, and N is greater than 2M+1, and the laminated substrate can be formed by: first, a third circuit substrate 130 and one The first circuit substrate 110 is stacked into a first stacking unit having only two circuit substrates, thereby forming M first stacked units; secondly, N-2M-1 of the second circuit substrates 120 are stacked to form a second Stacking unit; finally, stacking the remaining one of the third circuit substrate 130, the M first stacking units, and one of the second stacking units between the first copper foil sheet 28 and the second copper foil sheet 29 So that the remaining one of the third circuit substrate 130 and the second copper foil 29 directly adhere to each other, and the third circuit substrate 130 of each of the first stacked units is corresponding to the first one of the corresponding first stacked units A circuit substrate 110 is adjacent to the first copper foil 28, and the first film 17 of each of the second circuit substrates 120 is closer to the first copper than the second conductive circuit pattern 16 of the corresponding second circuit substrate 120. The foil 28 is obtained to obtain the laminated substrate.

Certainly, the stacking manner of the first stacking unit and the second stacking unit may be different, and specifically, the second stacking unit may be located adjacent to the first stacking unit and the first Between the copper foil sheets 28; the second stacking unit may also be located between two adjacent first stacking units; the second stacking unit may also be located farthest from the first copper foil sheet 28. The first stacking unit is on the first circuit substrate 110.

When layering or subtracting the multilayer circuit board in this embodiment, it is only necessary to increase or decrease the number of the first stacking unit in the stacked substrate; or increase or decrease in the laminated substrate. The number of the second stacking units may be sufficient; or the number of the second circuit substrates 120 in the second stacking unit may be increased or decreased in the stacked substrate.

Referring to FIG. 13, the following describes an embodiment of a sixteen-layer circuit substrate 240 obtained by a stacking method of the sixth embodiment with N=7 and M=3 as an example. The sixteen-layer circuit substrate 240 has two first circuit substrates 110, three third circuit substrates 130, two second circuit substrates 120, one first copper foil piece 28 and one second copper foil piece 29 The stacked substrates are aligned and stacked, and formed by pressing the laminated substrates at a time. In the sixteen-layer circuit substrate 240, the first copper foil piece 28 and the second copper foil piece 29 are respectively located on the outermost sides of the sixteen-layer circuit substrate, and the adjacent insulating layers 11 are borrowed between The first film 17, the second film 22 or the third film 23 are bonded together, and the adjacent insulating layer 11 and the first copper foil 28 and the adjacent insulating layer 11 and the second copper foil 29 are borrowed. The first film 17 or the second film 22 or the third film 23 is bonded together. Specifically, the laminated substrate of the sixteen-layer circuit substrate 240 can be formed by stacking a first circuit substrate 110 and a third circuit substrate 130 to form a first stacked unit, thereby obtaining two first a stacking unit, two second circuit substrates 120 are stacked to form a second stacking unit; and a remaining one of the third circuit substrate 130 and the M first stacked units and one of the second stacked units are stacked on the first Between a copper foil piece 28 and the second copper foil piece 29, and the remaining one of the third circuit substrate 130 and the second copper foil piece 29 are directly attached, one of the second stacked units The second circuit substrate 120 is directly attached to the first copper foil sheet 28, and the first film 17 of each of the second circuit substrates 120 is opposite to the second conductive circuit pattern 16 of the corresponding second circuit substrate 120. Adjacent to the first copper foil, two first stacked units are sequentially stacked on the second circuit substrate 120 farthest from the first copper foil 28, and a third circuit substrate in each of the first stacked units 130 are corresponding to the corresponding first stacking unit Substrate 110 close to the first line of the first copper foil 28, whereby the laminated substrate.

Seventh embodiment: In this embodiment, M is a natural number greater than or equal to 1, and N=3M+1, and the laminated substrate can be formed by: first, a first circuit substrate 110, one The second circuit substrate 120 and the third circuit substrate 130 are stacked into a third stacking unit having only three circuit substrates, thereby forming M third stacked units; secondly, the remaining one of the third circuit substrates 130 and M is The third stacking unit is stacked between the first copper foil piece 28 and the second copper foil piece 29, and the remaining one of the third circuit substrate 130 and the second copper foil piece 29 are directly attached to each other. Mth of the third stacking unit is stacked between the first copper foil piece 28 and the remaining one of the third circuit substrates 130, and the third circuit substrate 130 of each third stacking unit is compared. The first circuit substrate 110 in the corresponding third stacking unit is adjacent to the first copper foil piece 28, thereby obtaining the stacked substrate.

Of course, the three circuit boards of the third stacking unit are stacked in a plurality of manners. Specifically, in each of the third stacking units, the third circuit substrate 130 is disposed adjacent to the first one. Between the circuit substrate 110 and the second circuit substrate 120, in the formed stacked substrate, the second circuit substrate 120 of each of the third stacked units is compared with the third circuit substrate 130 of the corresponding third stacked unit. Adjacent to the first copper foil sheet 28; or each of the third stacking units, the first circuit substrate 110 is disposed between the adjacent third circuit substrate 130 and the second circuit substrate 120. In the formed stacked substrate, the third circuit substrate 130 of each of the third stacked units is closer to the first copper foil sheet 28 than the second one of the corresponding third stacked units; or In the third stacking unit, the second circuit substrate 120 is disposed between the adjacent third circuit substrate 130 and the first circuit substrate 110. At this time, each of the formed stacked substrates is stacked. The third circuit substrate 130 is corresponding to the corresponding second circuit base The plate 120 is adjacent to the first copper foil piece 28.

When layering or subtracting the multilayer circuit board in this embodiment, it is only necessary to increase or decrease the number of the third stacking unit in the stacked substrate.

A person skilled in the art can understand that when the multilayer circuit board in the embodiment is layered or layered, one or more second stacking units as in the second embodiment may be added to the stacked substrate. The number of the second circuit substrates 120 of the second stacking unit may be one or plural, and the second stacking unit may be located between the adjacent third stacking unit and the first copper foil piece 28. The second stacking unit may also be located between two adjacent third stacking units, and the second stacking unit may also be located at a third stacking unit that is furthest from the first copper foil sheet 28 and The second stacking unit may be located between the second copper foil sheet 29 and the remaining one of the third circuit substrates 130. It is also understood by those skilled in the art that when the multilayer circuit board in this embodiment is layered or layered, one or more first stacking units as in the second embodiment may be added to the stacked substrate. in. It is also understood by those skilled in the art that when the multilayer circuit board in this embodiment is layered or layered, the first stacking unit as described in the second embodiment may be simultaneously added to the stacked substrate. The second stacking unit.

Referring to FIG. 14, the following describes the structure of the sixteen-layer circuit substrate 250 obtained by a stacking method of the seventh embodiment with N=7 and M=2 as an example. The sixteen-layer circuit substrate 250 has two first circuit substrates 110, three third circuit substrates 130, two second circuit substrates 120, one first copper foil piece 28 and one second copper foil piece 29 The stacked substrates are aligned and stacked, and formed by pressing the laminated substrates at a time. In the sixteen-layer circuit substrate 250, the first copper foil piece 28 and the second copper foil piece 29 are respectively located on the outermost sides of the sixteen-layer circuit substrate, and the adjacent insulating layers 11 are borrowed between Bonded together by the first film 17, the second film 22 or the third film 23, between the adjacent insulating layer 11 and the first copper foil 28 and between the adjacent insulating layer 11 and the second copper foil 29 Both are bonded together by the second film 22 or the third film. Specifically, the laminated substrate of the sixteen-layer circuit substrate 250 can be formed by stacking one second circuit substrate 120, one third circuit substrate 130, and one first circuit substrate 110 into one only one. a third stacking unit of the circuit substrate, wherein in each of the third stacking units, the first circuit substrate 110 is located between the adjacent second circuit substrate 120 and the third circuit substrate 130; the remaining one The third circuit substrate 130 and the two first stacked units are stacked between the first copper foil piece 28 and the second copper foil piece 29 to make the remaining one of the third circuit substrate 130 and the second The copper foil sheets 29 are directly attached, and the two third stacking units are arranged in a loop and stacked between the first copper foil sheet 28 and the remaining one of the third circuit substrates 130, and each of the first The third circuit substrate 130 of the three stacked units is closer to the first copper foil sheet 28 than the second one of the corresponding third stacked units, thereby obtaining the laminated substrate.

Method 3: The method is used to form a 2N+2 layer circuit board, and N is a natural number greater than or equal to 1. Specifically, the N second circuit substrates 120 and the first circuit substrate 110 are aligned and stacked into a stacked substrate, so that the first film 17 of each of the second circuit substrates 120 is larger than the second conductive circuit pattern 16 Close to the first circuit substrate 110, a 2N+2 layer circuit board is obtained after the laminated substrate is pressed once, and a 2N+2 layer circuit board is obtained. In the 2N+2 layer circuit board, the adjacent insulating layers 11 are bonded together by the first film 17.

Certainly, the manner in which the N of the second circuit substrate 120 and the first circuit substrate 110 are stacked is different. Specifically, the first circuit substrate 110 is disposed between the adjacent two second circuit substrates 120. The first film 17 of each of the second circuit substrates 120 is closer to the first circuit substrate 110 than the second conductive circuit pattern 16; or the first circuit substrate 110 is the most The outer circuit substrate, N of the second circuit substrates 120 are sequentially stacked on one side of the first circuit substrate 110.

When layering or subtracting the multilayer circuit board in this embodiment, it is only necessary to increase or decrease the number of the second circuit substrate 120 in the laminated substrate.

For the eighth embodiment, please refer to FIG. 15. The following describes the structure of the eight-layer circuit board 260 obtained by the third method with N=3 as an example. The eight-layer circuit board 260 can be formed by first aligning a first circuit substrate 110 with three second circuit substrates 120 and stacking them into a stacked substrate, so that the first circuit substrate 110 is located at the The outermost side of the stacked substrate, and the first film 17 of each of the second circuit substrates 120 is closer to the first circuit substrate 110 than the second conductive line pattern 16; secondly, the press is performed once The eight-layer wiring board 260 can be obtained by laminating the substrates.

Of course, it is not limited to the arrangement of the first method to the third method.

It can be understood that the laminated substrate formed by the above methods 1 to 3 can be used for performing one pressing and forming a conductive pattern of the copper foil (if there is such a step), and can also include a conductive line exposed from both sides after pressing. The step of forming a solder mask on the surface of the pattern.

The multi-layer circuit board manufacturing method provided by the technical solution simultaneously manufactures a plurality of circuit substrates, and then forms a film on one or both surfaces of a part of the circuit substrate by bonding, and forms a through hole in the film and is formed with a conductive material. Thus, as needed, a copper foil, a wiring substrate to which a film and a conductive material are bonded, and a wiring substrate to which a film is not attached are stacked, whereby a multilayer wiring board can be obtained by one press. Since the plurality of circuit substrates can be simultaneously fabricated, the time for manufacturing the circuit board can be shortened. Since each circuit substrate is separately fabricated, the yield of the circuit board can be improved compared to the layer-by-layer stacking method in the prior art.

However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

10. . . Copper clad substrate

11. . . Insulation

12. . . First copper foil layer

13. . . Second copper foil layer

14. . . Conductive hole

15. . . First conductive line pattern

16. . . Second conductive line pattern

110. . . First circuit substrate

17. . . First film

18. . . Release film

19. . . Protective film

20. . . First through hole

twenty one. . . First conductive material

120. . . Second circuit substrate

twenty two. . . Second film

twenty three. . . Third film

twenty four. . . Second through hole

25. . . Third through hole

26. . . Second conductive material

27. . . Third conductive material

130. . . Third circuit substrate

28. . . First copper foil

29. . . Second copper foil

30. . . Third conductive line pattern

31. . . Fourth conductive line pattern

32. . . First solder mask

33. . . Second solder mask

100. . . Ten-layer circuit board

200, 210. . . Fourteen layer circuit board

220, 230. . . Thirteen-layer circuit substrate

240, 250. . . Sixteen-layer circuit substrate

260. . . Eight-layer circuit board

1 is a schematic cross-sectional view of a copper clad substrate provided by a first embodiment of the present technical solution.

2 is a schematic cross-sectional view showing a first circuit substrate formed by forming a conductive hole, a first conductive line pattern, and a second conductive line pattern on the copper-clad substrate of FIG. 1 according to the first embodiment of the present invention.

3 is a first embodiment of the first embodiment of the present invention, the first conductive circuit pattern of the first circuit substrate of FIG. 2 is superimposed on the first film and the release film, and the second conductive circuit pattern is attached to the protective film. And pre-compressing the cross-sectional schematic diagram of the first circuit substrate, the first film, the release film and the protective film.

4 is a cross-sectional view showing a second circuit substrate formed by forming a first blind via hole on the first film of FIG. 3 and forming a first conductive material in the first blind via hole according to the first embodiment of the present invention.

FIG. 5 is a schematic cross-sectional view showing a third circuit substrate according to the first embodiment of the present technical solution.

6 is a first embodiment of the present invention for pressing a first copper foil, a third circuit substrate, a first circuit substrate, another third circuit substrate, a second circuit substrate, and a second A schematic cross-sectional view of the whole formed after the copper foil.

FIG. 7 is a cross-sectional view showing the first copper foil sheet of FIG. 6 formed into a third conductive line pattern and the second copper foil sheet being formed into a fourth conductive line pattern according to the first embodiment of the present technical solution.

8 is a ten-layer line formed by forming a first solder resist layer on the third conductive trace pattern in FIG. 7 and forming a second solder resist layer on the fourth conductive trace pattern in the first embodiment of the present technical solution. Schematic diagram of the board.

FIG. 9 is a schematic structural diagram of a fourteen-layer circuit board obtained by a stacking manner of the second embodiment when N=7 and M=3 provided by the present technical solution.

FIG. 10 is a schematic structural diagram of a fourteen-layer circuit board obtained by a stacking manner of the third embodiment when N=7 and M=3 provided by the present technical solution.

FIG. 11 is a schematic structural diagram of a thirteen-layer circuit substrate obtained by a stacking method of the fourth embodiment when N=6 and M=3 provided by the present technical solution.

FIG. 12 is a schematic structural diagram of a thirteen-layer circuit substrate obtained by a stacking manner of the fifth embodiment when N=6 and M=2 provided by the present technical solution.

FIG. 13 is a schematic structural diagram of a sixteen-layer circuit substrate obtained by a stacking manner of the sixth embodiment when N=7 and M=3 provided by the present technical solution.

FIG. 14 is a schematic structural diagram of a sixteen-layer circuit substrate obtained by a stacking method of the seventh embodiment when N=7 and M=2 provided by the present technical solution.

FIG. 15 is a schematic structural diagram of an eight-layer circuit board obtained by stacking when N=3 provided by the technical solution.

110. . . First circuit substrate

120. . . Second circuit substrate

130. . . Third circuit substrate

30. . . Third conductive line pattern

31. . . Fourth conductive line pattern

Claims (24)

A method for manufacturing a multilayer circuit board, comprising the steps of:
Providing N copper-clad substrates, wherein N is a natural number greater than or equal to 4, each of the copper-clad substrates includes an insulating layer and a first copper foil layer and a second copper attached to opposite sides of the insulating layer Foil layer
Forming a first conductive line pattern on the first copper foil layer of each of the copper-clad substrates, forming a second conductive line pattern on each of the copper-clad substrates, and forming the first conductive line pattern The circuit pattern and the second conductive line pattern are electrically connected to each other by at least one conductive hole, thereby forming N the copper clad substrates into N first circuit substrates;
Taking N-2M+1 first circuit substrates from the N first circuit substrates, where M is a natural number greater than or equal to 2, and N is greater than 2M-1, as described in N-2M+1 A first conductive film pattern surface of each of the first circuit substrates in the first circuit substrate is attached to a first film, the first film has at least one first through hole, and the at least one first through hole The hole is filled with a first conductive material, and the first conductive material and the adjacent first conductive line pattern are electrically connected to each other, thereby forming N-2M+1 first circuit substrates into N-2M+1 second lines Substrate
Taking M-1 first circuit substrates from the N first circuit substrates, and bonding the surface of the first conductive circuit pattern in each of the first circuit substrates of the M-1 first circuit substrates a second film, the third conductive film pattern surface of each of the first circuit substrates of the M-1 of the first circuit substrate is attached to the third film, and the second film has at least one second through hole. The third film has at least one third through hole, and the second conductive material is filled in the at least one second through hole, and the second conductive material and the adjacent first conductive line pattern are electrically connected to each other. The at least one third via hole is filled with a third conductive material, and the third conductive material and the adjacent second conductive trace pattern are electrically connected to each other, thereby forming M-1 the first circuit substrates into M-1 a third circuit substrate; and pressing the remaining M first circuit substrates, the N-2M+1 second circuit substrates, and the M-1 third circuit substrates at a time to form a 2N layer circuit board, In the 2N layer circuit board, adjacent insulating layers are separated by a first film, a second film, or The three films are bonded together, and two first circuit substrates are located on the outermost sides of the 2N layer circuit boards, or one first circuit substrate and one second circuit substrate are located at the outermost two of the 2N layer circuit boards. The side, or the two second circuit substrates are located on the outermost sides of the 2N layer circuit board. The method of fabricating a multilayer circuit board according to claim 1, wherein the remaining M first circuit substrates, the N-2M+1 second circuit substrates, and the M-1 third lines are pressed together Aligning and stacking the remaining M first circuit substrates, the N-2M+1 second circuit substrates, and the M-1 third circuit substrates to form a stack before forming the 2N layer wiring board a substrate, the method for forming the stacked substrate comprises the steps of:
One of the M first circuit substrates is used as the outermost circuit substrate of the stacked substrate; and among the remaining M-1 first circuit substrates and M-1 third circuit substrates, one The third circuit substrate and a first circuit substrate are stacked to form a first stacking unit having only two circuit substrates, thereby obtaining M-1 first stacked units;
Stacking N-2M+1 the second circuit substrates to form a second stacking unit;
Stacking M-1 the first stacking unit and one of the second stacking unit on the first circuit substrate as the outermost circuit substrate, and making the third circuit substrate in each of the first stacking units corresponding The first circuit substrate of the first stacking unit is adjacent to the first circuit substrate as the outermost circuit substrate, so that the first film of each of the second circuit substrates of the second stacking unit is corresponding to the second circuit The second conductive line pattern of the substrate is adjacent to the first circuit substrate as the outermost circuit substrate, thereby obtaining the laminated substrate. The method of fabricating a multilayer circuit board according to claim 1, wherein the step of stacking M-1 of the first stacking unit and the second stacking unit on a first circuit substrate as an outermost circuit substrate The second stacking unit is located between the adjacent first stacking unit and the first circuit substrate as the outermost circuit substrate, or the second stacking unit is located adjacent to the two of the first Between a stacking unit, or the second stacking unit is stacked on a first circuit substrate of a first stacking unit that is furthest from the first circuit substrate of the outermost circuit substrate. The method for fabricating a multilayer circuit board according to claim 1, wherein N=3M-2, for pressing the remaining M first circuit substrates, the N-2M+1 second circuit substrates, and the M Aligning and stacking the remaining M first circuit substrates, the N-2M+1 second circuit substrates, and the M-1 thirds before forming a 2N circuit board a circuit substrate to form a laminated substrate, the method for forming the laminated substrate comprising the steps of:
One of the M first circuit substrates is used as the outermost circuit substrate;
Stacking a first circuit substrate, a second circuit substrate, and a third circuit substrate in the remaining M-1 first circuit substrates, M-1 second circuit substrates, and M-1 third circuit substrates Forming a third stacking unit having only three circuit substrates, thereby obtaining M-1 third stacked units;
Stacking M-1 the third stacking units on the first circuit substrate as the outermost circuit substrate, and making the third circuit substrate in each of the third stacking units correspond to the third of the corresponding third stacking units A circuit substrate is adjacent to the first circuit substrate as the outermost circuit substrate, thereby obtaining the laminated substrate. The manufacturing method of the multi-layer circuit board of claim 4, wherein in the third stacking unit, the third circuit substrate is disposed between the adjacent first circuit substrate and the second circuit substrate, or The first circuit substrate is disposed between the adjacent third circuit substrate and the second circuit substrate, or the second circuit substrate is disposed between the adjacent third circuit substrate and the first circuit substrate. The method for manufacturing a multilayer circuit board according to claim 1, wherein the step of forming N-2M+1 first circuit substrates into N-2M+1 second circuit substrates comprises the following steps:
Disposing the first film and a release film sequentially on each of the first conductive circuit patterns of the N-2M+1 first circuit substrates, and N-2M+1 the first circuit substrates Each of the second conductive line pattern surfaces is adhered to a protective film;
Pre-compressing the first circuit substrate, the first film, the release film and the protective film, bonding the first film and the first circuit substrate together, and bonding the protective film to the second conductive On the line graphic;
Removing the release film;
Forming the at least one first via hole in the first film by a laser drilling process, and a portion of the first conductive trace pattern is exposed from the at least one first via hole;
Forming a first conductive material in the at least one first via hole by printing a conductive paste; and removing the protective film. The method for fabricating a multilayer circuit board according to claim 1, wherein the M-1 first circuit substrates are made into M-1 third circuit substrates, including the steps of:
And superposing the second film and a release film on each of the first one of the M-1 first circuit substrates, and each of the M-1 first circuit substrates The second conductive line pattern surface is attached to a third film and another release film;
Pre-compressing the first circuit substrate, the second film, the third film and the two release films to bond the second film and the third film to both sides of the first circuit substrate;
Removing the two release films;
Forming the at least one second via hole in the second film by a laser drilling process, and a portion of the first conductive trace pattern is exposed from the at least one second via hole by a laser drilling process Forming the at least one third through hole in the third film, a portion of the second conductive line pattern is exposed from the at least one third through hole; and printing the conductive paste on the at least one second pass A second conductive material is formed in the hole, and a third conductive material is formed in the at least one third via hole by printing a conductive paste. A method for manufacturing a multilayer circuit board, comprising the steps of:
Providing N copper-clad substrates, wherein N is a natural number greater than or equal to 3, each of the copper-clad substrates includes an insulating layer and a first copper foil layer and a second copper attached to opposite sides of the insulating layer Foil layer
Forming a first conductive line pattern on the first copper foil layer of each of the copper-clad substrates, forming a second conductive line pattern on each of the copper-clad substrates, and forming the first conductive line pattern The circuit pattern and the second conductive line pattern are electrically connected to each other by at least one conductive hole, thereby forming N the copper clad substrates into N first circuit substrates;
N-2M first circuit substrates are taken from the N first circuit substrates, wherein M is a natural number, and N is greater than 2M, and each of the N-2M first circuit substrates is a first conductive line pattern surface of a circuit substrate is attached to the first film, the first film has at least one first through hole, and the first conductive material is filled with the first conductive material, the first conductive material Conducting electrical continuity with adjacent first conductive line patterns to form N-2M of the first circuit substrates into N-2M second circuit substrates;
Taking M first circuit substrates from the N first circuit substrates, and bonding the second film to the surface of the first conductive circuit pattern in each of the M first circuit substrates, a second conductive line pattern surface of each of the M first circuit substrates is attached to the third film, and the second film has at least one second through hole for each of the third The film has at least one third through hole, and the second conductive material is filled in the at least one second through hole, and the second conductive material and the adjacent first conductive line pattern are electrically connected to each other, at least one The third via hole is filled with a third conductive material, and the third conductive material and the adjacent second conductive line pattern are electrically connected to each other, thereby forming M first circuit substrates into M third circuit substrates;
Providing a first copper foil sheet, and pressing the remaining M first circuit substrates, N-2M the second circuit substrates, M third circuit substrates, and the first copper foil sheets at a time to form 2N+ a layer of circuit substrate, in the 2N+1 layer circuit substrate, adjacent insulating layers are bonded together by a first film, a second film or a third film, an adjacent insulating layer and a first copper foil The sheets are bonded together by a first film or a second film, and the first copper foil is located on an outermost side of the 2N+1 layer circuit substrate, and the first circuit substrate or one of the first Two circuit substrates are located on the outermost side of the 2N+1 layer circuit substrate; and the first copper foil is formed into a conductive circuit pattern by selective etching to obtain a 2N+1 layer circuit board. The method of fabricating a multilayer circuit board according to claim 8, wherein the remaining M first circuit substrates, N-2M second circuit substrates, M third circuit substrates, and Aligning and stacking the remaining M first circuit substrates, N-2M the second circuit substrates, M third circuit substrates, and the first copper foil sheet to form a 2N+1 layer wiring substrate The first copper foil sheet to form a laminated substrate, and the method for forming the laminated substrate comprises the steps of:
In the remaining M first circuit substrates and the M third circuit substrates, a third circuit substrate and a first circuit substrate are stacked to form a first stacking unit having only two circuit substrates, thereby obtaining M first a stacking unit;
Stacking N-2M of the second circuit substrates to form a second stacking unit;
Stacking the M first stacking units and one of the second stacking units on the first copper foil sheet, and making the third circuit substrate in each of the first stacking units correspond to the corresponding first stacking unit The first circuit substrate is adjacent to the first copper foil, so that the first film of each of the second circuit substrates of the second stacking unit is closer to the second conductive circuit pattern of the corresponding second circuit substrate The first copper foil sheet, thereby obtaining the laminated substrate. A method of manufacturing a multilayer wiring board according to claim 9, wherein in the step of stacking the M first stacking units and the second stacking unit on the first copper foil sheet, the a second stacking unit located between the adjacent first stacking unit and the first copper foil sheet, or the second stacking unit being located between two adjacent first stacking units, or the first The two stacking units are stacked on the first circuit substrate of the first stacking unit farthest from the first copper foil piece. The method for fabricating a multilayer circuit board according to claim 8, wherein N=3M, and M remaining the first first circuit substrate, N-2M of the second circuit substrate, and M of the third Before the circuit substrate and the first copper foil sheet are formed to form a 2N+1 layer circuit substrate, the remaining M first circuit substrates, N-2M second circuit substrates, and M pieces are aligned and stacked a three-circuit substrate and the first copper foil sheet to form a laminated substrate, and the method for forming the laminated substrate comprises the steps of:
And stacking a first circuit substrate, a second circuit substrate, and a third circuit substrate into only one of the remaining M first circuit substrates, the M second circuit substrates, and the M third circuit substrates a third stacking unit of the substrate, thereby obtaining M third stacking units;
Stacking M of the third stacked units on the first copper foil, and causing the third circuit substrate in each of the third stacked units to be closer to the first circuit substrate in the corresponding third stacked unit The first copper foil is obtained, thereby obtaining the laminated substrate. The manufacturing method of the multi-layer circuit board of claim 11, wherein in the third stacking unit, the third circuit substrate is disposed between the adjacent first circuit substrate and the second circuit substrate, or The first circuit substrate is disposed between the adjacent third circuit substrate and the second circuit substrate, or the second circuit substrate is disposed between the adjacent third circuit substrate and the first circuit substrate. The method for fabricating a multilayer circuit board according to claim 8, wherein the N-2M first circuit substrates are made into N-2M second circuit substrates, including the steps of:
The first film and a release film are sequentially laminated on each of the N-2M first circuit substrates, and each of the N-2M first circuit substrates The surface of the second conductive line pattern is adhered to a protective film;
Pre-compressing the first circuit substrate, the first film, the release film and the protective film, bonding the first film and the first circuit substrate together, and bonding the protective film to the second conductive On the line graphic;
Removing the release film;
Forming the at least one first via hole in the first film by a laser drilling process, and a portion of the first conductive trace pattern is exposed from the at least one first via hole;
Forming a first conductive material in the at least one first via hole by printing a conductive paste; and removing the protective film. The method for fabricating a multilayer circuit board according to claim 8, wherein the forming the M first circuit substrates into the M third circuit substrates comprises the steps of:
And superposing the second film and a release film on each of the M first circuit substrates, and each of the M first circuit substrates The graphic surface is attached to a third film and another release film;
Pre-compressing the first circuit substrate, the second film, the third film and the two release films to bond the second film and the third film to both sides of the first circuit substrate;
Removing the two release films;
Forming the at least one second via hole in the second film by a laser drilling process, and a portion of the first conductive trace pattern is exposed from the at least one second via hole by a laser drilling process Forming the at least one third through hole in the third film, a portion of the second conductive line pattern is exposed from the at least one third through hole; and printing the conductive paste on the at least one second pass A second conductive material is formed in the hole, and a third conductive material is formed in the at least one third via hole by printing a conductive paste. A method for manufacturing a multilayer circuit board, comprising the steps of:
Providing N copper-clad substrates, wherein N is a natural number greater than or equal to 3, each of the copper-clad substrates includes an insulating layer and a first copper foil layer and a second copper attached to opposite sides of the insulating layer Foil layer
Forming a first conductive line pattern on the first copper foil layer of each of the copper-clad substrates, forming a second conductive line pattern on each of the copper-clad substrates, and forming the first conductive line pattern The circuit pattern and the second conductive line pattern are electrically connected to each other by at least one conductive hole, thereby forming N the copper clad substrates into N first circuit substrates;
Taking N-2M-1 first circuit substrates from the N first circuit substrates, wherein M is a natural number, and N is greater than 2M+1, in N-2M-1 of the first circuit substrates The first conductive line pattern surface of each of the first circuit substrates is attached to a first film, the first film has at least one first through hole, and the first at least one first through hole is filled with the first a conductive material, the first conductive material and the corresponding first conductive line pattern are electrically connected to each other, thereby forming N-2M-1 the first circuit substrates into N-2M-1 second circuit substrates;
Taking M+1 first circuit substrates from the N first circuit substrates, and bonding the surface of the first conductive circuit pattern in each of the first circuit substrates of the M+1 first circuit substrates a second film, the second conductive line pattern surface of each of the M+1 first circuit substrates is attached to the third film, and the second film has at least one second through hole. The third film has at least one third through hole, and the second conductive material is filled in the at least one second through hole, and the second conductive material and the adjacent first conductive line pattern are electrically connected to each other. The at least one third via hole is filled with a third conductive material, and the third conductive material and the adjacent second conductive trace pattern are electrically connected to each other, thereby forming M+1 the first circuit substrates into M+1. a third circuit substrate;
Providing a first copper foil piece and a second copper foil piece, and pressing the first copper foil piece, the remaining M first circuit boards, N-2M-1 the second circuit boards, M+1 pieces at a time The third circuit substrate and the second copper foil are formed to form a 2N+2 layer circuit substrate. In the 2N+2 layer circuit substrate, the first copper foil and the second copper foil are respectively Located on the outermost sides of the 2N+2 layer circuit substrate, and the adjacent insulating layers are bonded together by the first film, the second film or the third film, the adjacent insulating layer and the first copper foil Between the sheets and between the adjacent insulating layer and the second copper foil are bonded together by the first film or the second film or the third film; and the first copper foil and the second copper foil are bonded together A conductive line pattern was formed through selective etching to obtain a 2N+2 layer wiring board. The method of manufacturing a multilayer circuit board according to claim 15, wherein the first copper foil, the remaining M first circuit substrates, and N-2M-1 of the second circuit substrates are laminated at a time, M+1 the third circuit substrate and the second copper foil sheet to form and stack the first copper foil, the remaining M first circuit substrates, and N- before forming the 2N+2 layer wiring substrate 2M-1 said second circuit substrate, M+1 said third circuit substrate and said second copper foil to form a laminated substrate, and the method for forming said laminated substrate comprises the steps of:
In the remaining M first circuit substrates and the M third circuit substrates, a third circuit substrate and a first circuit substrate are stacked to form a first stacking unit having only two circuit substrates, thereby obtaining M first a stacking unit;
Stacking N-2M-1 of the second circuit substrates to form a second stacking unit;
Stacking a remaining one of the third circuit substrate, the M first stacking units, and one of the second stacking units between the first copper foil sheet and the second copper foil sheet, and causing the remaining a third circuit substrate directly adjacent to the second copper foil, such that the third circuit substrate in each of the first stacked units is closer to the first circuit than the first circuit substrate in the corresponding first stacked unit a copper foil sheet, wherein a first film of each of the second circuit substrates of the second stacking unit is closer to the first copper foil sheet than a second conductive line pattern of a corresponding second circuit substrate, thereby obtaining The stacked substrate. The method of fabricating a multilayer circuit board according to claim 16, wherein the remaining one of the third circuit substrate, the M first stacked units, and the second stacked unit are stacked on the first copper foil In the step between the sheet and the second copper foil sheet, the second stacking unit is located between the adjacent first stacking unit and the first copper foil sheet, or the second stacking unit is located Between two adjacent first stacked units, or the second stacked unit is stacked on a first circuit substrate of the first stacking unit farthest from the first copper foil. The method for fabricating a multilayer circuit board according to claim 15, wherein N=3M+1, the first copper foil, the remaining M first circuit substrates, and the N-2M-1 are pressed together at a time. Before the second circuit substrate, the M+1 third circuit substrates, and the second copper foil are formed to form a 2N+2 layer circuit substrate, the first copper foil and the remaining M a circuit substrate, N-2M-1 of the second circuit substrate, M+1 of the third circuit substrate, and the second copper foil to form a laminated substrate, and the method for forming the laminated substrate comprises step:
And stacking one first circuit substrate, one second circuit substrate and one third circuit substrate into only one of the remaining M first circuit substrates, the M second circuit substrates, and the M third circuit substrates a third stacking unit of the substrate, thereby obtaining M third stacking units;
Stacking a remaining third circuit substrate and M of the third stacked units between the first copper foil and the second copper foil, and causing the remaining one of the third circuit substrates and the first Two copper foil sheets are directly attached, and the M third stacked units are stacked between the first copper foil sheet and the remaining one of the third circuit substrates, so that the third line in each third stacking unit The substrate is closer to the first copper foil than the first one of the corresponding third stacked units, thereby obtaining the laminated substrate. The method of fabricating a multilayer circuit board according to claim 18, wherein in the third stacking unit, the third circuit substrate is disposed between the adjacent first circuit substrate and the second circuit substrate, or The first circuit substrate is disposed between the adjacent third circuit substrate and the second circuit substrate, or the second circuit substrate is disposed between the adjacent third circuit substrate and the first circuit substrate. The method for fabricating a multilayer circuit board according to claim 15, wherein the step of forming the N-2M-1 first circuit substrates into N-2M-1 second circuit substrates comprises the steps of:
And superposing the first film and a release film on each of the first conductive circuit patterns of the N-2M-1 first circuit substrates, and N-2M-1 the first circuit substrates Each of the second conductive line pattern surfaces is adhered to a protective film;
Pre-compressing the first circuit substrate, the first film, the release film and the protective film, bonding the first film and the first circuit substrate together, and bonding the protective film to the second conductive On the line graphic;
Removing the release film;
Forming the at least one first via hole in the first film by a laser drilling process, and a portion of the first conductive trace pattern is exposed from the at least one first via hole;
Forming a first conductive material in the at least one first via hole by printing a conductive paste; and removing the protective film. The method for fabricating a multilayer circuit board according to claim 15, wherein the M+1 first circuit substrates are made into M+1 third circuit substrates, including the steps of:
And superposing the second film and a release film on each of the M+1 first circuit substrates, respectively, on each of the M+1 first circuit substrates The second conductive line pattern surface is attached to a third film and another release film;
Pre-compressing the first circuit substrate, the second film, the third film and the two release films to bond the second film and the third film to both sides of the first circuit substrate;
Removing the release film;
Forming the at least one second via hole in the second film by a laser drilling process, and a portion of the first conductive trace pattern is exposed from the at least one second via hole by a laser drilling process Forming the at least one third through hole in the third film, a portion of the second conductive line pattern is exposed from the at least one third through hole; and printing the conductive paste on the at least one second pass A second conductive material is formed in the hole, and a third conductive material is formed in the at least one third via hole by printing a conductive paste. A method for manufacturing a multilayer circuit board, comprising the steps of:
Providing N+1 copper-clad substrates, wherein N is a natural number greater than or equal to 1, each of the copper-clad substrates comprising an insulating layer and a first copper foil layer attached to opposite sides of the insulating layer and Two copper foil layers;
Forming a first conductive line pattern on the first copper foil layer of each of the copper-clad substrates, forming a second conductive line pattern on each of the copper-clad substrates, and forming the first conductive line pattern The circuit pattern and the second conductive line pattern are electrically connected to each other by at least one conductive hole, thereby forming N+1 the copper-clad substrates into N+1 first circuit substrates;
N first first circuit substrates are taken from N+1 of the first circuit substrates, and a surface of the first conductive line pattern in each of the first circuit substrates of the N first circuit substrates is attached a film, the first film has at least one first through hole, the first conductive material is filled with a first conductive material, and the first conductive material and the adjacent first conductive line pattern are electrically connected to each other , thereby forming N of the first circuit substrates into N second circuit substrates;
Npressing the two second circuit substrates and the remaining one of the first circuit substrates to form a 2N+2 layer circuit board, and in the 2N+2 layer circuit board, each of the second circuit boards A film is closer to the first circuit substrate than the second conductive line pattern, and adjacent insulating layers are bonded together by the first film. The method of fabricating a multilayer circuit board according to claim 22, wherein the forming the N first circuit substrates into the N second circuit substrates comprises the steps of:
And sequentially laminating the first film and a release film on the first conductive circuit pattern of each of the N first circuit substrates, among the N first circuit substrates a surface of the second conductive line pattern of each of the first circuit substrates is adhered to a protective film;
Pre-compressing the first circuit substrate, the first film, the release film and the protective film, bonding the first film and the first circuit substrate together, and bonding the protective film to the second conductive On the line graphic;
Removing the release film;
Forming the at least one first via hole in the first film by a laser drilling process, and a portion of the first conductive trace pattern is exposed from the at least one first via hole;
Forming a first conductive material in the at least one first via hole by printing a conductive paste; and removing the protective film. A multi-layered circuit board, which is manufactured by the method of manufacturing a multilayer wiring board according to any one of claims 1 to 23, comprising a plurality of layers of insulating layers, a multilayer film, and a plurality of layers of conductive sheets. a circuit pattern, each of the opposite sides of each insulating layer is provided with a layer of the conductive circuit pattern, and conductive circuit patterns on both sides of each insulating layer are electrically conducted by at least one conductive hole disposed in the insulating layer, each layer A conductive layer pattern is disposed on opposite sides of the film, and conductive circuit patterns on opposite sides of each film are electrically conducted by a conductive material disposed in the film, and the conductive material in the film is printed by conductive The cream is formed.