TW201406223A - Multilayer printed circuit board and method for manufacturing same - Google Patents

Abstract

The present disclosure relates to a method for manufacturing a multilayer printed circuit board. The method includes steps as follows. First, a number of copper clad laminates are provided. Second, the copper layers of the copper clad laminates are patterned to form conductive patterns, and then a number of first printed circuit boards are obtained. Third, two adhesive sheets are respectively adhered on two opposite surfaces of each of certain first printed circuit boards. At least one though hole is formed in each of the adhesive sheets and a conductive material is filled in each of the though holes to obtain a number of second printed circuit boards. Four, A copper foil and another adhesive sheet are provided. The first printed circuit board, the second printed circuit board, the copper foil and the adhesive sheet are laminated to obtain a lamination board. And then at least one blind via is formed in the lamination board and a conductive material is filled in the at least one blind via. The copper foil is patterned to form a conductive pattern. Then, a multilayer printed circuit board is formed. A multilayer printed circuit board manufactured from the above-mentioned method is also provided.

Description

Multilayer circuit board and manufacturing method thereof

The invention relates to a circuit board manufacturing technology, in particular to a multilayer circuit board and a manufacturing method thereof.

With the development of electronic products in the direction of miniaturization and high speed, circuit boards have also developed from single-sided circuit boards and double-sided circuit boards to multi-layer circuit boards. Multi-layer circuit board refers to a circuit board with multiple layers of conductive lines, which has more wiring area and higher interconnection density, and thus has been widely used, see the literature Takahashi, A. Ooki, N. Nagai, A. Akahoshi, H Mukoh, A. Wajima, M. Res. Lab., High density multilayer printed circuit board for HITAC M-880, IEEE Trans. on Components, Packaging, and Manufacturing Technology, 1992, 15(4): 418-425.

At present, multi-layer circuit boards are usually produced by a build-up method, that is, by layer stacking. The method for fabricating a multilayer wiring board by a conventional build-up method includes the steps of: first, fabricating an inner layer board comprising at least one layer of insulating material and two conductive circuit layers, the two conductive circuit layers The phase is electrically conducted by at least one conductive hole. In the second step, an adhesive sheet and a copper foil layer are respectively pressed on the two conductive circuit layers of the inner layer board, wherein the copper foil layer is electrically conductively connected to the inner layer board by the adhesive sheet Bonding, selectively etching the copper foil layer to form the outermost conductive trace pattern to form a multilayer wiring substrate; and third step, using a laser drilling method or the like on the multilayer wiring substrate Forming at least one blind hole thereon, electroplating the at least one blind hole to electrically conduct the copper foil layer and the conductive circuit layer of the inner layer plate; and fourth, forming at least one through hole on the multilayer circuit substrate, And the through holes are plated to electrically connect the two outermost conductive trace patterns of the multilayer circuit substrate, thereby obtaining a multilayer wiring board. If more layers of the multi-layer circuit board are required, follow a similar method in the second to third steps, that is, continue to press a copper foil on the two outermost conductive circuit patterns of the multilayer circuit substrate, and selectively etch. The copper foil layer electrically connects the conductive circuit layers to be connected. In this way, more layers of the multilayer circuit board can be obtained.

However, in the manufacturing process of the above multilayer circuit board, each time a layer is added, a pressing process is required, and when a plurality of layers of the circuit board are produced, the number of pressing times is correspondingly large, which is disadvantageous for the process. Simplification, production costs are relatively high, and production efficiency is relatively low.

In view of the above, it is necessary to provide a method for fabricating a multilayer wiring board and a multilayer wiring board obtained by the method to improve the fabrication efficiency of the multilayer wiring board.

A method for manufacturing a multilayer circuit board, comprising the steps of: providing 2N copper-clad substrates, wherein N is a natural number greater than or equal to 1, each of the copper-clad substrates comprising an insulating layer and being bonded to the insulating layer opposite to each other a first copper foil layer and a second copper foil layer; a first copper foil layer of each of the copper-clad substrates is formed into a first conductive line pattern, and a second copper foil layer of each of the copper-clad substrates is formed Forming a second conductive line pattern to form 2N of the copper-clad substrates into 2N first circuit substrates; and taking N first circuit substrates from 2N of the first circuit substrates, The first conductive line pattern surface of each of the first circuit substrates of the first circuit substrate is bonded to the first film, and the second conductive line pattern surface of each of the N first circuit substrates is bonded to the surface a second film, the first film has at least one first through hole, the second film has at least one second through hole, and the first conductive material is filled in the at least one first through hole, the first film a conductive material and an adjacent first conductive line pattern Conducting mutual electric conduction, filling a second conductive material in the at least one second through hole, the second conductive material and the adjacent second conductive line pattern being electrically connected to each other, thereby making N the first circuit substrates Forming N second circuit substrates; providing a third film, a first copper foil and a second copper foil, and pressing the second copper foil, the N second circuit substrates, and the remaining N at a time The first circuit substrate, the third film, and the first copper foil are formed to form a 4N+2 layer circuit substrate. In the 4N+2 layer circuit substrate, adjacent insulating layers pass through the first film or The second film is bonded together, and the adjacent insulating layer and the first copper foil are bonded together by the third film, and the adjacent insulating layer and the second copper foil are bonded by the first film or the second film. Together, the first copper foil and the second copper foil are located on the outermost sides of the 4N+2 layer circuit substrate; at least one blind hole is formed on the 4N+2 layer circuit substrate, At least one blind hole penetrating the first copper foil and the third film, and the at least one blind hole Filling a third conductive material such that the first copper foil and the adjacent conductive trace pattern are electrically connected to each other through the third conductive material; and selecting the first copper foil and the second copper foil via the selection The etching is performed to form a conductive line pattern, thereby obtaining a 4N+2 layer wiring board.

A method for manufacturing a multilayer circuit board, comprising the steps of: providing 2N+1 copper-clad substrates, wherein N is a natural number greater than or equal to 1, each of the copper-clad substrates comprising an insulating layer and being bonded to the insulating layer a first copper foil layer and a second copper foil layer on opposite sides; forming a first conductive line pattern on each of the copper-clad substrates, and forming a second copper layer on each of the copper-clad substrates Forming a second conductive trace pattern by the foil layer, thereby forming 2N+1 the copper clad substrates into 2N+1 first circuit substrates; taking N first lines in 2N+1 the first circuit substrates Substrate, the first conductive line pattern surface of each of the N first circuit substrates is bonded to the first film, and the first circuit substrate of each of the N first circuit substrates The second conductive line pattern surface is attached to the second film, the first film has at least one first through hole, the second film has at least one second through hole, and is filled in the at least one first through hole a first conductive material, the first conductive material and an adjacent first conductive line Electrically conducting, electrically filling a second conductive material in the at least one second via, the second conductive material and the adjacent second conductive trace pattern being electrically connected to each other, thereby N the first circuit substrates Forming N second circuit substrates; providing a third film and a first copper foil, and pressing the first copper foil, the N second circuit substrates, and the remaining N+1 of the first a circuit substrate and a third film to form a 4N+3 layer circuit substrate. In the 4N+3 layer circuit substrate, adjacent insulating layers are bonded together by a first film or a second film, and adjacent to each other. The layer and the first copper foil are bonded together by a third film, and the first copper foil and one of the first circuit substrates are located on the outermost sides of the 4N+3 layer circuit substrate; Forming at least one blind hole on the 4N+3 layer circuit substrate, the at least one blind hole penetrating the first copper foil piece and the third film, and filling the at least one blind hole with a third conductive material Passing the first copper foil and the conductive circuit pattern adjacent thereto through the third conductive Feed conducted with each other; and the first conductive pattern made of copper foil by selective etching, thereby obtaining 4N + 3 layer PCB.

A method for manufacturing a multilayer circuit board, comprising the steps of: providing 2N+1 copper-clad substrates, wherein N is a natural number greater than or equal to 1, each of the copper-clad substrates comprising an insulating layer and being bonded to the insulating layer a first copper foil layer and a second copper foil layer on opposite sides; forming a first conductive line pattern on each of the copper-clad substrates, and forming a second copper layer on each of the copper-clad substrates Forming a second conductive trace pattern by the foil layer, thereby forming 2N+1 the copper clad substrates into 2N+1 first circuit substrates; taking N first lines in 2N+1 the first circuit substrates Substrate, the first conductive line pattern surface of each of the N first circuit substrates is bonded to the first film, and the first circuit substrate of each of the N first circuit substrates The second conductive line pattern surface is attached to the second film, the first film has at least one first through hole, the second film has at least one second through hole, and is filled in the at least one first through hole a first conductive material, the first conductive material and an adjacent first conductive line Electrically conducting, electrically filling a second conductive material in the at least one second via, the second conductive material and the adjacent second conductive trace pattern being electrically connected to each other, thereby N the first circuit substrates Forming N second circuit substrates; providing a third film, a fourth film, a first copper foil and a second copper foil, and pressing the second copper foil and the N second circuit substrates at a time And remaining N+1 the first circuit substrate, the third film, the fourth film, and the first copper foil to form a 4N+4 layer circuit substrate, in the 4N+4 layer circuit board, phase The adjacent insulating layers are bonded together by the first film or the second film, and the adjacent insulating layer and the first copper foil are bonded together by the third film, and the adjacent insulating layer and the second copper foil are bonded together. Bonded together by the fourth film, and the first copper foil and the second copper foil are located on the outermost sides of the 4N+4 layer circuit substrate; two of the 4N+4 layer circuit substrates Forming at least one first blind hole and at least one second blind hole respectively, the at least one first blind hole penetrating the side a copper foil and the third film attached to the first copper foil, the at least one second blind hole penetrating the second copper foil and pasting the second copper foil The fourth film is filled with a third conductive material in each of the blind holes, and the first copper foil and the conductive circuit pattern adjacent to the first copper foil are passed through the first copper The third conductive material adjacent to the foil is electrically connected to each other, and the second copper foil and the conductive circuit pattern adjacent to the second copper foil pass through a third conductive adjacent to the second copper foil The materials are electrically connected to each other; and the first copper foil and the second copper foil are electrically etched by selective etching to obtain a 4N+4 layer wiring board.

A multi-layer circuit board is formed by the manufacturing method of the multi-layer circuit board as described above, wherein the multi-layer circuit board comprises a plurality of insulating layers, a multi-layer film layer and a plurality of layers of conductive circuit patterns, and opposite sides of each of the insulating layers are laminated a layer of the conductive circuit pattern, and the conductive circuit patterns on both sides of the insulating layer are electrically connected to each other through at least one conductive hole, and each layer of the film layer is bonded between the adjacent two layers of the conductive line patterns, and is filled therein The conductive material or the at least one blind via is electrically connected to the adjacent two conductive circuit patterns.

The multi-layer circuit board and the manufacturing method provided by the technical solution simultaneously manufacture a plurality of circuit substrates, and then form a film on both surfaces of a part of the circuit substrate by bonding, and form a through hole in the film and form a conductive material. Thus, as needed, a copper foil, a wiring substrate to which a film and a conductive material are bonded, and a film are stacked, thereby forming a multilayer wiring board by forming a blind via a single press. Since a plurality of circuit substrates can be simultaneously fabricated, the time for circuit board fabrication can be shortened. Since each circuit substrate is separately fabricated, the yield of the circuit board can be improved compared to the layer-by-layer stacking method in the prior art.

The multi-layer circuit board provided by the technical solution and the manufacturing method thereof will be further described in detail below with reference to the accompanying drawings and embodiments.

The method for fabricating the ten-layer circuit board provided by the first embodiment of the present technical solution includes the following steps:

In the first step, referring to Figure 1, four copper clad substrates 10 are provided. Each of the copper clad substrates 10 includes an insulating layer 11 and a first copper foil layer 12 and a second copper foil layer 13 bonded to opposite sides of the insulating layer 11.

The copper-clad substrate 10 may be a fiberglass-based copper-clad substrate, a paper-based copper-clad substrate, a composite copper-clad substrate, an alimentamide-based nonwoven fabric-based copper-clad substrate, or a synthetic fiber-based copper-clad substrate. Of course, two, three, five or more of the copper clad substrates 10 may be selected according to the needs of the number of circuit boards to be formed.

In the second step, referring to FIG. 2, at least one conductive hole 14 is formed on each of the copper-clad substrates 10, and each of the first copper foil layers 12 is formed into a first conductive line pattern 15 for each The two copper foil layers 13 are formed to form a second conductive wiring pattern 16, and the first conductive wiring pattern 15 and the second conductive wiring pattern 16 are electrically conducted to each other through the at least one conductive via 14 to obtain four first wiring substrates 110.

The conductive hole 14 can be formed by the following method: first, a through hole is formed on the copper clad substrate 10 by mechanical drilling, and the through hole sequentially penetrates the first copper foil layer 12 and the insulating layer 11 And the second copper foil layer 13 and performing desmear treatment on the through hole; then, plating a metal such as copper, silver or gold into the inside of the through hole by electroplating to obtain the conductive hole 14 . Preferably, copper is electroplated inside the through hole. More preferably, the through hole is completely filled by a plating hole filling process during electroplating. Of course, the metal may be plated before the hole wall of the through hole to form the conductive hole 14 , and then the resin may be filled in the through hole; or the through hole may be filled after the through hole is formed. A conductive paste that cures the conductive paste to form the conductive vias 14.

It is also understood by those skilled in the art that a blind hole may be formed on the copper clad substrate 10 by laser ablation, and the blind hole penetrates the first copper foil layer 12 and the insulating layer 11 and then The conductive hole 14 is obtained by filling the inside of the blind hole with a plating hole filling process, and the conductive hole 14 may be formed before the first copper foil layer 12 by using a copper opening window. The copper window is etched at a position, and then ablated on the insulating layer 11 by laser ablation to form a blind hole. Then, a plating hole is filled in the interior of the blind hole by a plating filling process, thereby obtaining The conductive hole 14.

The first conductive line pattern 15 and the second conductive line pattern 16 can be formed by an image transfer process and an etching process.

In this embodiment, the first conductive line pattern 15 and the second conductive line pattern 16 on the four first circuit substrates 110 are set according to the circuit board to be actually formed, and the first conductive in each of the copper-clad substrates 10 The line pattern 15 and the second conductive line pattern 16 may be the same or different.

In the third step, referring to FIG. 3, two of the four first circuit substrates 110 are formed into two second circuit substrates 130. Each of the manufacturing methods of the second circuit substrate 130 may include the following steps:

First, a first film 17 and a release film are stacked on the first conductive line pattern 15 of the first circuit substrate 110, and a second film is stacked on the second conductive line pattern 16 of the first circuit substrate 110. 18 and release film. Next, the first circuit substrate 110, the first film 17 and the second film 18 are pre-compressed to bond the first film 17, the first circuit substrate 110 and the second film 18 together. Then, the release film on both sides of the first circuit substrate 110 is removed.

Further, at least one first through hole 19 is formed in the first film 17, the first through hole 19 penetrating the first film 17, and a part of the first conductive line pattern 15 is from the first pass The bottom of the hole 19 is exposed, and at least one second through hole 20 is formed on the second film 18. The second through hole 20 penetrates the second film 18 and causes a portion of the second conductive line pattern 16 from the first The bottom of the two through holes 20 is exposed.

Finally, a first conductive material 21 is formed in the first through hole 19, and a second conductive material 22 is formed in the second through hole 20, so that the first conductive material 21 and the first conductive line The patterns 15 are electrically connected to each other, and the second conductive material 22 and the second conductive line pattern 16 are electrically connected to each other to obtain the second circuit substrate 130.

In this embodiment, the positions and the positions of the first through holes 19 and the second through holes 20 of the two second circuit substrates 130 are set according to actual circuit boards to be prepared, and the second circuit substrates 130 are The positions and the number of the first through holes 19 and the second through holes 20 may be the same or different.

In this embodiment, the first film 17 and the second film 18 are semi-cured films, which may be fiberglass cloth prepregs, paper-based prepregs, composite prepregs, linoleamide fiber nonwoven prepregs, synthetic fiber prepregs or Pure resin prepreg, etc.

The pre-compression is used to heat the first film 17 and the second film 18 to make the first film 17 and the second film 18 have a certain viscosity, thereby bonding with the first circuit substrate 110. Together. The pre-compression temperature, the pre-compression pressure and the pre-compression time of the first film 17 and the second film 18 are both smaller than the temperature required for the pressing of the first film 17 and the second film 18, The pressure required for pressing and the time required for pressing are such that the first film 17 and the second film 18 after pre-compression still retain their semi-curing properties. In this embodiment, the pre-compression temperature range of the first film 17 and the second film 18 is 60-110 ° C, the pre-compression time range is 10-60 seconds, and the pre-compression pressure range is 5 -15kg/cm2, corresponding to the first film 17 and the second film 18, the pressing temperature range is 180-250 ° C, the pressing time range is 60-120 minutes, and the pressing pressure range is 200-300 kg / Cm2. Preferably, the pre-compression temperature of the first film 17 and the second film 18 is 80 ° C, the pre-compression time is 30 seconds, the pre-compression pressure is 10 kg/cm 2 , and the pressing temperature is 210 ° C. The pressing time was 80 minutes, and the pressing pressure was 250 kg/cm2.

In this embodiment, the release film is a mylar, which is used to protect the first film 17 and the second film 18 to prevent the first film 17 and the second film from being pre-compressed. 18 is bonded to the object in contact with it (for example, a steel plate used for pre-compression or a press fixture) and cannot be separated. The release film may also be other release materials such as a polyethylene release film or a polypropylene release film.

In this embodiment, the first through hole 19 and the second through hole 20 are all formed by laser drilling. In addition, since the laser drilling process ablate the first film 17 by a high-energy laser to form a hole, some residue is generated during ablation, and therefore, preferably, after the laser drilling A through hole 19 is subjected to desmear treatment, and a plasma degumming treatment process or a chemical degumming process may be used in addition to the residue.

In this embodiment, the first conductive material 21 is filled in the first through hole 19 and the second conductive material 22 is filled in the second through hole 20 by printing the metal conductive paste. The metal conductive paste may be a conductive copper paste, a conductive silver paste, a conductive solder paste or the like, preferably a conductive copper paste. Specifically, first, the metal conductive paste is filled in the first through hole 19 and the second through hole 20 by screen printing; then, the conductive metal paste is baked to cure the conductive metal paste. A first conductive material 21 is formed in a through hole 19 and a second conductive material 22 is formed in the second through hole 20. The baking temperature of the conductive metal paste is lower than the curing temperature of the first film 17 and the second film 18, so that the semi-curing properties of the first film 17 and the second film 18 are not affected.

In addition, before the first film 17, the second film 18, and the release film are laminated, preferably, the first conductive line pattern 15 and the second conductive line pattern 16 may be subjected to surface roughening treatment, such as A browning process is performed to enhance the bonding force between the first film 17 and the first conductive line pattern 15 and the second film 18 and the second conductive line pattern 16.

Of course, a plurality of the second circuit substrates 130 may be fabricated according to the number of formed circuit board layers.

The fourth step, referring to FIG. 4, provides a first copper foil sheet 23, a second copper foil sheet 24, and a third film 25, and sequentially stacks the second copper foil sheet 24, one of the second circuit substrates 130, One of the remaining two first circuit substrates 110, the first circuit substrate 110, one of the second circuit substrates 130, and the other of the remaining two first circuit substrates 110, the first circuit substrate 110, A third film 25 and a second copper foil sheet 24 are formed to form a laminated substrate, and the laminated substrate is pressed at a time to obtain a ten-layer wiring substrate 140.

The stacked substrate can be formed by first stacking a second circuit substrate 130 and a first circuit substrate 110 to form a stacked unit having only two circuit substrates, thereby obtaining two stacked units; The third film 25 is superposed between the first copper foil piece 23 and the second copper foil piece 24; finally, two stacked units are stacked on the second copper foil piece 24 and the third film Between 25, and the first circuit substrate 110 in each stacked unit is closer to the third film 25 than the second circuit substrate 130 in the corresponding stacked unit, thereby obtaining the laminated substrate.

In the ten-layer circuit substrate 140, the first copper foil piece 23 and the second copper foil piece 24 are located on the outermost sides of the ten-layer circuit substrate 140, and the adjacent insulating layers 11 pass through A film 17 or a second film 18 is bonded together, and the adjacent insulating layer 11 and the second copper foil 24 are bonded together by the first film 17 or the second film 18, and the adjacent insulating layer 11 and the first The copper foil sheets 23 are bonded together by a third film 25. In the embodiment, the second copper foil 24 is directly bonded to the first film 17 of the second circuit substrate 130, and one of the first circuit substrates 110 is located adjacent to the two second circuit substrates 130. Between the two adjacent first circuit substrates 110, one of the first circuit substrate 110 and the first copper foil 23 are directly bonded to the third Both sides of the film 25.

When aligning and stacking the second copper foil sheet 24, the two second circuit substrates 130, the two first circuit substrates 110, the third film 25, and the first copper foil sheet 23, The precise alignment between the second circuit substrate 130 and the first circuit substrate 110 is ensured. In the actual operation, during the stacking process, the second circuit substrate 130 and the first circuit substrate 110 may be respectively provided with alignment holes, and the positioning pins corresponding to the alignment holes are used. With the alignment.

In this embodiment, since the opposite surfaces of each of the second circuit substrates 130 have a first film 17 and a second film 18, respectively, and the opposite surfaces of each of the first circuit substrates 110 are respectively A film 17, a second film 18 or a third film 25 are directly attached to each other. Since the semi-cured material is heated to have a certain fluidity, after the pressing process, each of the second circuit substrate 130 and the first circuit substrate 110 Each of the first conductive line pattern 15 and the second conductive line pattern 16 are respectively embedded in an insulating layer formed by each of the first film 17, the second film 18 and the third film 25, and the second copper foil 24 is The first film 17 of one of the second circuit substrates 130 is adhered, and the first copper foil 23 is adhered to the third film 25, so that the layers are tightly bonded.

In this embodiment, the third film 25 is also a semi-cured film, which may be a glass fiber prepreg, a paper-based prepreg, a composite prepreg, an linoleamide fiber nonwoven prepreg, a synthetic fiber prepreg or a pure resin prepreg. .

Each of the first copper foil piece 23 and the second copper foil piece 24 may be a rolled copper foil or an electrolytic copper foil.

In the fifth step, referring to FIG. 5-6, at least one blind hole 26 is formed on the ten-layer circuit substrate 140, so that the blind hole 26 penetrates the first copper foil piece 23 and the third film 25 And filling the at least one blind hole 26 with the third conductive material 27 such that the first copper foil piece 23 and the conductive circuit pattern adjacent thereto are electrically connected to each other through the third conductive material 27.

The blind hole 26 may be formed by a laser drilling process or a deep mechanical drilling process, and the blind hole 26 penetrates the first copper foil piece 23 and the third film 25 . This embodiment is described by taking a blind hole 26 formed by a laser drilling process as an example.

In the case of laser drilling, since the materials of the first copper foil 23 and the third film 25 are different, it is preferable to first penetrate the first copper foil 23 by using an ultraviolet laser beam, and then use carbon dioxide (CO). ₂ ) A laser beam penetrates the third film 25. Due to the poor ability of the carbon dioxide laser beam to ablate copper, it can only ablate copper foil with a thickness of less than 5μm. The ultraviolet laser beam has a strong ability to ablate copper, and the ultraviolet laser beam ablate the insulating material very slowly. The carbon dioxide laser beam ablate the insulating material at a relatively fast speed. Therefore, by using two kinds of laser beams, the blind hole 26 can be formed well, and the laser beam can be directly opposite to the third film 25. The attached conductive circuit pattern causes damage. In addition, since the laser drilling process ablate the first copper foil 23 and the third film 25 by a high-energy laser to form a blind hole, some abundance is generated during ablation, and the residue may affect subsequent processing. Quality, so the technical solution needs to perform desmear treatment on the blind hole 26 after laser drilling. In the embodiment, the residue formed during the laser drilling is removed by a plasma treatment process.

Of course, the first copper foil piece 23 may be first thinned to a thickness of 5 μm or less, and then the first copper foil piece 23 and the third film 25 may be directly penetrated by a carbon dioxide laser beam. . The blind hole 26 may be formed by opening a copper window, that is, a copper window penetrating the first copper foil 23 is formed by etching at a position where the first copper foil 23 needs to form the blind hole 26 The third film 25 corresponding to the copper window is penetrated through a carbon dioxide laser beam to form the blind hole 26. The number of blind holes 26 depends on the needs of the product.

In the embodiment, the third conductive material 27 is filled in the blind hole 26 by using a metal plating method, so that the first copper foil piece 23 and the conductive circuit pattern attached thereto pass through the third conductive material 27 The phase is electrically conductive, and the metal to be plated may be copper, silver, gold, or the like, and is copper in the embodiment.

Of course, the conductive paste may be filled in the blind via 26, and then the conductive paste is cured to form a third conductive material 27, so that the first copper foil 23 and the conductive trace pattern attached thereto pass through the conductive layer pattern. The third conductive material 27 is electrically conductive. In addition, the material of the third conductive material 27 may also be silver, gold or tin.

In the sixth step, referring to FIG. 7, the second copper foil piece 24 is formed into a third conductive line pattern 28, and the first copper foil piece 23 is formed into a fourth conductive line pattern 29.

The third conductive line pattern 28 and the fourth conductive line pattern 29 can be formed by an image transfer process and an etching process.

In the seventh step, referring to FIG. 8, a first solder resist layer 30 is formed on the surface of the third conductive trace pattern 28, and a second solder resist layer 31 is formed on the surface of the fourth conductive trace pattern 29 to obtain ten layers. Circuit board 100.

The first solder resist layer 30 and the second solder resist layer 31 can be formed by printing a solder resist ink. The first solder resist layer 30 serves to protect the third conductive trace pattern 28, and the second solder resist layer 31 serves to protect the fourth conductive trace pattern 29.

It can be understood that when the multilayer circuit board in the first embodiment of the present invention is layered or reduced, it is only necessary to increase or decrease the number of the stacked units in the laminated substrate, thereby obtaining 4N. +2 layer circuit board, wherein N is a natural number greater than or equal to 1, and the 4N+2 layer circuit board is manufactured by:

First, 2N copper-clad substrates 10 are provided, and each of the copper-clad substrates 10 includes an insulating layer 11 and a first copper foil layer 12 and a second copper foil layer 13 bonded to opposite sides of the insulating layer 11.

Next, the first copper foil layer 12 of each of the copper clad substrates 10 is formed into a first conductive line pattern 15, and the second copper foil layer 13 of each of the copper clad substrates 10 is formed into a second conductive line pattern. 16. The first conductive line pattern 15 and the second conductive line pattern 16 are electrically conducted to each other through at least one conductive via 14 to form 2N of the copper clad substrates 10 into 2N first circuit substrates 110.

The first film 17 is adhered to the surface of the first conductive circuit pattern 15 of the N first circuit substrates 110, and the second of the N first circuit substrates 110 after the first film 17 is bonded. The surface of the conductive circuit pattern 16 is attached to the second film 18, the first film 17 has at least one first through hole 19, and the second film 18 has at least one second through hole 20, and at least one of the first The first conductive material 21 is electrically connected to the adjacent first conductive line pattern 15 and the second conductive material 22 is filled in the at least one second through hole 20, The second conductive material 22 and the adjacent second conductive line patterns 16 are electrically connected to each other, thereby forming the N first circuit substrates 110 into N second circuit substrates 130.

Thereafter, a third film 25, a first copper foil sheet 23 and a second copper foil sheet 24 are provided, and the second copper foil sheet 24, the N second circuit substrates 130, and the remaining N are aligned and stacked. The first circuit substrate 110, the third film 25, and the first copper foil sheet 23 are formed to form a laminated substrate, and the stacked substrate is pressed at a time to form a 4N+2 layer wiring substrate. Wherein, when the stacked substrate is formed, a second circuit substrate 130 and a first circuit substrate 110 are stacked to form a stacked unit having only two circuit substrates, thereby obtaining N stacked units; and the third film 25 is Laminated between the first copper foil sheet 23 and the second copper foil sheet 24; stacking N stacked units between the second copper foil sheet 24 and the third film 25, and each The first circuit substrate 110 in the stacking unit is closer to the third film 25 than the second circuit substrate 130 in the corresponding stacked unit, thereby obtaining the laminated substrate. In the 4N+2 layer circuit substrate, the adjacent insulating layers 11 are bonded together by the first film 17 or the second film 18, and the adjacent insulating layer 11 and the first copper foil 23 pass the third. The film 25 is bonded together, and the adjacent insulating layer 11 and the second copper foil 24 are bonded together by the first film 17 or the second film 18, and the first copper foil 23 and the second copper foil are bonded together. 24 is located on the outermost sides of the 4N+2 layer circuit substrate.

Thereafter, at least one blind hole 26 is formed on the 4N+2 layer circuit substrate, so that the blind hole 26 penetrates the first copper foil piece 23 and the third film 25, and is at least one blind The hole 26 is filled with a third conductive material 27 such that the first copper foil piece 23 and the conductive line pattern attached thereto are electrically conducted through the third conductive material 27.

Finally, the first copper foil piece 23 and the second copper foil piece 24 are formed into a conductive wiring pattern by selective etching, thereby obtaining a 4N+2 layer wiring board.

In addition, the composition and the overlapping manner of the laminated substrate provided by the first embodiment of the present invention can also be adjusted. For example, the second copper foil 24 in the laminated substrate of the first embodiment of the present invention can be replaced by a first The second circuit substrate 130 of the laminated substrate of the first embodiment of the present invention may be replaced by a second circuit substrate 25, which may be referred to as the following second The method of the third embodiment is carried out:

Second Embodiment: This embodiment is for forming a 4N+3 layer circuit board, and N is a natural number greater than or equal to 1. The method of this embodiment is specifically:

First, 2N+1 copper-clad substrates 10 are provided, each of the copper-clad substrates 10 including an insulating layer 11 and a first copper foil layer 12 and a second copper foil layer 13 attached to opposite sides of the insulating layer 11. .

Next, the first copper foil layer 12 of each of the copper clad substrates 10 is formed into a first conductive line pattern 15, and the second copper foil layer 13 of each of the copper clad substrates 10 is formed into a second conductive line pattern. 16. The first conductive line pattern 15 and the second conductive line pattern 16 are electrically connected to each other through at least one conductive via 14 to form 2N+1 the copper clad substrates 10 into 2N+1 first circuit substrates. 110.

The first film 17 is adhered to the surface of the first conductive circuit pattern 15 of the N first circuit substrates 110, and the surface of the second conductive circuit pattern 16 of the N first circuit substrates 110 is attached to the surface. a second film 18 having at least one first through hole 19, the second film 18 having at least one second through hole 20, and filling the at least one first through hole 19 with a first conductive The first conductive material 21 is electrically connected to the adjacent first conductive line pattern 15 , and the second conductive material 22 is filled in the at least one second through hole 20 , and the second conductive material 22 is The adjacent second conductive line patterns 16 are electrically conducted to each other, thereby forming the N first circuit substrates 110 into N second circuit substrates 130.

Thereafter, a first copper foil piece 23 and a third film 25 are provided, and the N second circuit substrates 130, the remaining N+1 first circuit substrates 110, the third film 25, and the A copper foil piece 23 is formed to form a laminated substrate, and the stacked substrate is pressed at a time to form a 4N+3 layer wiring substrate. In the 4N+3 layer circuit substrate, the adjacent insulating layers 11 are bonded together by the first film 17 or the second film 18, and the adjacent insulating layer 11 and the first copper foil 23 pass the third. The film 25 is bonded together, and the first copper foil piece 23 and one of the first circuit substrates 110 are located on the outermost sides of the 4N+3 layer circuit substrate. The stacked substrate can be formed by: firstly, a second circuit substrate 130 and a first circuit substrate 110 are stacked to form a stacked unit having only two circuit substrates, thereby obtaining N stacked units; secondly, The third film 25 is superposed between the first copper foil piece 23 and the remaining one of the first circuit substrates 110; finally, N stacked units are stacked on the remaining one of the first circuit substrates 110 and Between the third film 25, the second circuit substrate 130 in each stacked unit is closer to the remaining one of the first circuit substrates 110 than the first circuit substrate 110 in the corresponding stacked unit, thereby obtaining the Stack the substrate.

Thereafter, at least one blind hole is formed on the 4N+3 layer circuit substrate, and the at least one blind hole penetrates the first copper foil piece 23 and the third film 25, and is in the at least one blind hole The third conductive material is filled in such a manner that the first copper foil piece 23 and the conductive circuit pattern adjacent thereto are electrically conducted to each other through the third conductive material adjacent to the first copper foil piece 23.

Finally, the first copper foil piece 23 is formed into a conductive wiring pattern via selective etching, thereby obtaining a 4N+3-layer wiring board.

When layering or subtracting the multilayer circuit board in this embodiment, it is only necessary to increase or decrease the number of the stacked units in the laminated substrate.

Referring to FIG. 9, the circuit board in the present embodiment will be described below by taking the structure of the eleven-layer circuit substrate 200 obtained by the second embodiment as an example of N=2. The eleven-layer circuit substrate 200 is formed by aligning and stacking three first circuit substrates 110, two second circuit substrates 130, a third film 25, and a first copper foil sheet 23 into a stacked substrate, and once. Formed after pressing the laminated substrate. In the eleven-layer circuit substrate 200, a first circuit substrate 110 and a first copper foil 23 are located on the outermost sides of the eleven-layer circuit substrate 200, and the adjacent insulating layers 11 pass the first The film 17 or the second film 18 is bonded together, and the adjacent insulating layer 11 and the first copper foil 23 are bonded together by the third film 25. Specifically, the stacked substrate of the eleven-layer circuit substrate 200 can be formed by first stacking a second circuit substrate 130 and a first circuit substrate 110 to form a stacked unit having only two circuit substrates. Thereby obtaining two stacking units; the first copper foil piece 23 and the remaining one of the first circuit substrates 110 are located on the outermost sides of the laminated substrate, and the third film 25 is superposed on the first a copper foil 23 is interposed between the remaining one of the first circuit substrates 110; two stacked units are sequentially stacked between the remaining one of the first circuit substrate 110 and the third film 25, and each The second circuit substrate 130 of each of the stacked units is closer to the remaining one of the first circuit substrates 110 than the first one of the corresponding ones of the stacked units, thereby obtaining the laminated substrate.

Third Embodiment: This embodiment is for forming a 4N+4 layer circuit board, and N is a natural number greater than or equal to 1. The method of this embodiment is specifically:

First, 2N+1 copper-clad substrates 10 are provided, each of the copper-clad substrates 10 including an insulating layer 11 and a first copper foil layer 12 and a second copper foil layer 13 attached to opposite sides of the insulating layer 11. .

Next, the first copper foil layer 12 of each of the copper clad substrates 10 is formed into a first conductive line pattern 15, and the second copper foil layer 13 of each of the copper clad substrates 10 is formed into a second conductive line pattern. 16. The first conductive line pattern 15 and the second conductive line pattern 16 are electrically connected to each other through at least one conductive via 14 to form 2N+1 the copper clad substrates 10 into 2N+1 first circuit substrates. 110.

The first film 17 is adhered to the surface of the first conductive circuit pattern 15 of the N first circuit substrates 110, and the surface of the second conductive circuit pattern 16 of the N first circuit substrates 110 is attached to the surface. a second film 18 having at least one first through hole 19, the second film 18 having at least one second through hole 20, and filling the at least one first through hole 19 with a first conductive The first conductive material 21 is electrically connected to the adjacent first conductive line pattern 15 , and the second conductive material 22 is filled in the at least one second through hole 20 , and the second conductive material 22 is The adjacent second conductive line patterns 16 are electrically conducted to each other, thereby forming the N first circuit substrates 110 into N second circuit substrates 130.

Thereafter, a first copper foil piece 23, a second copper foil piece 24, a third film 25, and a fourth film 32 are provided, and N of the second circuit substrates 130 are aligned and stacked, and the remaining N+1 of the first a circuit substrate 110, the third film 25, the fourth film 32, the first copper foil piece 23 and the second copper foil piece 24 to form a laminated substrate, and the stacked substrate is pressed at a time to form a 4N +4 layer circuit board. In the 4N+4 layer circuit substrate, the adjacent insulating layers 11 are bonded together by the first film 17 or the second film 18, and the adjacent insulating layer 11 and the first copper foil 23 pass the The third film 25 is bonded together, and the adjacent insulating layer 11 and the second copper foil 24 are bonded together by the fourth film 32, and the first copper foil 23 and the second copper foil 24 are bonded together. Located on the outermost sides of the 4N+4 layer circuit substrate. The stacked substrate can be formed by: firstly, a second circuit substrate 130 and a first circuit substrate 110 are stacked to form a stacked unit having only two circuit substrates, thereby obtaining N stacked units; secondly, The third film 25 and the fourth film 32 are sequentially laminated between the first copper foil piece 23 and the second copper foil piece 24, so that the third film 25 is attached to the first copper foil piece 23; And stacking the remaining one of the first circuit substrates 110 between the third film 25 and the fourth film 32; finally, stacking the N stacked cells on the remaining one of the first circuit substrates 110 and the first Between the four films 32, and the second circuit substrate 130 in each stacked unit is closer to the remaining one of the first circuit substrates 110 than the first one of the corresponding stacked units 110, thereby obtaining the superposition Substrate.

Thereafter, at least one first blind hole and at least one second blind hole are respectively formed on two sides of the 4N+4 layer circuit substrate, and at least one first blind hole penetrates the first copper foil piece 23 and The third film 25 to which the first copper foil 23 is attached, at least one second blind hole penetrating the second copper foil 24 and the fourth film attached to the second copper foil 24 32, and filling a third conductive material in each of the blind holes, so that the first copper foil 23 and the conductive circuit pattern adjacent thereto pass through the third conductive material adjacent to the first copper foil 23 Electrically conducting, the second copper foil sheet 24 and the conductive circuit pattern adjacent thereto are electrically connected to each other through the third conductive material adjacent to the second copper foil sheet 24; finally, the first copper foil sheet is 23 and the second copper foil sheet 24 are formed into a conductive wiring pattern by selective etching, thereby obtaining a 4N+4 layer wiring board.

When layering or subtracting the multilayer circuit board in this embodiment, it is only necessary to increase or decrease the number of the stacked units in the laminated substrate.

Referring to FIG. 10, the circuit board in this embodiment will be described below by taking the structure of the twelve-layer circuit substrate 220 obtained by the third embodiment as an example of N=2. The twelve-layer circuit substrate 220 passes three first circuit substrates 110, two second circuit substrates 130, a third film 25, a fourth film 32, a first copper foil 23, and a second copper foil. 24 is aligned and stacked to form a laminated substrate, and formed by pressing the laminated substrate once. In the twelve-layer circuit substrate 220, the first copper foil piece 23 and the second copper foil piece 24 are located on the outermost sides of the twelve-layer circuit substrate 220, and the adjacent insulating layer 11 and the first copper foil piece The third film 25 is bonded together by the third film 25, and the adjacent insulating layer 11 and the second copper foil piece 24 are bonded together by the fourth film 32. Specifically, the stacked substrate of the twelve-layer circuit substrate 220 can be formed by: firstly, a second circuit substrate 130 and a first circuit substrate 110 are stacked to form a stacked unit having only two circuit substrates, thereby N stacking units are obtained; secondly, the third film 25 and the fourth film 32 are sequentially laminated between the first copper foil sheet 23 and the second copper foil sheet 24, so that the third film 25 is The first copper foil sheet 23 is attached; then, the remaining one of the first circuit substrates 110 is superposed between the third film 25 and the fourth film 32; finally, the N stacked units are stacked on the remaining one. Between the first circuit substrate 110 and the fourth film 32, and the second circuit substrate 130 in each of the stacked units is closer to the remaining one of the first circuit substrates 110 in the corresponding stacked unit. The wiring substrate 110 is obtained to obtain the laminated substrate.

It can be understood that the laminated substrates formed by the second to third embodiments described above may be exposed to both sides after being pressed and formed into a conductive pattern (if any). The step of forming a solder resist layer on the surface of the conductive line pattern.

Of course, it is not limited to the arrangement of the first to third embodiments described above.

The multi-layer circuit board manufacturing method provided by the technical solution simultaneously manufactures a plurality of circuit substrates, and then forms a film on two surfaces of a part of the circuit substrate by bonding, and forms a through hole in the film and forms a conductive material. Thus, as needed, the copper foil, the wiring substrate to which the film and the conductive material are bonded, and the film are stacked, so that the multilayer wiring board can be obtained by one press-fitting. Since a plurality of circuit substrates can be simultaneously fabricated, the time for circuit board fabrication can be shortened. Since each circuit substrate is separately fabricated, the yield of the circuit board can be improved compared to the layer-by-layer stacking method in the prior art.

However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

10. . . Copper clad substrate

11. . . Insulation

12. . . First copper foil layer

13. . . Second copper foil layer

14. . . Conductive hole

15. . . First conductive line pattern

16. . . Second conductive line pattern

110. . . First circuit substrate

17. . . First film

18. . . Second film

19. . . First through hole

20. . . Second through hole

twenty one. . . First conductive material

twenty two. . . Second conductive material

130. . . Second circuit substrate

twenty three. . . First copper foil

twenty four. . . Second copper foil

25. . . Third film

32. . . Fourth film

140. . . Ten-layer circuit substrate

26. . . Blind hole

27. . . Third conductive material

28. . . Third conductive line pattern

29. . . Fourth conductive line pattern

30. . . First solder mask

31. . . Second solder mask

100. . . Ten-layer circuit board

200. . . Eleven-layer circuit substrate

220. . . Twelve-layer circuit substrate

1 is a schematic cross-sectional view of a copper clad substrate provided by a first embodiment of the present technical solution.

2 is a schematic cross-sectional view showing a first circuit substrate formed by forming a conductive hole, a first conductive line pattern, and a second conductive line pattern on the copper-clad substrate of FIG. 1 according to the first embodiment of the present invention.

FIG. 3 is a schematic cross-sectional view showing a second circuit substrate according to the first embodiment of the present technical solution.

4 is a first embodiment of the present invention for pressing a first copper foil, a second circuit substrate, a first circuit substrate, another second circuit substrate, another first circuit substrate, and a first A schematic cross-sectional view of a ten-layer circuit substrate formed after three films and a second copper foil.

FIG. 5 is a cross-sectional view showing the first embodiment of the present invention after forming a blind via hole penetrating the first copper foil and the third film on the ten-layer circuit substrate.

FIG. 6 is a schematic cross-sectional view showing the filling of a conductive material in a blind via formed on a ten-layer circuit substrate according to the first embodiment of the present invention.

FIG. 7 is a cross-sectional view showing the first copper foil sheet of FIG. 6 formed into a third conductive line pattern and the second copper foil sheet being formed into a fourth conductive line pattern according to the first embodiment of the present technical solution.

8 is a ten-layer line formed by forming a first solder resist layer on the third conductive trace pattern in FIG. 7 and forming a second solder resist layer on the fourth conductive trace pattern in the first embodiment of the present technical solution. Schematic diagram of the board.

FIG. 9 is a schematic structural view of an eleven-layer circuit substrate obtained by the second embodiment when N=2 provided by the technical solution.

FIG. 10 is a schematic structural view of a twelve-layer circuit substrate obtained by the third embodiment when N=2 provided by the technical solution.

110. . . First circuit substrate

130. . . Second circuit substrate

25. . . Third film

26. . . Blind hole

27. . . Third conductive material

28. . . Third conductive line pattern

29. . . Fourth conductive line pattern

Claims (13)

A method for manufacturing a multilayer circuit board, comprising the steps of:
Providing 2N copper-clad substrates, wherein N is a natural number greater than or equal to 1, each of the copper-clad substrates includes an insulating layer and a first copper foil layer and a second copper attached to opposite sides of the insulating layer Foil layer
Forming a first conductive line pattern on the first copper foil layer of each of the copper-clad substrates, and forming a second conductive line pattern on each of the copper-clad substrates, thereby forming 2N Making a 2N first circuit substrate by using a copper clad substrate;
N first first circuit substrates are taken from the 2N first circuit substrates, and the first conductive film pattern surface of each of the N first circuit substrates is bonded to the first film. a second conductive line pattern surface of each of the first circuit substrates is attached to the second film, the first film has at least one first through hole, and the second film has at least one a second via hole, and filling the at least one first via hole with a first conductive material, wherein the first conductive material and the adjacent first conductive line pattern are electrically connected to each other, and the at least one second through hole is Filling a second conductive material, the second conductive material and the adjacent second conductive line pattern are electrically connected to each other, thereby forming N first circuit substrates into N second circuit substrates;
Providing a third film, a first copper foil and a second copper foil, and pressing the second copper foil, the N second circuit substrates, and the remaining N first circuit substrates, a third film and the first copper foil to form a 4N+2 layer circuit substrate. In the 4N+2 layer circuit substrate, adjacent insulating layers are bonded together by a first film or a second film. The adjacent insulating layer and the first copper foil are bonded together through the third film, and the adjacent insulating layer and the second copper foil are bonded together by the first film or the second film, and the first a copper foil piece and a second copper foil piece are located on outermost sides of the 4N+2 layer circuit substrate;
Forming at least one blind hole on the 4N+2 layer circuit substrate, the at least one blind hole penetrating the first copper foil piece and the third film, and filling the third at least one blind hole a conductive material, the first copper foil and a conductive circuit pattern adjacent thereto are electrically connected to each other through the third conductive material; and the first copper foil and the second copper foil are selectively etched A conductive line pattern is obtained to obtain a 4N+2 layer circuit board. The method for fabricating a multilayer circuit board according to claim 1, wherein the first copper foil layer of each of the copper-clad substrates is formed into a first conductive line pattern, and the second copper-clad substrate is second. When the copper foil layer is formed to form the second conductive line pattern, at least one conductive hole is formed in the copper clad substrate, so that the first conductive line pattern and the second conductive line pattern are electrically connected to each other through the at least one conductive hole. The method for fabricating a multilayer circuit board according to claim 1, wherein the second copper foil, the N second circuit substrates, and the remaining N first circuit substrates and third films are pressed together And aligning and stacking the second copper foil, the N of the second circuit substrates, and the remaining N of the first circuit substrates, and the first copper foil to form a 4N+2 layer circuit substrate a three-film and the first copper foil to form a laminated substrate, and the method for forming the laminated substrate comprises the steps of:
Stacking a second circuit substrate and a first circuit substrate to form a stacking unit having only two circuit substrates, thereby obtaining N stacked units;
Laminating the third film between the first copper foil sheet and the second copper foil sheet; and stacking N stacked units between the second copper foil sheet and the third film, and The first circuit substrate in each of the stacked units is brought closer to the third film than the second one of the corresponding stacked units, thereby obtaining the laminated substrate. The method for fabricating a multilayer circuit board according to claim 1, wherein the forming the N first circuit substrates into the N second circuit substrates comprises the steps of:
And sequentially bonding the first film and a release film on each of the N first circuit substrates, and each of the N first circuit substrates The graphic surface is attached to the second film and the other release film;
Pre-compressing the first circuit substrate, the first film, the second film and the two release films to bond the first film and the second film to both sides of the first circuit substrate;
Removing the two release films;
Forming the at least one first via hole in the first film by a laser drilling process, a portion of the first conductive trace pattern being exposed from the at least one first via hole, by the laser drilling process Forming the at least one second via hole in the second film, a portion of the second conductive trace pattern is exposed from the at least one second via hole; and forming the conductive paste into the at least one first via hole The first conductive material forms a second conductive material in the at least one second via hole by printing a conductive paste. A method for manufacturing a multilayer circuit board, comprising the steps of:
Providing 2N+1 copper-clad substrates, wherein N is a natural number greater than or equal to 1, each of the copper-clad substrates includes an insulating layer and a first copper foil layer attached to opposite sides of the insulating layer and Two copper foil layers;
Forming a first conductive line pattern on the first copper foil layer of each of the copper-clad substrates, and forming a second conductive line pattern on the second copper foil layer of each of the copper-clad substrates, thereby 2N+1 The copper-clad substrate is made into 2N+1 first circuit substrates;
N first first circuit substrates are taken from the 2N+1 first circuit substrates, and the first conductive film pattern surface of each of the N first circuit substrates is attached to the first film. Forming a second film on a surface of the second conductive line pattern of each of the N first circuit substrates, the first film having at least one first through hole, the second film having at least a second via hole, and filling the at least one first via hole with a first conductive material, wherein the first conductive material and the adjacent first conductive line pattern are electrically connected to each other, and the at least one second pass The hole is filled with a second conductive material, and the second conductive material and the adjacent second conductive line pattern are electrically connected to each other, thereby forming N first circuit substrates into N second circuit substrates;
Providing a third film and a first copper foil, and pressing the first copper foil, the N second circuit substrates, and the remaining N+1 of the first circuit substrate and the third film at a time to form 4N+3 layer circuit substrate, in the 4N+3 layer circuit substrate, adjacent insulating layers are bonded together by the first film or the second film, and between the adjacent insulating layer and the first copper foil Bonding together through the third film, and the first copper foil and one of the first circuit substrates are located on the outermost sides of the 4N+3 layer circuit substrate;
Forming at least one blind hole on the 4N+3 layer circuit substrate, the at least one blind hole penetrating the first copper foil piece and the third film, and filling the third at least one blind hole a conductive material, the first copper foil and a conductive circuit pattern adjacent thereto are electrically connected to each other through the third conductive material; and the first copper foil is electrically etched by selective etching, thereby Get a 4N+3 layer board. The method of fabricating a multilayer circuit board according to claim 5, wherein the first copper foil layer of each of the copper-clad substrates is formed into a first conductive line pattern, and the second copper-clad board is second. When the copper foil layer is formed to form the second conductive line pattern, at least one conductive hole is formed in the copper clad substrate, so that the first conductive line pattern and the second conductive line pattern are electrically connected to each other through the at least one conductive hole. The method of fabricating a multilayer circuit board according to claim 5, wherein the first copper foil, the N second circuit substrates, and the remaining N+1 of the first circuit substrates and the first Before forming the 4N+3 layer circuit substrate, aligning and stacking the first copper foil, the N second circuit substrates, and the remaining N+1 of the first circuit substrate and the third film to form The laminated substrate, the method for forming the laminated substrate comprises the steps of:
Stacking a second circuit substrate and a first circuit substrate to form a stacking unit having only two circuit substrates, thereby obtaining N stacked units;
Laminating the third film between the first copper foil and the remaining one of the first circuit substrates; and stacking N stacked units on the third film and the remaining one Between the circuit substrates, and the second circuit substrate in each of the stacked units is closer to the remaining one of the first circuit substrates than the first one of the corresponding stacked units, thereby obtaining the stacked substrate. The method for fabricating a multilayer circuit board according to claim 5, wherein the forming the N first circuit substrates into the N second circuit substrates comprises the steps of:
And sequentially bonding the first film and a release film on each of the N first circuit substrates, and each of the N first circuit substrates The graphic surface is attached to the second film and the other release film;
Pre-compressing the first circuit substrate, the first film, the second film and the two release films to bond the first film and the second film to both sides of the first circuit substrate;
Removing the two release films;
Forming the at least one first via hole in the first film by a laser drilling process, a portion of the first conductive trace pattern being exposed from the at least one first via hole, by the laser drilling process Forming the at least one second via hole in the second film, a portion of the second conductive trace pattern is exposed from the at least one second via hole; and forming the conductive paste into the at least one first via hole The first conductive material forms a second conductive material in the at least one second via hole by printing a conductive paste. A method for manufacturing a multilayer circuit board, comprising the steps of:
Providing 2N+1 copper-clad substrates, wherein N is a natural number greater than or equal to 1, each of the copper-clad substrates includes an insulating layer and a first copper foil layer attached to opposite sides of the insulating layer and Two copper foil layers;
Forming a first conductive line pattern on the first copper foil layer of each of the copper-clad substrates, and forming a second conductive line pattern on the second copper foil layer of each of the copper-clad substrates, thereby 2N+1 The copper-clad substrate is made into 2N+1 first circuit substrates;
N first first circuit substrates are taken from the 2N+1 first circuit substrates, and the first conductive film pattern surface of each of the N first circuit substrates is attached to the first film. Forming a second film on a surface of the second conductive line pattern of each of the N first circuit substrates, the first film having at least one first through hole, the second film having at least a second via hole, and filling the at least one first via hole with a first conductive material, wherein the first conductive material and the adjacent first conductive line pattern are electrically connected to each other, and the at least one second pass The hole is filled with a second conductive material, and the second conductive material and the adjacent second conductive line pattern are electrically connected to each other, thereby forming N first circuit substrates into N second circuit substrates;
Providing a third film, a fourth film, a first copper foil and a second copper foil, and pressing the second copper foil, the N second circuit substrates, and the remaining N+1 a first circuit substrate, a third film, a fourth film, and the first copper foil to form a 4N+4 layer circuit substrate. In the 4N+4 layer circuit board, the first insulating layer passes through the first The film or the second film is bonded together, and the adjacent insulating layer and the first copper foil are bonded together by the third film, and the adjacent insulating layer and the second copper foil are bonded together by the fourth film. And the first copper foil piece and the second copper foil piece are located on the outermost sides of the 4N+4 layer circuit substrate;
Forming at least one first blind hole and at least one second blind hole on the two sides of the 4N+4 layer circuit substrate, the at least one first blind hole penetrating the first copper foil and the first a third foil that is attached to the third film, the at least one second blind hole penetrating the second copper foil and the fourth film attached to the second copper foil, and Filling a third conductive material in each blind hole such that the first copper foil and the conductive circuit pattern adjacent to the first copper foil pass through the third conductive material adjacent to the first copper foil Electrically conducting, the second copper foil and the conductive circuit pattern adjacent to the second copper foil are electrically connected to each other through a third conductive material adjacent to the second copper foil; and The copper foil piece and the second copper foil piece are electrically conductively patterned by selective etching to obtain a 4N+4 layer wiring board. The method for fabricating a multilayer circuit board according to claim 9, wherein the first copper foil layer of each of the copper-clad substrates is formed into a first conductive line pattern, and the second copper-clad substrate is second. When the copper foil layer is formed to form the second conductive line pattern, at least one conductive hole is formed in the copper clad substrate, so that the first conductive line pattern and the second conductive line pattern are electrically connected to each other through the at least one conductive hole. The method of manufacturing a multilayer circuit board according to claim 9, wherein the second copper foil, the N second circuit substrates, and the remaining N+1 of the first circuit substrates are laminated Before the third film, the fourth film and the first copper foil are formed to form a 4N+4 layer circuit substrate, the second copper foil, the N second circuit substrates, and the remaining N+1 the first circuit substrate, the third film, the fourth film and the first copper foil to form a laminated substrate, and the method for forming the laminated substrate comprises the steps of:
Stacking a second circuit substrate and a first circuit substrate to form a stacking unit having only two circuit substrates, thereby obtaining N stacked units;
And the third film and the fourth film are sequentially laminated between the first copper foil and the second copper foil, so that the third film is attached to the first copper foil ;
Laminating a remaining one of the first circuit substrates between the third film and the fourth film; and stacking N stacked units between the remaining one of the first circuit substrate and the fourth film And causing the second circuit substrate in each of the stacked units to be closer to the remaining one of the first circuit substrates than the first one of the corresponding stacked units, thereby obtaining the stacked substrate. The method for fabricating a multilayer circuit board according to claim 9, wherein the forming the N first circuit substrates into the N second circuit substrates comprises the steps of:
And sequentially bonding the first film and a release film on each of the N first circuit substrates, and each of the N first circuit substrates The graphic surface is attached to the second film and the other release film;
Pre-compressing the first circuit substrate, the first film, the second film and the two release films to bond the first film and the second film to both sides of the first circuit substrate;
Removing the two release films;
Forming the at least one first via hole in the first film by a laser drilling process, a portion of the first conductive trace pattern being exposed from the at least one first via hole, by the laser drilling process Forming the at least one second via hole in the second film, a portion of the second conductive trace pattern is exposed from the at least one second via hole; and forming the conductive paste into the at least one first via hole The first conductive material forms a second conductive material in the at least one second via hole by printing a conductive paste. A multi-layer wiring board comprising the method of fabricating the multilayer wiring board according to any one of claims 1 to 12, wherein the multilayer wiring board comprises a plurality of layers of insulating layers, a plurality of layers of film layers, and a plurality of layers The conductive circuit pattern has a conductive circuit pattern adhered on opposite sides of each insulating layer, and the conductive circuit patterns on both sides of the insulating layer are electrically connected to each other through at least one conductive hole, and each layer of the film is bonded to the adjacent layer. The two adjacent conductive layer patterns are electrically connected between the two conductive circuit patterns and through the conductive material filled therein or the at least one blind via.