TW201401960A - Method for manufacturing multilayer printed circuit board - Google Patents

Abstract

A method for manufacturing a multilayer circuit board includes steps below. Firstly, a plurality of double-sided copper clad laminates are provided. Secondly, a first trace layer and a second trace layer are formed from copper layers of the copper clad laminate, so as to obtain a plurality of circuit substrates. At least one first trace layer includes an exposed portion. Thirdly, a protective adhesive sheet is attached on the exposed portion. Fourthly, a first adhesive sheet is attached on the first trace layer of some circuit substrates; a second adhesive sheet is attached on the second trace layer of said some circuit substrates. A first through hole is defined in the first adhesive sheet, and a first conductive material is filled in the first through hole.. A second through hole is defined in the second adhesive sheet, and a second conductive material is filled in the second through hole. As such, some connecting substrates are obtained. Fifthly, the other circuit substrates and the connecting substrates are stacked alternatively to obtain a multilayer substrate. Sixthly, a slit along a boundary of the exposed portion is defined in the multilayer substrate, and a portion of the multilayer substrate above the exposed portion is removed, then a multilayer circuit board with a cavity is obtained.

Description

Multilayer circuit board manufacturing method

The present invention relates to the field of circuit board manufacturing, and in particular to a method for fabricating a multilayer circuit board.

Printed circuit boards have been widely used due to their high assembly density. For application of the board, please refer to the literature Takahashi, A. Ooki, N. Nagai, A. Akahoshi, H. Mukoh, A. Wajima, M. Res. Lab, High density multilayer printed circuit board for HITAC M-880, IEEE Trans On Components, Packaging, and Manufacturing Technology, 1992, 15(4): 1418-1425.

In the fabrication process of a multi-layer circuit board having a groove, it is usually fabricated from the inner substrate of the circuit board, and a glue layer and a conductive layer are laminated on both sides of the inner substrate to obtain a multilayer circuit board. Then, a slot is formed in the multilayer circuit board to obtain a multilayer circuit board having grooves. However, a multilayer circuit board manufactured in such a manner needs to be fabricated from the inner layer to the outer layer, and the production process is long. Moreover, every time a layer is added, there is a defect in fabrication. Therefore, when the entire circuit board is completed, the probability of poor board fabrication is high, resulting in a low yield of the board.

In view of the above, it is necessary to provide a method for fabricating a multilayer circuit board in order to improve the efficiency of circuit board fabrication and improve the yield of circuit board fabrication.

A method for manufacturing a multilayer circuit board, comprising the steps of: providing 2N+1 copper foil substrates, each of the copper foil substrates comprising a first copper foil layer, a first insulating layer and a second copper foil layer stacked in sequence, wherein N is a natural number greater than or equal to 1; the first copper foil layer of each copper foil substrate is formed into a first conductive wiring layer, and the second copper foil layer is formed into a second conductive wiring layer, thereby 2N+1 copper The foil substrate is formed to form 2N+1 circuit substrates, wherein the first conductive circuit layer of the at least one circuit substrate comprises an exposed area and a nip area surrounding the exposed area; a protective film is disposed on the exposed area; and 2N+ is selected N circuit substrates in one circuit substrate, a first film is attached to a surface of the first conductive circuit layer of each of the N circuit substrates, the first film has a first through hole, and the N circuit substrates The second conductive circuit layer surface of each of the second conductive circuit layers is attached to the second film, the second film has a second through hole, and the first conductive hole is filled with the first conductive material in the second through hole. Filling a second conductive material, the first conductive material and the first The electrical circuit layers are electrically connected to each other, and the second conductive material and the second conductive circuit layer are electrically connected to each other, thereby forming the N circuit substrates into N connection substrates; stacking the N connection substrates and N+1 circuits The substrate is such that each of the connection substrates is located between the two circuit substrates, and there is only one connection substrate between the adjacent two circuit substrates, and the at least one first conductive circuit layer having the exposed regions is in contact with the film connecting the substrates And pressing the N connection substrates and the N+1 circuit substrates at a time to obtain a multilayer substrate; and cutting the multilayer substrate from the surface of the multilayer substrate along the boundary between the exposed region and the nip region on one side of the multilayer substrate until cutting To the protective film, forming an annular slit, and removing the portion of the multilayer substrate surrounded by the slit and the protective film to form a groove, the exposed region being exposed in the groove, thereby obtaining a 4N+2 layer circuit board .

A manufacturing method of a multilayer circuit board, comprising the steps of: providing 2N-1 copper foil substrates, each of the copper foil substrates comprising a first copper foil layer, a first insulating layer and a second copper foil layer stacked in sequence, wherein N is a natural number greater than or equal to 2; the first copper foil layer of each copper foil substrate is formed into a first conductive wiring layer, and the second copper foil layer is formed into a second conductive wiring layer, thereby 2N-1 copper The foil substrate is formed to form 2N-1 circuit substrates, wherein the first conductive circuit layer of the at least one circuit substrate comprises an exposed area and a nip area surrounding the exposed area; a protective film is disposed on the exposed area; and 2N- is selected N circuit substrates in one circuit substrate, a first film is attached to a surface of the first conductive circuit layer of each of the N circuit substrates, the first film has a first through hole, and the N circuit substrates The second conductive circuit layer surface of each of the second conductive circuit layers is attached to the second film, the second film has a second through hole, and the first conductive hole is filled with the first conductive material in the second through hole. Filling a second conductive material, the first conductive material and the first The electrical circuit layers are electrically connected to each other, and the second conductive material and the second conductive circuit layer are electrically connected to each other, thereby forming the N circuit substrates into N connection substrates; providing a first copper foil and a second copper foil, Stacking the N connection substrates and the N-1 circuit substrates between the first copper foil and the second copper foil such that each connection substrate is located between the two circuit substrates, and only between the adjacent two circuit substrates Having a connecting substrate, and pressing the first copper foil, the N connecting substrates, and the N-1 circuit substrates and the second copper foil at a time; forming the first copper foil to form a third conductive circuit layer, and the second copper Forming a fourth conductive wiring layer to obtain a multilayer substrate; and cutting the multilayer substrate from the surface of the multilayer substrate along the boundary between the exposed region and the nip region on one side of the multilayer substrate until cutting to the protective film to form an annular slit, And removing the portion of the multilayer substrate surrounded by the slit and the protective film to form a groove, the exposed region being exposed in the groove, thereby obtaining a 4N layer circuit board.

Compared with the prior art, the present invention provides a method for manufacturing a multi-layer circuit board having a groove, simultaneously fabricating a plurality of circuit substrates, and then forming a film on a surface of a portion of the circuit substrate by bonding, and forming a through hole in the film. And formed with a conductive material. Thus, the circuit substrate to which the film and the conductive material are bonded and the circuit substrate to which the film is not attached are stacked as needed, so that the multilayer circuit board can be obtained by one press-fitting. Since the plurality of circuit substrates can be fabricated at the same time, the time for manufacturing the board can be shortened. Since each of the circuit boards is separately fabricated, the defective rate of circuit board fabrication can be reduced as compared with the layer-by-layer superposition method in the prior art.

In the following, an eight-layer circuit board is taken as an example to describe a method for fabricating a circuit board according to an embodiment of the present technical solution. The method for manufacturing the circuit board includes the following steps:

In the first step, referring to Figure 1, three double-sided copper foil substrates 110 are provided.

The double-sided copper foil substrate 110 includes a first copper foil layer 111, an insulating layer 112, and a second copper foil layer 113 which are sequentially stacked. The copper foil substrate 110 may be a flexible copper foil substrate or a rigid copper foil substrate.

In the second step, referring to FIG. 2 to FIG. 6, a conductive hole 114 is formed in each copper foil substrate 110, and the first copper foil layer 111 is formed into a first conductive wiring layer 115, and the second copper foil layer 113 is formed. The second conductive wiring layer 116 is formed, and the first conductive wiring layer 115 and the second conductive wiring layer 116 are electrically conducted to each other through the conductive holes 114, thereby obtaining three circuit substrates.

The three circuit substrates are defined as a first circuit substrate 11, a second circuit substrate 12, and a third circuit substrate 13, respectively. The first conductive circuit layer 115 of the first circuit substrate 11 includes a first exposed region 1151 and a first pressed region 1152. There are a plurality of first conductive lines 151 and a plurality of first connection pads 152 in the first exposed area 1151. The first conductive wiring layer 115 of the second circuit substrate 12 includes a second exposed region 1153 and a second nip region 1154. There are a plurality of second conductive lines 153 and a plurality of second connection pads 154 in the second exposed area 1153. Wherein, the first pressing area 1152 and the second pressing area 1154 are used for pressing together with other circuit substrates, and the first exposed area 1151 and the second exposed area 1153 are used as the bottom of the circuit board groove structure, from the circuit board The recess is exposed for constructing an electronic component.

The conductive holes 114 may be formed by first forming a blind hole penetrating the first copper foil layer 111 and the insulating layer 112 in each of the copper foil substrates 110 by laser ablation. Then, the inner wall of the blind hole is plated with metal by electroplating, thereby forming the blind hole into the conductive hole 114. Preferably, the electroplated metal completely fills the blind vias during electroplating. The conductive hole 114 may also be formed with a through hole in the copper foil substrate 110 and then plated with a metal on the inner wall of the through hole.

The first conductive wiring layer 115 and the second conductive wiring layer 116 are formed by selectively etching the first copper foil layer 111 and the second copper foil layer 113 by an image transfer process and an etching process.

In this embodiment, the first conductive circuit layer 115 and the second conductive circuit layer 116 in the first circuit substrate 11, the second circuit substrate 12, and the third circuit substrate 13 are designed according to the circuit board to be actually manufactured. The first conductive wiring layer 115 and the second conductive wiring layer 116 in the circuit substrate 11, the second circuit substrate 12, and the third circuit substrate 13 may be the same or different.

In the third step, referring to FIG. 7 and FIG. 8, a first solder resist layer 1155 is formed on the first exposed region 1151 of the first conductive circuit layer 115 of the first circuit substrate 11, and the first connection pad 152 is formed from the first solder resist layer. 1155 is exposed, a second solder resist layer 1156 is formed on the second exposed region 1153 of the first conductive circuit layer 115 of the second circuit substrate 12, and the second connection pad 154 is exposed from the second solder resist layer 1156, and is in the first solder resist A first protective film 1157 is formed on the layer 1155 and the first connection pad 152, and a second protective film 1158 is formed on the second solder resist layer 1156 and the second connection pad 154.

Wherein, the first solder resist layer 1155 and the second solder resist layer 1156 can be formed by printing a solder resist ink. The first solder resist layer 1155 covers a first conductive line 151 in a portion of the first exposed region 1151 and a surface of the insulating layer 112 exposed from a gap of the first conductive line 151, and the second solder resist layer 1156 covers a portion of the second exposed region 1153 The second conductive line 153 and the surface of the insulating layer 112 exposed from the gap of the second conductive line 153. The first protective film 1157 covers the first solder resist layer 1155 and the first connection pad 152 exposed from the first solder resist layer 1155. The second protective film 1158 covers the second solder resist layer 1156 and the second connection pad 154 exposed from the second solder resist layer 1156. The first protective film 1157 and the second protective film 1158 may be formed by printing a peelable adhesive.

In the fourth step, referring to FIG. 9 to FIG. 14 , the first film 40 is attached to the first conductive circuit layer 115 of the first circuit substrate 11 , and the second film 50 is attached to the second conductive circuit layer 116 . The film 40 has a first opening 43 therein, and the first protective film 1157 is exposed from the first opening 43 of the first film 40. A first through hole 41 is formed in the first film 40. A portion of the first conductive circuit layer 115 of the first circuit substrate 11 is exposed from the bottom of the first through hole 41, and a second through hole 51 is formed in the second film 50. The second conductive wiring layer 116 is exposed from the bottom of the second through hole 51. A first conductive material 42 is formed in the first through hole 41, and a second conductive material 52 is formed in the second through hole 51, so that the first conductive material 42, the first conductive circuit layer 115, the conductive hole 114, and the second conductive line The layer 116 and the second conductive material 52 are electrically conducted to each other to obtain a fourth circuit substrate 20.

The third film 60 is bonded to the first conductive circuit layer 115 of the third circuit substrate 13, and the fourth film 70 is attached to the second conductive circuit layer 116 of the third circuit substrate 13. The third film 60 has a second opening. 63. A third through hole 61 is formed in the third film 60. A portion of the first conductive circuit layer 115 of the third circuit substrate 13 is exposed from the bottom of the third through hole 61, and a fourth through hole 71 is formed in the fourth film 70. The second conductive wiring layer 116 is exposed from the bottom of the fourth through hole 71. A third conductive material 62 is formed in the third through hole 61, and a fourth conductive material 72 is formed in the fourth through hole 71, so that the third conductive material 62, the first conductive circuit layer 115, the second conductive hole 114, and the second The conductive circuit layer 116 and the fourth conductive material 72 are electrically conducted to each other to obtain a fifth circuit substrate 30.

In this embodiment, the first film 40, the second film 50, the third film 60, and the fourth film 70 are all semi-cured films. The curing temperature of the first film 40, the second film 50, the third film 60, and the fourth film 70 should be greater than 150 degrees Celsius.

In this embodiment, the first through hole 41, the second through hole 51, the third through hole 61, and the fourth through hole 71 are all formed by laser ablation. The first through hole 41 penetrates only the first film 40, the second through hole 51 penetrates only the second film 50, the third through hole 61 penetrates only the third film 60, and the fourth through hole 71 penetrates only the fourth film 70.

In this embodiment, the first conductive material 42 is formed in the first through hole 41 by using the printed metal conductive paste, the second conductive material 52 is formed in the second through hole 51, and the third conductive layer 52 is formed in the third through hole 61. The conductive material 62 forms a fourth conductive material 72 in the fourth through hole 71. The metal conductive paste may be a silver paste containing an organic solvent. The silver paste containing the organic solvent is filled in the first through hole 41, the second through hole 51, the third through hole 61, and the fourth through hole 71 by screen printing, and then the first circuit printed with the silver paste The substrate 11 and the third circuit substrate 13 are baked such that the organic solvent volatilizes and the silver paste solidifies to form the first conductive material 42, the second conductive material 52, the third conductive material 62, and the fourth conductive material 72. In the present embodiment, the temperature at which the first circuit substrate 11 and the third circuit substrate 13 printed with the silver paste are baked is 90 degrees Celsius to 100 degrees Celsius. At this temperature, there is no influence on the performance of the first film 40, the second film 50, the third film 60, and the fourth film 70.

The both surfaces of the fourth circuit substrate 20 and the fifth circuit substrate 30 are respectively formed with film, and therefore, the fourth circuit substrate 20 and the fifth circuit substrate 30 serve as connection substrates in the process of manufacturing a multilayer circuit board.

In the fifth step, referring to FIG. 15, a first copper foil 80 and a second copper foil 90 are provided, which are sequentially stacked and pressed together for the first copper foil 80, the fourth circuit substrate 20, the second circuit substrate 12, and the fifth circuit substrate. 30 and the second copper foil 90 are integrated.

When stacking the first copper foil 80, the fourth circuit substrate 20, the second circuit substrate 12, the fifth circuit substrate 30, and the second copper foil 90, the fourth circuit substrate 20, the second circuit substrate 12, and the fifth circuit should be secured. Precise alignment between the substrates 30. In the actual operation, in the process of performing the stacking, the alignment holes may be respectively disposed in the fourth circuit substrate 20, the second circuit substrate 12, and the fifth circuit substrate 30, and the positioning pins corresponding to the alignment holes are used. The jig is in place.

In this embodiment, since the opposite surfaces of the fourth circuit substrate 20 have the first film 40 and the second film 50, respectively, the two surfaces of the fifth circuit substrate 30 have a third film 60 and a fourth film 70, respectively. During the pressing process, the first film 40 and the second film 50 are cured, and the copper foil or the second circuit substrate 12 adjacent thereto is bonded, and the third film 60 and the fourth film 70 are cured, and the copper foil adjacent thereto is bonded. Or the first circuit substrate 11. Therefore, the first copper foil 80, the fourth circuit substrate 20, the second circuit substrate 12, the fifth circuit substrate 30, and the second copper foil 90 can be integrated as a whole in one press-fitting process. In addition, in the present embodiment, the conductive holes 114, 41, 51, 61, and 71 in the respective circuit substrates 12, 20, and 30 are sequentially aligned and turned on to form a via hole. In other embodiments, the conductive holes 114, 41, 51, 61, 71 in the respective circuit substrates 12, 20, and 30 may not be aligned with each other, and only need to enable mutual conduction between the respective circuit substrates 12, 20, and 30. can.

It can be understood that, in this step, grooves of different depths are obtained according to the setting requirements, and the positions of the first exposed area 1151 and the second exposed area 1153 are set. In this embodiment, the first exposed region 1151 of the fourth circuit substrate 20 is located on a side close to the first copper foil 80, and the second exposed region 1153 of the second circuit substrate 12 is located on a side close to the fifth circuit substrate 30. In order to obtain the grooves of different depths, the arrangement of the second circuit substrate 12 and the fourth circuit substrate 20 can be adjusted such that the first exposed region 1151 and the second exposed region 1153 are located under the different structures obtained after the pressing. position.

In the fifth step, referring to FIG. 16, the first copper foil 80 is formed into a third conductive wiring layer 81, and the second copper foil 90 is formed into a fourth conductive wiring layer 91 to obtain a multilayer substrate.

The third conductive wiring layer 81 and the fourth conductive wiring layer 91 may be formed by an image transfer process and an etching process.

It can be understood that, referring to FIG. 17, an outer solder resist layer 105 may be formed on the surface of the third conductive wiring layer 81 and the surface of the fourth conductive wiring layer 91 to protect the third conductive wiring layer 81 and the fourth conductive wiring layer 91. .

In the sixth step, referring to FIG. 18 and FIG. 19, along the boundary line between the first exposed area 1151 and the first nip 1152, an annular first slit 101 is formed, and the first slit 101 is surrounded. The three conductive wiring layers 81 and the first protective film 1157 are removed to form a first recess 102. A second slit 103 is formed from the surface of the multilayer substrate to the second protective film 1158 along the boundary line between the second exposed region 1153 and the second nip 1154, and the fourth conductive line surrounded by the second slit 103 is formed. The layer 91, the fifth circuit substrate 30, and the second protective film 1158 are removed to form a second recess 104. Thus, the multilayer circuit board 100 having the grooves can be obtained.

In the present embodiment, the shape of the first slit 101 corresponds to the shape of the first exposed region 1151, and the shape of the first slit 101 is a quadrangle. The first slit 101 penetrates only the third conductive wiring layer 81 and the first protective film 1157. The third conductive wiring layer 81 and the first protective film 1157 surrounded by the first slit 101 can be removed by manual work. The third conductive wiring layer 81 may be removed first, and then the first protective film 1157 is removed. It is also possible to simultaneously remove the third conductive wiring layer 81 and the first protective film 1157.

In the present embodiment, the shape of the second slit 103 corresponds to the shape of the second exposed region 1153, and the shape of the second slit 103 is also quadrangular. The second slit 103 penetrates only the fifth circuit substrate 30, the second protective film 1158, and the fourth conductive wiring layer 91. The fifth circuit substrate 30, the second protective film 1158, and the fourth conductive wiring layer 91 surrounded by the second slits 103 can be removed by manual work. The fifth circuit substrate 30 and the fourth conductive wiring layer 91 may be removed first, and then the second protective film 1158 is removed. The fifth circuit substrate 30, the fourth conductive wiring layer 91, and the second protective film 1158 may be simultaneously removed.

In this embodiment, the first slit 101 and the second slit 103 may be formed by ultraviolet laser deep cutting. Since the second protective film 1158 is provided, the fifth circuit substrate 30 in the second slit 103 can be easily removed.

It can be understood that the number, position and depth of the grooves in the multilayer circuit board 100 are not limited by the embodiment, and the number, position and depth of the grooves in the multilayer circuit board 100 can be set according to the needs of the multilayer circuit board.

It can be understood that the manufacturing method of the circuit board provided by the technical solution can also be applied to the fabrication of the multilayer circuit board of other layers. For example, referring to FIG. 20 and FIG. 21, when a six-layer circuit board is fabricated, the first copper foil 80 and the second copper foil 90 may be omitted, and a fourth circuit substrate may be disposed directly between the two third circuit substrates 13. 20. After a one-time press-fitting, a six-layer circuit board is obtained, and then the first exposed region 1151 is exposed by a laser opening to obtain the multilayer circuit board 200.

When used to make a circuit board of more layers, such as a twelve-layer circuit board, the fourth circuit substrate 20 and the second circuit substrate 12 may be sequentially disposed between the first copper foil 80 and the second copper foil 90. The five circuit board 30, the first circuit board 11, and the fifth circuit board 30.

It can be concluded that when the 4N layer circuit board (N is a natural number greater than or equal to 2) is fabricated by the circuit board manufacturing method provided by the technical solution, it can be between the first copper foil 80 and the second copper foil 90. The sum of the number of the second circuit substrate 12 and the first circuit substrate 11 is N-1, and the sum of the number of the fourth circuit substrate 20 and the fifth circuit substrate 30 is N, that is, the number of connected substrates N, and the first circuit substrate 11 or the second circuit substrate 12 is adjacent only to the fourth circuit substrate 20 and/or the fifth circuit substrate 30, and the fourth circuit substrate 20 and/or the fifth circuit substrate 30 It is only adjacent to the first circuit substrate 11 and/or the second circuit substrate 12, and is obtained by a laser opening after a one-time press-fitting.

When the 4N+2 layer circuit board (N is a natural number greater than or equal to 1) is fabricated by the manufacturing method of the circuit board provided by the technical solution, the first copper foil 80 and the second copper foil 90 are not required, and only The sum of the number of the second circuit substrate 12 and the first circuit substrate 11 is N, and the sum of the number of the fourth circuit substrate 20 and the fifth circuit substrate 30 is N+1, and the first circuit substrate 11 or The second circuit substrate 12 is adjacent only to the fourth circuit substrate 20 and/or the fifth circuit substrate 30, and the fourth circuit substrate 20 and/or the fifth circuit substrate 30 are only associated with the first circuit substrate 11 and/or the second The circuit board 12 is adjacent to each other, and is obtained by a laser opening after a one-time press-fitting.

It can be understood that, in this embodiment, the arrangement manner of the circuit boards is not limited to the above manner, and the fourth circuit substrate 20 and the fifth circuit substrate 30 in the above arrangement manner may be required according to the actual number of required grooves and the position. The first circuit substrate 11 and the second circuit substrate 12 can be replaced with each other. In order to obtain a circuit board having a groove structure, at least one second circuit substrate 12 or fifth circuit substrate 30 is required for pressing.

The method for manufacturing a multi-layer circuit board having a groove provided by the technical solution simultaneously forms a plurality of circuit substrates, and then forms a film on a surface of a part of the circuit substrate by bonding, and forms a through hole in the film and forms a conductive material. Thus, the circuit substrate to which the film and the conductive material are bonded and the circuit substrate to which the film is not attached are stacked as needed, so that the multilayer circuit board can be obtained by one press-fitting. Since the plurality of circuit substrates can be fabricated at the same time, the time for manufacturing the board can be shortened. Since each of the circuit boards is separately fabricated, the defective rate of circuit board fabrication can be reduced as compared with the layer-by-layer superposition method in the prior art.

However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

11. . . First circuit substrate

12. . . Second circuit substrate

13. . . Third circuit substrate

20. . . Fourth circuit substrate

30. . . Fifth circuit substrate

40. . . First film

41. . . First through hole

42. . . First conductive material

43. . . First opening

50. . . Second film

51. . . Second through hole

52. . . Second conductive material

60. . . Third film

61. . . Third through hole

62. . . Third conductive material

70. . . Fourth film

71. . . Fourth through hole

72. . . Fourth conductive material

80. . . First copper foil

81. . . Third conductive circuit layer

90. . . Second copper foil

91. . . Fourth conductive circuit layer

100, 200. . . Circuit board

101. . . First incision

102. . . First groove

103. . . Second incision

104. . . Second groove

105. . . Outer solder mask

110. . . Copper foil substrate

111. . . First copper foil layer

112. . . Insulation

113. . . Second copper foil layer

114. . . Conductive hole

115. . . First conductive circuit layer

1151. . . First exposed area

1152. . . First nip

1153. . . Second exposed area

1154. . . Second nip

1155. . . First solder mask

1156. . . Second solder mask

1157. . . First protective film

1158. . . Second protective film

116. . . Second conductive circuit layer

151. . . First conductive line

152. . . First connection pad

153. . . Second conductive line

154. . . Second connection pad

1 is a schematic cross-sectional view of a copper foil substrate provided by an embodiment of the present technical solution.

2 is a schematic cross-sectional view showing the formation of a first circuit substrate by forming a copper foil substrate according to an embodiment of the present technical solution.

3 is a top plan view of the first circuit substrate of FIG. 2.

4 is a schematic cross-sectional view showing the formation of a second circuit substrate by forming a copper foil substrate according to an embodiment of the present technical solution.

Figure 5 is a plan view of the second circuit substrate of Figure 4.

FIG. 6 is a schematic cross-sectional view showing the formation of a third circuit substrate by forming a copper foil substrate according to an embodiment of the present technical solution.

FIG. 7 is a cross-sectional view showing the first circuit substrate of FIG. 2 after forming the first solder resist layer and the first protective film.

FIG. 8 is a cross-sectional view showing the second circuit substrate of FIG. 2 after forming the second solder resist layer and the second protective film.

FIG. 9 is a cross-sectional view showing the first film and the second film of the first circuit substrate of FIG.

FIG. 10 is a cross-sectional view showing the first through hole in the first film of the first circuit substrate of FIG. 9 and the second through hole in the second film.

11 is a cross-sectional view showing a fourth circuit substrate obtained by forming a first conductive material in the first via hole and forming a second conductive material in the second via hole.

12 is a cross-sectional view showing the third film substrate of FIG. 6 after the opposite surfaces of the third circuit substrate are attached with the third film and the fourth film.

13 is a cross-sectional view showing a third through hole in a third film of the third circuit substrate of FIG. 12, and a fourth through hole in the fourth film.

14 is a cross-sectional view showing a fifth circuit substrate obtained by forming a third conductive material in the third via hole and forming a fourth conductive material in the fourth via hole.

15 is a schematic cross-sectional view showing the first copper foil, the fourth circuit substrate, the second circuit substrate, the fifth circuit substrate, and the second copper foil stacked and pressed.

16 is a schematic cross-sectional view showing a multilayer substrate in which a third conductive wiring layer is formed in the first copper foil of FIG. 15 and a fourth conductive wiring layer is formed in the second copper foil.

17 is a schematic cross-sectional view showing the formation of a solder resist layer on the surface of the third conductive wiring layer and the fourth conductive wiring layer of FIG. 16.

Fig. 18 is a schematic cross-sectional view showing the first slit and the second slit formed in the obtained multilayer substrate of Fig. 17.

FIG. 19 is a cross-sectional view of a multilayer circuit board produced by the method provided by the embodiment of the present technical solution.

FIG. 20 is a cross-sectional view showing the stacking and pressing of the third circuit substrate, the fourth circuit substrate, and the third circuit substrate provided by the method of the present invention.

FIG. 21 is a cross-sectional view showing a multilayer circuit board in which a third circuit substrate, a fourth circuit substrate, and a third circuit substrate are formed into a groove by stacking and laminating according to the method of the present invention.

30. . . Fifth circuit substrate

81. . . Third conductive circuit layer

91. . . Fourth conductive circuit layer

100. . . Circuit board

102. . . First groove

104. . . Second groove

152. . . First connection pad

154. . . Second connection pad

Claims (10)

A method for manufacturing a multilayer circuit board, comprising the steps of:
Providing 2N+1 copper foil substrates, each of the copper foil substrates comprising a first copper foil layer, a first insulating layer and a second copper foil layer stacked in sequence, wherein N is a natural number greater than or equal to 1;
The first copper foil layer of each copper foil substrate is formed into a first conductive circuit layer, and the second copper foil layer is formed into a second conductive circuit layer, thereby forming 2N+1 copper foil substrates to form 2N+1 circuits. a substrate, wherein the first conductive circuit layer of the at least one circuit substrate comprises an exposed area and a nip area surrounding the exposed area;
Providing a protective film on the exposed area;
Selecting N circuit substrates of 2N+1 circuit substrates, and bonding a first film to a surface of the first conductive circuit layer of each of the N circuit substrates, the first film having a first through hole, wherein the N The second conductive circuit layer surface of each of the circuit substrates is attached to the second film, the second film has a second through hole, and the first conductive material is filled with the first conductive material in the second through hole The through hole is filled with a second conductive material, the first conductive material and the first conductive circuit layer are electrically connected to each other, and the second conductive material and the second conductive circuit layer are electrically connected to each other, thereby forming the N circuit substrates N connection substrates;
Stacking the N connection substrates and the N+1 circuit substrates such that each connection substrate is located between two circuit substrates, and there is only one connection substrate between the adjacent two circuit substrates, and the at least one has an exposed area The first conductive circuit layer is in contact with the film of the connection substrate, and the N connection substrates and the N+1 circuit substrates are pressed together at a time to obtain a multilayer substrate; and one side of the multilayer substrate is along the surface of the multilayer substrate Cutting the multilayer substrate at the interface between the exposed area and the nip area until cutting to the protective film, forming an annular slit, and removing the portion of the multilayer substrate surrounded by the slit and the protective film to form a groove, the exposed area being exposed to the In the groove, a 4N+2 layer circuit board is obtained. A method for manufacturing a multilayer circuit board, comprising the steps of:
Providing 2N-1 copper foil substrates, each of the copper foil substrates comprising a first copper foil layer, a first insulating layer and a second copper foil layer stacked in sequence, wherein N is a natural number greater than or equal to 2;
The first copper foil layer of each copper foil substrate is formed into a first conductive circuit layer, and the second copper foil layer is formed into a second conductive circuit layer, thereby forming 2N-1 copper foil substrates to form 2N-1 circuits. a substrate, wherein the first conductive circuit layer of the at least one circuit substrate comprises an exposed area and a nip area surrounding the exposed area;
Providing a protective film on the exposed area;
Selecting N circuit substrates of 2N-1 circuit substrates, and bonding a first film to a surface of the first conductive circuit layer of each of the N circuit substrates, the first film having a first through hole, wherein the N The second conductive circuit layer surface of each of the circuit substrates is attached to the second film, the second film has a second through hole, and the first conductive material is filled with the first conductive material in the second through hole The through hole is filled with a second conductive material, the first conductive material and the first conductive circuit layer are electrically connected to each other, and the second conductive material and the second conductive circuit layer are electrically connected to each other, thereby forming the N circuit substrates N connection substrates;
Providing a first copper foil and a second copper foil, stacking the N connection substrates and the N-1 circuit substrates between the first copper foil and the second copper foil, so that each connection substrate is located on two circuit substrates Between the two adjacent circuit boards, there is only one connection substrate, and the first copper foil, the N connection substrates, and the N-1 circuit substrates and the second copper foil are pressed together at a time;
Forming a first copper foil to form a third conductive wiring layer, forming a second copper foil to form a fourth conductive wiring layer, thereby obtaining a multilayer substrate; and pressing and pressing the surface of the multilayer substrate from the surface of the multilayer substrate along the exposed region on one side of the multilayer substrate Intersecting the multi-layer substrate until the protective film is cut, forming an annular slit, and removing the portion of the multi-layer substrate surrounded by the slit and the protective film to form a groove, the exposed region being exposed in the groove Thereby a 4N layer circuit board is obtained. The method of fabricating a multilayer circuit board according to claim 1 or 2, wherein the first conductive material and the second conductive material are each formed by printing a metal conductive paste. The method of fabricating a multilayer circuit board according to claim 3, wherein the metal conductive paste is a silver paste containing an organic solvent, and the forming the first conductive material and the second conductive material comprises the steps of:
Printing the silver paste containing the organic solvent in the first through hole and the second through hole; and baking the first circuit substrate or the second circuit substrate after the silver paste is printed, so that the organic solvent in the silver paste Volatilize to solidify the silver paste. The method for fabricating a multilayer circuit board according to claim 1 or 2, further comprising the step of forming a conductive hole in the copper foil substrate before forming the first conductive wiring layer and the second conductive wiring layer, the first The conductive circuit layer and the second conductive circuit layer are electrically connected to each other through the conductive holes. The method of fabricating a multilayer circuit board according to claim 5, wherein in the 4N+2 layer circuit board or the 4N layer circuit board, the conductive vias, the first via holes and the second via holes are aligned with each other. The method of manufacturing the multilayer circuit board according to claim 1 or 2, wherein the first through hole is formed by laser ablation after the first film is attached to the first conductive circuit layer, the second The through hole is formed by laser ablation after the second film is attached to the second conductive circuit layer. The method of fabricating a multilayer circuit board according to claim 1 or 2, wherein the exposed region has a plurality of lines and a plurality of connection pads, and is further included in the exposure before forming the protective film on each of the exposed regions Forming a solder resist layer covering the plurality of lines of the exposed area and the surface of the insulating layer exposed from the exposed area, and exposing a plurality of connection pads of the exposed area, the protective film covering the surface of the solder resist layer And covering the plurality of connection pads exposed from the solder mask. The method of fabricating a multilayer circuit board according to claim 1 or 2, wherein the slit is formed by laser cutting. The manufacturing method of the multilayer circuit board according to claim 1 or 2, wherein the first conductive wiring layer includes an exposed area and the number of at least one circuit substrate surrounding the nip area connecting the exposed areas is two or two More than one or more, the number of grooves in the multilayer circuit board is two or more.