TWI391068B - Method for manufacturing printed circuit board - Google Patents

Description

Circuit board manufacturing method

The invention relates to the field of circuit board manufacturing, and in particular to a method for manufacturing a circuit board having a groove structure.

With the advancement of science and technology, printed circuit boards are widely used in the field of electronics. For application of the circuit board, please refer to the literature Takahashi, A.Ooki, N.Nagai, A.Akahoshi, H.Mukoh, A.Wajima,M.Res.Lab,High density multilayer printed circuit board for HITAC M-880,IEEE Trans .on Components, Packaging, and Manufacturing Technology, 1992, 15(4): 418-425.

Due to the miniaturization of electronic devices, a recessed structure is generally provided in the circuit board for receiving the packaged or plugged electronic components, thereby reducing the space occupied by the entire circuit board package. However, in the prior art, the fabrication of the above-mentioned recesses in the manufacturing process of the circuit board requires forming a corresponding opening in each adhesive layer of the circuit board, and then performing the steps of pressing and circuit fabrication, so that the corresponding area of the opening is in the circuit board manufacturing process. It is prone to inconsistency in the expansion and contraction and wrinkles. The rubber layer is converted into a liquid state under the condition of pressure heating. Although the rubber layer is provided with an opening corresponding to the groove, the glue is still difficult to control due to the amount of overflow, so that the glue will still flow to the surface of the conductive line at the bottom of the groove, which is easy to cause The glue layer and the conductive line are not easily separated, and the conductive lines in the groove are damaged, thereby affecting the performance of the entire circuit board.

In view of the above, it is necessary to provide a circuit board manufacturing method capable of effectively protecting a wiring pattern inside a groove.

A method of fabricating a circuit board will be described below by way of example.

A circuit board manufacturing method, comprising the steps of: providing an inner layer substrate, wherein the inner layer substrate comprises a first inner layer conductive layer; and the first inner layer conductive layer forms a first inner layer circuit pattern, and the first inner layer circuit pattern comprises a groove region corresponding to the groove structure to be formed and a non-groove region outside the groove region; printing a liquid ink material covering the entire groove region on the first inner layer circuit pattern corresponding to the groove region and solidifying a protective layer; the surface of the first inner layer circuit pattern corresponding to the non-groove area and the surface of the protective layer are sequentially pressed together with the first adhesive layer and the first outer conductive layer, and the first outer layer corresponding to the non-groove area is electrically conductive The layer is formed to form a first outer layer pattern; the first outer conductive layer and the first adhesive layer are cut along the boundary of the groove region to form an opening, and the groove region corresponds to the first outer conductive layer and the first adhesive layer And the protective layer is removed to obtain a groove structure.

Compared with the prior art, the circuit board manufacturing method provided by the technical solution forms a protective layer on the surface of the inner conductive line in the groove structure, which can effectively avoid the contact between the glue layer and the inner conductive line in the subsequent pressing process. Thus, the conductive traces that protect the bottom of the recess structure are damaged during formation of the recess structure. Moreover, since the protective layer is provided, an opening is not required in the adhesive layer in the region corresponding to the groove structure in the adhesive layer, thereby simplifying the manufacturing process of the circuit board, and effectively preventing the formation of the opening in the adhesive layer and causing the pressure. Wrinkles are generated during the process.

The circuit board provided by the technical solution is combined with the following figures and embodiments. The production method is further explained.

The circuit board manufacturing method provided by the technical solution includes the following steps:

In the first step, referring to FIG. 1, an inner substrate 110 is provided.

In this embodiment, the inner substrate 110 is a double-sided copper clad plate, and the inner substrate 110 includes a first inner conductive layer 111, a second inner conductive layer 112, and a first inner conductive layer 111 and a second layer. An insulating layer 113 between the inner conductive layers 112.

In the second step, referring to FIG. 2, the first inner conductive layer 111 is formed into a first inner layer wiring pattern 1111, and the second inner conductive layer 112 is formed into a second inner layer wiring pattern 1121.

In this embodiment, the first inner conductive layer 111 is formed into a first inner layer wiring pattern 1111, and the second inner conductive layer 112 is formed into a second inner layer wiring pattern 1121 by using an image transfer and etching process. The first inner layer circuit pattern 1111 includes a first conductive line 1112 and a connection pad 1113. The intermediate portion of the first inner layer pattern 1111 is defined as a recessed region 1114 for forming the bottom of the recess of the circuit board having the recessed structure. The area defined between the two broken lines in FIG. 2 is the groove area 1114, and the groove area 1114 is a non-groove area 1115. The shape of the groove region 1114 can be set according to the shape of the groove of the circuit board which is actually required to be fabricated. In this embodiment, the groove region 1114 is substantially rectangular in shape. The connection pad 1113 and a portion of the first conductive line 1112 are disposed in the recessed region 1114. The connection pad 1113 is for electrically connecting with the electronic components encapsulated in the recesses of the circuit board. The first conductive line 1112 in the recessed area 1114 is used to connect the connection pad 1113 with the first conductive line outside the recessed area 1114. 1112 phase Inter-electrical connection. Of course, the first conductive line 1112 may not be disposed in the recessed area 1114.

Before forming the first inner layer wiring pattern 1111 and the second inner layer wiring pattern 1121, the method further includes forming a via structure in the insulating layer 113 of the inner substrate 110 to form the first inner layer wiring pattern 1111 formed subsequently. And the second inner layer wiring pattern 1121 is electrically connected to each other.

In the third step, referring to FIG. 3, an inner solder resist layer 114 is formed on the surface of the first conductive line 1112 corresponding to the recessed area 1114 to cover the first conductive line 1112 in the recessed area 1114, and the connection pad is connected. 1113 is exposed from the inner solder resist layer 114.

In this embodiment, the surface of the first conductive line 1112 corresponding to the recessed region 1114 and the surface of the insulating layer 113 exposed by the first inner layer trace pattern 1111 are formed by screen printing solder resist ink. Layer 114. A through hole 1131 is formed in a region of the inner solder resist layer 114 corresponding to the connection pad 1113 such that each of the connection pads 1113 is exposed from the corresponding through hole 1131.

When the first conductive line 1112 is not included in the recessed area 1114, the inner solder resist layer 114 may not be formed on the surface corresponding to the recessed area 1114.

In the fourth step, referring to FIG. 4, the surface of the inner solder resist layer 114 and the connection pad 1113 corresponding to the recessed region 1114 forms a protective layer 115 covering the entire recessed region 1114.

In this embodiment, the protective layer 115 is formed by printing a liquid ink material on the surface of the inner solder resist layer 114 and the connection pad 1113 corresponding to the recessed region 1114. The liquid ink material may be a thermosetting and peelable ink, or Developing ink. After curing, the liquid ink material can withstand a maximum temperature of more than 200 degrees Celsius and can withstand a pressure of 25 kilograms per square centimeter. And the liquid ink material has good corrosion resistance to acid, alkali and oxidant after curing.

When the thermosetting strippable ink is used, the liquid ink material can be directly printed on the surface of the inner solder resist layer 114 and the connection pad 1113 corresponding to the recessed region 1114, and heat treated to cure the liquid ink material. Protective layer 115. The thermosetting peelable ink has the characteristics of being easily peeled off, thereby avoiding damage to the connection pad 1113 and the inner solder resist layer 114 during the stripping process. The thermosetting ink used may be LM-600PSMS thermally hardenable peelable ink.

When the developing ink is used, the liquid ink material may be directly printed on the surface of the inner solder resist layer 114 and the connection pad 1113 corresponding to the recessed region 1114, and then the formed liquid ink material is exposed and developed, thereby A cured protective layer 115 is obtained. After the developing ink material is cured, it needs to be removed by using a corresponding stripping liquid. The developing ink material used may be a PR 2000SA photosensitive ink.

When the recessed region 1114 does not form the inner solder resist layer 114, the protective layer 115 may be formed directly on the surface of the first inner wiring pattern 1111.

In the fifth step, referring to FIG. 5 and FIG. 6, the surface of the first inner layer circuit pattern 1111 corresponding to the non-groove area 1115 and the surface of the protective layer 115 are sequentially pressed to the first adhesive layer 120 and the first outer layer is electrically conductive. The layer 130 sequentially presses the second adhesive layer 140 and the second outer conductive layer 150 on the surface of the second inner layer trace pattern 1121, and the non-recessed region 1115 corresponds to the first outer conductive layer 130. A first outer layer wiring pattern 1301 is formed, and a second outer layer conductive layer 150 is formed to form a second outer layer wiring pattern 1501.

In order to make the second inner layer wiring pattern 1121 and the exposed first conductive line 1112 and the subsequent adhesive layer pressed thereon, it is good to maintain a strong fixing force after pressing. Before the first adhesive layer 120, the first outer conductive layer 130, the second adhesive layer 140, and the second outer conductive layer 150 are pressed, the second inner layer wiring pattern 1121 and the exposed surface after the protective layer 115 is formed may be exposed. The first conductive line 1112 is subjected to a roughening process to increase the roughness of the surface of the second inner layer wiring pattern 1121 and the exposed first conductive line 1112. The roughening treatment may be blackening or browning, that is, the copper of the surface of the second inner layer pattern 1121 and the exposed first conductive line 1112 is oxidized, so that part of the copper is oxidized to monovalent copper or divalent copper. The surface of the second inner layer wiring pattern 1121 and the exposed first conductive line 1112 is roughened.

In this embodiment, the first adhesive layer 120 and the first outer conductive layer 130 are formed by heat and pressure to form a surface of the first inner layer trace pattern 1111 corresponding to the non-groove region 1115 and a surface of the protective layer 115. The second adhesive layer 140 and the second outer conductive layer 150 are formed on the surface of the second inner layer wiring pattern 1121. The first adhesive layer 120 and the second adhesive layer 140 may be prepreg. The first outer conductive layer 130 and the second outer conductive layer 150 may be copper foil.

In the present embodiment, the first outer layer wiring pattern 1301 and the second outer layer wiring pattern 1501 are formed in the same manner as the first inner layer wiring pattern 1111 and the second inner layer wiring pattern 1121. The first outer layer pattern 1301 corresponds to the non-groove area 1115 to avoid subsequent damage to the groove structure. Outer line pattern 1301. To facilitate subsequent formation of the recess structure, an alignment mark 1302 is formed in the first outer conductive layer 130 of the region corresponding to the recess region 1114. In this embodiment, the first outer conductive layer 130 corresponding to the corresponding portion of the alignment mark 1302 is not removed, and the shape of the alignment mark 1302 corresponds to the shape of the groove region 1114, and the alignment mark 1302 is separated from the first outer layer pattern 1301. When the groove structure is subsequently formed, the edge of the alignment mark 1302 may be aligned.

Before forming the first outer layer pattern 1301 and the second outer layer pattern 1501, the method further includes forming a conductive structure in the first adhesive layer 120 and the second adhesive layer 140 to form the subsequently formed first outer layer trace pattern 1301 and The first inner layer wiring patterns 1111 and the second inner layer wiring patterns 1121 and the second outer layer wiring patterns 1501 are electrically connected to each other. The conductive structure can be formed by first opening a hole in the adhesive layer and the corresponding outer conductive layer, and then forming a conductive hole on the inner wall of the hole by electroplating to form a via hole, thereby forming the outer conductive layer and the inner conductive layer. The line patterns on both sides of the layer substrate 110 are correspondingly turned on, so that when the outer layer conductive layer forms the outer layer line pattern, the outer layer line pattern and the inner layer line pattern are electrically conducted by the corresponding via holes. Of course, the outer conductive layer may be electrically connected to the inner layer circuit pattern on both sides of the inner substrate 110 in such a manner that the formed hole is filled with a conductive material.

When a plurality of layers of the circuit board are formed, the third adhesive layer and the third outer conductive layer may be further pressed on the surfaces of the first outer layer pattern 1301 and the second outer layer pattern 1501, and the third outer conductive layer may be fabricated. A third outer layer pattern is formed so that more layers of the board can be obtained.

In the sixth step, please refer to FIG. 7 and FIG. 8 along the side of the groove area 1114. The first outer conductive layer 130 and the first adhesive layer 120 are cut to form the opening 101, and the first outer conductive layer 130, the first adhesive layer 120 and the protective layer 115 corresponding to the recessed region 1114 are removed, thereby obtaining The circuit board 100 of the recess 102.

An outer solder mask may be formed on the surfaces of the first outer layer pattern 1301 and the second outer layer pattern 1501 to perform the areas to be protected in the first outer layer pattern 1301 and the second outer layer pattern 1501 before the cutting is performed. cover. The outer solder mask is formed by printing a solder resist ink, and an opening is formed corresponding to a region in the first outer layer pattern 1301 and the second outer layer pattern 1501 that needs to communicate with the outside, so that the outer solder resist covers the first outer layer. The portion of the line pattern 1301 and the second outer layer pattern 1501 that require external insulation isolation exposes the area that needs to be conductive to the outside.

The groove 102 can be formed by the following method: First, the opening 101 of the first outer conductive layer 130 and the first adhesive layer 120 is formed along the boundary of the groove region 1114 by laser cutting or mechanical deep cutting. The depth direction of the first opening 101 should be perpendicular to the first adhesive layer 120. In this embodiment, the edge of the alignment mark 1302 can be cut from the opening 101 disposed along the groove region 1114. When the third adhesive layer and the third outer conductive layer are formed on the surface of the first outer layer pattern 1301, the formed opening 101 should penetrate the third adhesive layer and the third outer conductive layer above the first adhesive layer 120.

Then, the first adhesive layer 120 and the alignment mark 1302 corresponding to the groove region 1114 are removed. Since the groove region 1114 corresponds to the first glue layer 120 only The protective layers 115 are in contact with each other without being in contact with the first inner layer wiring pattern 1111. The first adhesive layer 120 corresponding to the recessed region 1114 is removed without damaging the first inner layer trace pattern 1111 corresponding to the recessed region 1114. The first glue layer 120 can be removed by manual removal.

Finally, the protective layer 115 is removed, resulting in a circuit board 100 having the recesses 102.

When the protective layer 115 is formed using a developing ink, the protective layer 115 may be removed by a method of stripping the water. That is, the protective layer 115 is chemically reacted with the de-coating syrup corresponding to the developing ink, so that the protective layer 115 is dissolved or detached from the surfaces of the inner solder resist layer 114 and the connection pad 1113.

When the protective layer 115 layer formed of the peelable ink is used, it has good peelability and can be directly peeled off from the surface of the inner solder resist layer 114 and the connection pad 1113.

The circuit board manufacturing method provided in this embodiment forms a protective layer on the inner conductive track surface of the bottom of the groove structure, which can effectively avoid the contact between the adhesive layer and the inner conductive track in the subsequent pressing process, thereby protecting the groove. The conductive traces at the bottom of the structure are damaged during the formation of the recess structure. Moreover, since the protective layer is provided, there is no need to open an opening in the adhesive layer in the region corresponding to the groove structure in the adhesive layer, thereby simplifying the manufacturing process of the circuit board, and effectively avoiding the formation of the opening in the adhesive layer. Wrinkles are generated during the pressing process.

In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Familiar with this Equivalent modifications or variations of the skilled person in the spirit of the present invention are intended to be included in the scope of the following claims.

100‧‧‧ boards

101‧‧‧ openings

102‧‧‧ Groove

110‧‧‧ Inner substrate

111‧‧‧First inner conductive layer

1111‧‧‧First inner layer circuit graphics

1112‧‧‧First conductive line

1113‧‧‧Connecting mat

1114‧‧‧ Groove area

1115‧‧‧Non-groove area

112‧‧‧Second inner conductive layer

1121‧‧‧Second inner wiring pattern

113‧‧‧Insulation

1131‧‧‧through hole

114‧‧‧Inner welding layer

115‧‧‧Protective layer

120‧‧‧First layer

130‧‧‧First outer conductive layer

1301‧‧‧First outer circuit graphics

1302‧‧‧ alignment mark

140‧‧‧Second layer

150‧‧‧Second outer conductive layer

1501‧‧‧Second outer circuit graphics

1 is a schematic cross-sectional view of an inner substrate provided by an embodiment of the present technical solution.

2 is a schematic view showing the inner layer substrate and the second inner layer circuit pattern formed by the inner layer substrate provided by the embodiment of the present technical solution.

FIG. 3 is a schematic diagram showing the formation of an inner solder mask layer on the surface of the first inner layer wiring pattern provided by the embodiment of the present technical solution.

FIG. 4 is a schematic view showing the inner layer solder resist layer and the surface of the connection pad formed by the protective layer provided by the embodiment of the present technical solution.

FIG. 5 is a schematic view of the first adhesive layer, the first outer conductive layer, the second adhesive layer, and the second outer conductive layer provided by the embodiment of the present invention.

FIG. 6 is a schematic diagram of the first outer conductive layer and the second outer conductive layer formed by the embodiment of the present invention.

FIG. 7 is a schematic view showing the first adhesive layer after cutting to form an opening provided by an embodiment of the present technical solution.

FIG. 8 is a schematic diagram of a circuit board having a recess made by an embodiment of the present technical solution.

101‧‧‧ openings

1113‧‧‧Connecting mat

114‧‧‧Inner welding layer

115‧‧‧Protective layer

120‧‧‧First layer

1302‧‧‧ alignment mark

Claims (11)

A circuit board manufacturing method, comprising the steps of: providing an inner layer substrate, wherein the inner layer substrate comprises a first inner layer conductive layer; and the first inner layer conductive layer forms a first inner layer circuit pattern, and the first inner layer circuit pattern comprises a groove region corresponding to the groove structure to be formed and a non-groove region outside the groove region; printing a liquid ink material covering the entire groove region on the first inner layer circuit pattern corresponding to the groove region and solidifying a protective layer; the surface of the first inner layer circuit pattern corresponding to the non-groove area and the surface of the protective layer of the groove area are sequentially pressed together with the first adhesive layer and the first outer conductive layer, and the first adhesive layer corresponding to the concave region And contacting the protective layer with each other, and forming a first outer layer conductive pattern corresponding to the first outer conductive layer in the non-groove area; cutting the first outer conductive layer and the first adhesive layer along the boundary of the groove area to form Opening, and removing the first outer conductive layer, the first adhesive layer and the protective layer corresponding to the groove region to obtain a groove structure. The circuit board manufacturing method of claim 1, wherein the first inner layer circuit pattern comprises a first conductive line and a connection pad, and the connection pad and a portion of the first conductive line are located in the groove area. Inside. The method for fabricating a circuit board according to claim 2, wherein the surface of the first conductive line in the groove region is included before the protective layer is formed on the surface of the first inner layer circuit pattern corresponding to the groove region. Forming an inner solder resist layer to cover the first conductive trace in the recessed region and the connection pad is exposed from the inner solder resist layer, the protective layer being formed on the inner solder resist layer and the connection pad surface. The method for manufacturing a circuit board according to the first aspect of the patent application, wherein The protective layer is formed by printing and curing a thermosetting peelable ink, and in the step of removing the protective layer, the protective layer is removed by peeling. The method of manufacturing a circuit board according to the first aspect of the invention, wherein the protective layer is formed by printing a developing ink, and after printing the developing ink, exposing and developing the developed developing ink to make printing In the step of curing the formed ink material, in the step of removing the protective layer, the protective layer is removed by a stripping solution treatment corresponding to the developing ink. The method for fabricating a circuit board according to claim 1, wherein after forming the first outer layer pattern, the method further comprises: pressing a third adhesive layer and a third outer conductive layer on the surface of the first outer layer trace pattern, and The third outer conductive layer is formed into a line pattern, and the first outer conductive layer, the first adhesive layer, the third adhesive layer and the third outer conductive layer are cut along the boundary of the groove region to form an opening, and The third outer conductive layer, the third adhesive layer, the first outer conductive layer, the first adhesive layer and the protective layer corresponding to the groove region are removed to obtain a groove structure. The method for fabricating a circuit board according to claim 1, wherein after forming the first outer layer pattern, the step of forming an outer solder resist layer on the surface of the first outer layer wiring pattern is further included. The method of fabricating a circuit board according to claim 1, wherein the inner substrate further comprises an insulating layer and a second inner conductive layer, wherein the first inner conductive layer and the second inner conductive layer are located on the insulating layer On the opposite sides, while forming the first inner layer circuit pattern, the second inner layer conductive layer is further formed into a second inner layer circuit pattern, and the surface of the first inner layer circuit pattern corresponding to the groove region and the protective layer are When the surface is pressed against the first adhesive layer and the first outer conductive layer, the second adhesive layer and the second outer conductive layer are further formed on the surface of the second inner layer trace pattern. And when the first outer conductive layer is formed into the first outer layer wiring pattern, the second outer conductive layer is further formed to form the second outer layer wiring pattern. The method for fabricating a circuit board according to claim 1, wherein before forming the first outer layer pattern, the method further comprises forming a conductive structure in the first adhesive layer to form a first outer layer circuit pattern and a second An inner layer circuit pattern is electrically connected to each other. The method for fabricating a circuit board according to claim 1, wherein when the first outer layer conductive layer forms the first outer layer wiring pattern, the method further includes forming an alignment mark on a region corresponding to the first outer conductive layer and the recessed region. In order to perform the alignment when the opening is formed later. The method for fabricating a circuit board according to the first aspect of the invention, wherein before the first inner layer pattern and the surface of the protective layer are pressed against the first adhesive layer and the first outer conductive layer, the first The surface of the inner layer wiring pattern is roughened to increase the fixing force between the first inner layer wiring pattern and the first adhesive layer.