CN103582322A - Multilayer circuit board and manufacturing method thereof - Google Patents
Multilayer circuit board and manufacturing method thereof Download PDFInfo
- Publication number
- CN103582322A CN103582322A CN201210250824.5A CN201210250824A CN103582322A CN 103582322 A CN103582322 A CN 103582322A CN 201210250824 A CN201210250824 A CN 201210250824A CN 103582322 A CN103582322 A CN 103582322A
- Authority
- CN
- China
- Prior art keywords
- base board
- circuit
- film
- line base
- copper foil
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Abstract
A manufacturing method of a multilayer circuit board comprises the following steps: providing a plurality of copper foil substrates; manufacturing copper foil layers of the copper foil substrates into conductive line layers to obtain a plurality of first circuit substrates; adhering a film to one surface of each of a part of the first circuit substrates, forming through holes in the films and arranging conductive material in the through holes, wherein the conductive material and the conductive line layers are electrically connected with each other so as to obtain second circuit substrates; adhering films to two surfaces of each of a part of the first circuit substrates, forming through holes in the films and arranging conductive material in the through holes, wherein the conductive material and the conductive line layers are electrically connected with each other so as to obtain third circuit substrates; and laminating one type, two types or three types among the third circuit substrates, the second circuit substrates and the first circuit substrates or then simultaneously laminating the copper foils to form a laminated substrate, and pressing the laminated substrate or manufacturing the copper foils into conductive line patterns, thus obtaining a multilayer circuit board. The invention further provides a multilayer circuit board manufactured by means of the manufacturing method.
Description
Technical field
The present invention relates to wiring board manufacturing technology, relate in particular to a kind of multilayer circuit board and preparation method thereof.
Background technology
Along with the development of electronic product toward miniaturization, high speed direction, wiring board is also from one-sided circuit board, double-sided wiring board toward multilayer circuit board future development.Multilayer circuit board refers to the wiring board with multilayer conductive circuit, it has more wiring area, higher interconnect density, thereby be widely used, referring to document Takahashi, A. Ooki, N. Nagai, A. Akahoshi, H. Mukoh, A. Wajima, M. Res. Lab., High density multilayer printed circuit board for HITAC M-880, IEEE Trans. on Components, Packaging, and Manufacturing Technology, 1992,15 (4): 418-425.
At present, multilayer circuit board adopts Layer increasing method to make conventionally, that is, the mode being layering is made.The method that adopts traditional Layer increasing method to make multilayer circuit board comprises step: the first step, make an inner plating, described inner plating comprises at least one deck insulation material layer and two conducting wire layers, and described two conducting wire layers conduct mutually by least one conductive hole.Second step, difference sheet adhesive of pressing and a copper foil layer on two conducting wire layers of inner plating, wherein, described copper foil layer is combined with the conducting wire of described inner plating layer by described bonding sheet, copper foil layer described in selective etch, so that described copper foil layer is formed to an outermost conductive circuit pattern, thereby form a multilayer wiring board; The 3rd step forms at least one blind hole on described multilayer wiring board by methods such as laser drill, electroplate described at least one blind hole the conducting wire layer of described copper foil layer and described inner plating is conducted; The 4th step forms at least one through hole on described multilayer wiring board, and electroplates described through hole, so that two outermost conductive circuit pattern of described multilayer wiring board are electrically connected to, so just obtains a multilayer circuit board.If need the multilayer circuit board of more multi-layered number, according to the similar method of the second to three step, that is, continue copper foil of difference pressing in two outermost conductive circuit pattern of described Mulitilayer circuit board, copper foil layer described in selective etch, is electrically connected to the conducting wire layer of required connection.So, can obtain more multi-layered multilayer circuit board.
Yet, in the manufacturing process of above-mentioned multilayer circuit board, often once increase layer, all need to carry out one step press process, while making the wiring board of the more number of plies, pressing number of times is also corresponding more, be unfavorable for like this simplification of technical process, cost of manufacture is also relatively high, and make efficiency is also relatively low.
Summary of the invention
In view of this, be necessary to provide a kind of manufacture method of multilayer circuit board and the resulting multilayer circuit board of method thus, to improve the make efficiency of multilayer circuit board.
A manufacture method for multilayer circuit board, comprises step: N copper-clad base plate is provided, and wherein, N is greater than or equal to 4 natural number, and described in each, copper-clad base plate comprises insulating barrier and fits in the first copper foil layer and second copper foil layer of the relative both sides of described insulating barrier, the first copper foil layer of copper-clad base plate described in each is made and formed the first conductive circuit pattern, the second copper foil layer of copper-clad base plate described in each is made and formed the second conductive circuit pattern, and described the first conductive circuit pattern and the second conductive circuit pattern conduct mutually by least one conductive hole, thereby N described copper-clad base plate made to N First Line base board, in N described First Line base board, get N-2M+1 First Line base board, wherein, M is more than or equal to 2 natural number, and N is greater than 2M-1, the first conductive circuit pattern surface label described in each in N-2M+1 described First Line base board in First Line base board is unified the first film, described the first film has at least one first through hole, in described at least one first through hole, fill the first electric conducting material, described the first electric conducting material and adjacent the first conductive circuit pattern conduct mutually, thereby N-2M+1 First Line base board made to N-2M+1 the second circuit base plate, in N described First Line base board, get M-1 First Line base board, first conductive circuit pattern surface laminating the second film in each First Line base board in M-1 described First Line base board, the second conductive circuit pattern surface laminating the 3rd film in each First Line base board in M-1 described First Line base board, described the second film has at least one second through hole, described the 3rd film has at least one third through-hole, and fill the second electric conducting material in described at least one second through hole, described the second electric conducting material and adjacent the first conductive circuit pattern conduct mutually, in described at least one third through-hole, fill the 3rd electric conducting material, described the 3rd electric conducting material and adjacent the second conductive circuit pattern conduct mutually, thereby M-1 described First Line base board made to M-1 tertiary circuit substrate, and the remaining M of an one step press First Line base board, described N-2M+1 the second circuit base plate and described M-1 tertiary circuit substrate are to form 2N sandwich circuit board, in described 2N sandwich circuit board, between adjacent insulating barrier, pass through the first film, the second film or the 3rd film are bonded together, and, two First Line base boards are positioned at the outermost both sides of described 2N sandwich circuit board, or First Line base board and second circuit base plate are positioned at the outermost both sides of described 2N sandwich circuit board, or two the second circuit base plates are positioned at the outermost both sides of described 2N sandwich circuit board.
A manufacture method for multilayer circuit board, comprises step: N copper-clad base plate is provided, and wherein, N is greater than or equal to 3 natural number, and described in each, copper-clad base plate comprises insulating barrier and fits in the first copper foil layer and second copper foil layer of the relative both sides of described insulating barrier, the first copper foil layer of copper-clad base plate described in each is made and formed the first conductive circuit pattern, the second copper foil layer of copper-clad base plate described in each is made and formed the second conductive circuit pattern, and described the first conductive circuit pattern and the second conductive circuit pattern conduct mutually by least one conductive hole, thereby N described copper-clad base plate made to N First Line base board, in N described First Line base board, get N-2M First Line base board, wherein, M is natural number, and N is greater than 2M, first conductive circuit pattern surface laminating the first film described in each in N-2M described First Line base board in First Line base board, described the first film has at least one first through hole, in described the first through hole, fill the first electric conducting material, described the first electric conducting material and adjacent the first conductive circuit pattern conduct mutually, thereby N-2M described First Line base board made to N-2M the second circuit base plate, in N described First Line base board, get M First Line base board, first conductive circuit pattern surface laminating the second film in each First Line base board in M described First Line base board, the second conductive circuit pattern surface laminating the 3rd film in each First Line base board in M described First Line base board, described the second film has at least one second through hole, described in each, the 3rd film has at least one third through-hole, and fill the second electric conducting material in described at least one second through hole, described the second electric conducting material and adjacent the first conductive circuit pattern conduct mutually, in described at least one third through-hole, fill the 3rd electric conducting material, described the 3rd electric conducting material and adjacent the second conductive circuit pattern conduct mutually, thereby M described First Line base board made to M tertiary circuit substrate, the first copper foil is provided, the remaining M of an one step press First Line base board, N-2M described the second circuit base plate, M described tertiary circuit substrate and described the first copper foil are to form 2N+1 sandwich circuit substrate, in described 2N+1 sandwich circuit substrate, between adjacent insulating barrier, pass through the first film, the second film or the 3rd film are bonded together, between adjacent insulating barrier and the first copper foil, by the first film or the second film, be bonded together, and described the first copper foil is positioned at described 2N+1 sandwich circuit substrate outermost one side, described First Line base board or described second circuit base plate are positioned at the outermost opposite side of described 2N+1 sandwich circuit substrate, and described the first copper foil is made to conductive circuit pattern via selective etch, obtain 2N+1 sandwich circuit board.
A manufacture method for multilayer circuit board, comprises step: N copper-clad base plate is provided, and wherein, N is greater than or equal to 3 natural number, and described in each, copper-clad base plate comprises insulating barrier and fits in the first copper foil layer and second copper foil layer of the relative both sides of described insulating barrier, the first copper foil layer of copper-clad base plate described in each is made and formed the first conductive circuit pattern, the second copper foil layer of copper-clad base plate described in each is made and formed the second conductive circuit pattern, and described the first conductive circuit pattern and the second conductive circuit pattern conduct mutually by least one conductive hole, thereby N described copper-clad base plate made to N First Line base board, in N described First Line base board, get N-2M-1 First Line base board, wherein, M is natural number, and N is greater than 2M+1, the first conductive circuit pattern surface label described in each in N-2M-1 described First Line base board in First Line base board is unified the first film, described the first film has at least one first through hole, in described at least one first through hole, fill the first electric conducting material, described the first electric conducting material and corresponding the first conductive circuit pattern conduct mutually, thereby N-2M-1 described First Line base board made to N-2M-1 the second circuit base plate, in N described First Line base board, get M+1 First Line base board, first conductive circuit pattern surface laminating the second film in each First Line base board in described in M+1 First Line base board, the second conductive circuit pattern surface laminating the 3rd film in each First Line base board in described M+1 First Line base board, described the second film has at least one second through hole, described the 3rd film has at least one third through-hole, and fill the second electric conducting material in described at least one second through hole, described the second electric conducting material and adjacent the first conductive circuit pattern conduct mutually, in described at least one third through-hole, fill the 3rd electric conducting material, described the 3rd electric conducting material and adjacent the second conductive circuit pattern conduct mutually, thereby M+1 described First Line base board made to M+1 tertiary circuit substrate, the first copper foil and the second copper foil are provided, the first copper foil described in one step press, remaining M First Line base board, N-2M-1 described the second circuit base plate, M+1 described tertiary circuit substrate and described the second copper foil are to form 2N+2 sandwich circuit substrate, in described 2N+2 sandwich circuit substrate, described the first copper foil and described the second copper foil lay respectively at the outermost both sides of described 2N+2 sandwich circuit substrate, and between adjacent insulating barrier, pass through the first film, the second film or the 3rd film are bonded together, all by the first film or the second film or the 3rd film, be bonded together between adjacent insulating barrier and the first copper foil and between adjacent insulating barrier and the second copper foil, and described the first copper foil and the second copper foil are made to conductive circuit pattern via selective etch respectively, to obtain 2N+2 sandwich circuit board.
A kind of manufacture method of multilayer circuit board, comprise step: provide N+1 copper-clad base plate, wherein, N is greater than or equal to 1 natural number, and described in each, copper-clad base plate comprises insulating barrier and fits in the first copper foil layer and second copper foil layer of the relative both sides of described insulating barrier; The first copper foil layer of copper-clad base plate described in each is made and formed the first conductive circuit pattern, the second copper foil layer of copper-clad base plate described in each is made and formed the second conductive circuit pattern, and described the first conductive circuit pattern and the second conductive circuit pattern conduct mutually by least one conductive hole, thereby N+1 described copper-clad base plate made to N+1 First Line base board; In N+1 described First Line base board, get N First Line base board, first conductive circuit pattern surface laminating the first film described in each in N described First Line base board in First Line base board, described the first film has at least one first through hole, in described at least one first through hole, fill the first electric conducting material, described the first electric conducting material and adjacent the first conductive circuit pattern conduct mutually, thereby N described First Line base board made to N the second circuit base plate; One step press N described the second circuit base plate and a remaining First Line base board are to form 2N+2 sandwich circuit board, in described 2N+2 sandwich circuit board, the first film described in each in the second circuit base plate, compared with the more close described First Line base board of the second conductive circuit pattern, is bonded together by the first film between adjacent insulating barrier.
A kind of multilayer circuit board, adopting manufacturing method of multi-layer circuit board as above to make forms, described multilayer circuit board comprises multilayer dielectric layer, multifilm and multilayer conductive circuit figure, the relative both sides of every layer insulating are provided with conductive circuit pattern described in one deck, and the conductive circuit pattern of every layer insulating both sides conducts by least one conductive hole being arranged in this insulating barrier, the relative both sides of every layer of film are provided with conductive circuit pattern described in one deck, and the conductive circuit pattern of the relative both sides of every layer of film conducts by the electric conducting material being arranged in this film, electric conducting material in this film forms by printing conductive cream.
The manufacturing method of multi-layer circuit board that the technical program provides is made a plurality of circuit base plates simultaneously, and then the mode by laminating forms film on one or two surface of partial line base board, and in film, forms through hole and be formed with electric conducting material.Like this, as required, stacking Copper Foil, be fitted with the circuit base plate of film and electric conducting material or the stacking circuit base plate that is not fitted with film also simultaneously, thereby just can obtain multilayer circuit board by one step press.Because a plurality of circuit base plates can be made simultaneously, thereby can shorten the time that wiring board is made.Because each circuit base plate is made separately respectively, than the mode of stack successively in prior art, can improve the yield that wiring board is made.
Accompanying drawing explanation
Fig. 1 is the generalized section of the copper-clad base plate that provides of the technical program the first embodiment.
Fig. 2 is the generalized section that formed First Line base board after conductive hole, the first conductive circuit pattern and the second conductive circuit pattern is provided on the copper-clad base plate in Fig. 1 that provides of the technical program the first embodiment.
Fig. 3 is superimposed the first film and release film in the first conductive circuit pattern of the First Line base board in Fig. 2 that provides of the technical program the first embodiment; in the second conductive circuit pattern, fit diaphragm the generalized section after First Line base board, the first film, release film and diaphragm described in pre-pressing.
Fig. 4 forms the first blind hole on the first film in Fig. 3 of providing of the technical program the first embodiment, and in the first blind hole, forms the generalized section of the second circuit base plate forming after the first electric conducting material.
Fig. 5 is the generalized section of the tertiary circuit substrate that provides of the technical program the first embodiment.
Fig. 6 is the generalized section of formed integral body after first copper foil of pressing, a tertiary circuit substrate, First Line base board, another tertiary circuit substrate, second circuit base plate and second copper foil that the technical program the first embodiment provides.
Fig. 7 is that the first copper foil by Fig. 6 that the technical program the first embodiment provides is made formation the 3rd conductive circuit pattern, the second copper foil is made to the generalized section forming after the 4th conductive circuit pattern.
Fig. 8 forms the first welding resisting layer in the 3rd conductive circuit pattern in Fig. 7 that provides of the technical program the first embodiment, in the 4th conductive circuit pattern, form the second welding resisting layer after the generalized section of formed ten sandwich circuit boards.
Fig. 9 is the N=7 that the technical program provides, the structural representation of 14 sandwich circuit boards that a kind of stack manner by the second embodiment during M=3 obtains.
Figure 10 is the N=7 that the technical program provides, the structural representation of 14 sandwich circuit boards that a kind of stack manner by the 3rd embodiment during M=3 obtains.
Figure 11 is the N=6 that the technical program provides, the structural representation of the 13 sandwich circuit substrates that a kind of stack manner by the 4th embodiment during M=3 obtains.
Figure 12 is the N=6 that the technical program provides, the structural representation of the 13 sandwich circuit substrates that a kind of stack manner by the 5th embodiment during M=2 obtains.
Figure 13 is the N=7 that the technical program provides, the structural representation of the 16 sandwich circuit substrates that a kind of stack manner by the 6th embodiment during M=3 obtains.
Figure 14 is the N=7 that the technical program provides, the structural representation of the 16 sandwich circuit substrates that a kind of stack manner by the 7th embodiment during M=2 obtains.
Figure 15 be the technical program provide N=3 time stacking eight sandwich circuit boards that obtain structural representation.
Main element symbol description
| Copper-clad base plate | 10 |
| |
11 |
| The first copper foil layer | 12 |
| The second copper foil layer | 13 |
| |
14 |
| The first |
15 |
| The second |
16 |
| First |
110 |
| The |
17 |
| |
18 |
| |
19 |
| The first through |
20 |
| The first electric conducting |
21 |
| The second |
120 |
| The |
22 |
| The |
23 |
| The second through hole | 24 |
| Third through-hole | 25 |
| The second electric conducting |
26 |
| The 3rd electric conducting |
27 |
| |
130 |
| The |
28 |
| The |
29 |
| The 3rd |
30 |
| The 4th |
31 |
| The first |
32 |
| The second |
33 |
| Ten |
100 |
| 14 |
200、210 |
| 13 |
220、230 |
| 16 |
240、250 |
| Eight |
260 |
Following embodiment further illustrates the present invention in connection with above-mentioned accompanying drawing.
Embodiment
Multilayer circuit board the technical program being provided below in conjunction with accompanying drawing and a plurality of embodiment and preparation method thereof is described in further detail.
The manufacture method of ten sandwich circuit boards that the technical program the first embodiment provides comprises the following steps:
The first step, refers to Fig. 1, and four copper-clad base plates 10 are provided.Each copper-clad base plate 10 includes an insulating barrier 11 and is bonded in the first copper foil layer 12 and second copper foil layer 13 of insulating barrier 11 relative both sides.
Described copper-clad base plate 10 can be glass fiber fabric base clad copper base, paper substrate copper-clad base plate, composite base copper-clad base plate, aramid fiber nonwoven fabric base copper-clad base plate or synthetic fibers base copper-clad base plate etc.Certainly, also can select two, three, five or more described copper-clad base plate 10 according to the needs of the wiring board number of plies forming.
Second step, refer to Fig. 2, described in each, on copper-clad base plate 10, form at least one first conductive hole 14, the first copper foil layer 12 described in each is made and formed the first conductive circuit pattern 15, each second copper foil layer 13 is made and formed the second conductive circuit pattern 16, the first conductive circuit pattern 15 and the second conductive circuit pattern 16 conduct mutually by described at least one first conductive hole 14, thereby obtain four First Line base boards 110.
The formation of described the first conductive hole 14 can be adopted with the following method: first, adopt the mode of machine drilling to form through hole on described copper-clad base plate 10, described through hole connects described the first copper foil layer 12, insulating barrier 11 and the second copper foil layer 13 successively, and described through hole is carried out to de-smear processing; Then, the mode of adopt electroplating is internal electroplated as copper, silver or the metal such as golden described through hole, thereby obtains described the first conductive hole 14.Preferably, in the internal electrical copper facing of described through hole.More preferably, when electroplating, by electroplating process for filling hole, described through hole is filled completely.Certainly, also can be first at the hole wall plated metal of described through hole, to form described the first conductive hole 14, potting resin in described through hole more afterwards; Or after forming described through hole in described through hole filled conductive cream, solidify described conductive paste and form described the first conductive hole 14.
Those skilled in the art it is also understood that, also can first adopt the mode of laser ablation to form blind hole on described copper-clad base plate 10, described blind hole connects described the first copper foil layer 12 and insulating barrier 11, then, adopt and electroplate process for filling hole at the inside of described blind hole filling plated metal, thereby obtain described the first conductive hole 14; Also can adopt out the mode of copper window first in the position that will form described the first conductive hole 14 of described the first copper foil layer 12, to etch open copper window, thereby adopt again afterwards mode ablation on described insulating barrier 11 of laser ablation to form blind hole, then, adopt and electroplate process for filling hole at the inside of described blind hole filling plated metal, thereby obtain described the first conductive hole 14.
The first conductive circuit pattern 15 and the second conductive circuit pattern 16 can be made and be formed by image transfer technique and etch process.
In present embodiment, the first conductive circuit pattern 15 and the second conductive circuit pattern 16 on four described First Line base boards 110 are set according to the actual wiring board that will make, the first conductive circuit pattern 15 in each copper-clad base plate 10 and the second conductive circuit pattern 16 arrange can be identical, also can be different.
The 3rd step, refers to Fig. 3-4, and a described First Line base board 110 in four described First Line base boards 110 is made to second circuit base plate 120.The manufacture method of described the second circuit base plate 120 can comprise the following steps:
First, superimposed the first film 17 and release film 18 successively in the first conductive circuit pattern 15 of described First Line base board 110, the diaphragm 19 of fitting in the second conductive circuit pattern 16 of described First Line base board 110.Secondly; First Line base board 110, the first film 17 and release film 18 and diaphragm 19 described in pre-pressing; described the first film 17 is bonded together with described First Line base board 110, also makes described diaphragm 19 be bonded in described the second conductive circuit pattern 16 simultaneously.Remove described release film 18.Then, form at least one first through hole 20 on described the first film 17, described the first through hole 20 connects described the first film 17, and part the first conductive circuit pattern 15 is exposed from described the first through hole 20 bottoms.Moreover at interior formation the first electric conducting material 21 of described the first through hole 20, thereby described the first electric conducting material 21 conducts mutually with described the first conductive circuit pattern 15.Finally, remove described diaphragm 19, obtain described the second circuit base plate 120.
In the present embodiment, described the first film 17 is semi-solid preparation film, and it can be glass-fiber-fabric prepreg, paper substrate prepreg, composite base prepreg, aramid fiber nonwoven fabrics prepreg, synthetic fibers prepreg or pure resin prepreg etc.
Wherein, the effect of pre-pressing is in order to heat described the first film 17, makes described the first film 17 produce certain viscosity, thereby is bonded together with described First Line base board 110.The temperature that the time of the temperature of the pre-pressing of described the first film 17, the pressure of pre-pressing and pre-pressing all needs much smaller than the pressing of described the first film 17 is, the time that the pressure that pressing needs and pressing need, therefore described the first film 17 after pre-pressing has still retained its semi-solid preparation character.In the present embodiment, the temperature range of the pre-pressing of described the first film 17 is 60-110 ℃, the time range of pre-pressing is 10-60 second, the pressure limit of pre-pressing is 5-15kg/cm2, the pressing-in temp scope of corresponding described the first film 17 is 180-250 ℃, the time range of pressing is 60-120 minute, and the pressure limit of pressing is 200-300 kg/cm2.Preferably, the temperature of the pre-pressing of described the first film 17 is 80 ℃, and the time of pre-pressing is 30 seconds, and the pressure of pre-pressing is 10kg/cm2, and the temperature of pressing is 210 ℃, and the time of pressing is 80 minutes, and the pressure of pressing is 250kg/cm2.
In the present embodiment; described release film 18 is for stepping pulling-on piece (mylar); it is for the protection of described the first film 17, and while preventing pre-pressing, described the first film 17 and the object contacting with it (for example pre-pressing steel plate or tool for stitching used) are bonding and cannot be separated.Described release film 18 also can be for other be as separated type materials such as polyethylene release film or polypropylene release films.
Described diaphragm 19 is for the protection of described the second conductive circuit pattern 16, to prevent that described the second conductive circuit pattern 16 from follow-up pre-pressing or in making the step of the first conductive hole, oxidation and damage occurring.In the present embodiment, described diaphragm 19 comprises polyester film and fits in the low-viscosity glue-line on polyester film.Certainly, polyester film also can, for other are as macromolecule membranes such as polyethylene film, polypropylene screens, only need good thermal endurance.
In the present embodiment, described the first through hole 20 adopts the mode of laser drill to form.In addition, because laser drilling process is to form hole by the first film 17 described in high-octane laser ablation, during ablation, can produce some residues, therefore, preferably, residue after laser drill, described the first through hole 20 carried out to de-smear processing, except can be selected plasma de-smear treatment process or chemical desmear technique etc.
In the present embodiment, adopt the mode of type metal conductive paste at interior filling the first electric conducting material 21 of the first through hole 20.Described metallic conduction cream can, for conductive copper cream, conduction silver paste, conduction tin cream etc., be preferably conductive copper cream.Particularly, first, the mode by metallic conduction cream by silk screen printing is filled in the first through hole 20; Then, conductive metal paste is toasted, described conductive metal paste is solidified, form the first electric conducting material 21.To the temperature of conductive metal paste baking lower than the curing temperature of described the first film 17, thereby do not affect the semi-solid preparation character of described the first film 17.
In addition, before superimposed described the first film 17 and release film 18, preferably, can first to described the first conductive circuit pattern 15, carry out surface coarsening processing, as brown is processed, to strengthen the adhesion between described the first film 17 and described the first conductive circuit pattern 15.
Certainly, also can be according to the wiring board number of plies forming need to make a plurality of described the second circuit base plates 120.
The 4th step, refers to Fig. 5, and two described First Line base boards 110 in four described First Line base boards 110 are made to two tertiary circuit substrates 130.Described in each, the manufacture method of tertiary circuit substrate 130 all can comprise the following steps:
First, superimposed the second film 22 and release film in the first conductive circuit pattern 15 of described First Line base board 110, superimposed the 3rd film 23 and release film in the second conductive circuit pattern 16 of described First Line base board 110.Secondly, First Line base board 110, the second film 22 and the 3rd film 23, be bonded together described the second film 22, described First Line base board 110 and described the 3rd film 23 described in pre-pressing.Then, remove the release film of described First Line base board 110 both sides.Moreover, on described the second film 22, form at least one second through hole 24, described the second through hole 24 connects described the second film 22, and part the first conductive circuit pattern 15 is exposed from described the second through hole 24 bottoms, on described the 3rd film 23, form at least one third through-hole 25, described third through-hole 25 connects described the 3rd film 23, and part the second conductive circuit pattern 16 is exposed from described third through-hole 25 bottoms.Finally, at interior formation the second electric conducting material 26 of described the second through hole 24, and at the interior formation of described third through-hole 25 the 3rd electric conducting material 27, thereby described the second electric conducting material 26 conducts mutually with described the first conductive circuit pattern 15, described the 3rd electric conducting material 27 conducts mutually with described the second conductive circuit pattern 16, obtains described tertiary circuit substrate 130.
In the present embodiment, described second through hole 24 of two tertiary circuit substrates 130 and setting position and the quantity of third through-hole 25 are set according to the actual wiring board that will make, and the second through hole 24 in each tertiary circuit substrate 130 and third through-hole 25 setting positions and quantity can be the same or different.
In addition, this step and above-mentioned the 3rd step are similar, in this step the material of release film and effect all identical with effect with the material of release film 18 in the 3rd step, the condition of pre-pressing and act on also with the condition of pre-pressing in the 3rd step and act on identical.The generation type of described the second through hole 24 and third through-hole 25 also can be identical with the generation type of the first through hole 20 in the 3rd step.Also can be identical with the mode of interior formation the first electric conducting material 21 of the first through hole 20 in the 3rd step in the mode of described the second through hole 24 and interior formation the second electric conducting material 26 of third through-hole 25 and the 3rd electric conducting material 27.In addition, preferably, after laser drill, also described the second through hole 24 and third through-hole 25 are carried out to de-smear processing, to remove the residue in described the second through hole 24 and third through-hole 25, except residue treatment can be selected plasma de-smear treatment process or chemical desmear treatment process etc.Preferably, before superimposed described the second film 22 and the 3rd film 23, also described the first conductive circuit pattern 15 and the second conductive circuit pattern 16 are carried out to surface coarsening processing.
Certainly, also can according to the wiring board number of plies forming need to not form described tertiary circuit substrate 130, or make the described tertiary circuit substrate 130 that forms one or more.
The 5th step, refer to Fig. 6, the first copper foil 28 and the second copper foil 29 are provided, stack gradually and one step press described in the described tertiary circuit substrate of the second copper foil 29,130, described First Line base board 110, described in another, tertiary circuit substrate 130, described second circuit base plate 120 and described the first copper foil 28 become an integral body.In described integral body, described the first copper foil 28 and the second copper foil 29 are respectively the outermost layer conductive layer of described whole both sides, and between adjacent insulating barrier 11, by the second film 22 or the 3rd film 23, be bonded together, between adjacent insulating barrier 11 and Copper Foil, by the first film 17 or the second film 22 or the 3rd film, be bonded together.Particularly, the second film 22 of described the second copper foil 29 and a described tertiary circuit substrate 130 is directly bonding, described First Line base board 110 directly bonds with the 3rd film 23 of the tertiary circuit substrate 130 directly boning with described the second copper foil 29, another one tertiary circuit substrate 130 is between described First Line base board 110 and the first copper foil 28, and directly bond with described First Line base board 110, described the second circuit base plate 120 is between the tertiary circuit substrate 130 and first copper foil 28 far away apart from described the second copper foil 29, described the first copper foil 28 is bonding with the first film 17 of described the second circuit base plate 120.
When alignment stacking described the second copper foil 29, described tertiary circuit substrate 130, described First Line base board 110, tertiary circuit substrate 130 described in another, described second circuit base plate 120 and described the first copper foil 28, should guarantee described tertiary circuit substrate 130, described First Line base board 110, the accurate contraposition described in another between tertiary circuit substrate 130, described second circuit base plate 120.When practical operation, in carrying out stacking process, can be by described tertiary circuit substrate 130, described First Line base board 110, described in another, in tertiary circuit substrate 130, described second circuit base plate 120, registration holes is set respectively, adopt the tool with the alignment pin corresponding with registration holes to carry out contraposition.
In the present embodiment, because relative two surfaces of tertiary circuit substrate 130 described in each have respectively the second film 22 and the 3rd film 23, the surface adjacent with described the second copper foil 29 of described the second circuit base plate 120 has the first film 17, because the heating of semi-solid preparation material has certain mobility, after pressing process, a described tertiary circuit substrate 130, a described First Line base board 110, the first conductive circuit pattern 15 described in each of tertiary circuit substrate 130 and described second circuit base plate 120 described in another, the second conductive circuit pattern 16 is each first film 17 of corresponding embedding all, in the insulating barrier that the second film 22 and the 3rd film 23 form, described the second copper foil 29 is sticky mutually with the second film 22 of a described tertiary circuit substrate 130, described the first copper foil 28 is sticky mutually with the first film 17 of described the second circuit base plate 120, thereby each layer combined closely.
The 6th step, refers to Fig. 7, and the second copper foil 29 is made and formed the 3rd conductive circuit pattern 30, and the first copper foil 28 is made and formed the 4th conductive circuit pattern 31.
Described the 3rd conductive circuit pattern 30 and the 4th conductive circuit pattern 31 can form by image transfer technique and etch process.
The 7th step, refers to Fig. 8, forms the first welding resisting layer 32 on the surface of described the 3rd conductive circuit pattern 30, forms the second welding resisting layer 33 on the surface of described the 4th conductive circuit pattern 31, obtains ten sandwich circuit boards 100.
The first welding resisting layer 32 and the second welding resisting layer 33 can form by the mode of solder-mask printing ink.The first welding resisting layer 32 for the protection of the 3rd conductive circuit pattern 30, the second welding resisting layers 33 for the protection of the 4th conductive circuit pattern 31.
Be understandable that, the manufacture method of the wiring board that the technical program provides also can be applied to the making of the multilayer circuit board of other numbers of plies.Wherein, while making multilayer circuit board, can in described First Line base board 110, the second circuit base plate 120 and tertiary circuit substrate 130 these three kinds of circuit base plates, choose a kind of, two or three combine, the quantity of every kind can be for one or more, certainly, also can select again described first copper foil 28 or select first copper foil 28 and the second copper foil 29 to combine simultaneously, specifically can carry out with reference to following method:
Method one: the method is used to form 2N sandwich circuit board, N is greater than or equal to 4 natural number.Be specially: first, M First Line base board 110(M is more than or equal to 2 natural number, and N is greater than 2M-1), M-1 tertiary circuit substrate 130, (N-2M+1) individual the second circuit base plate 120 aligns and is overlapped into a superimposed substrate, and make two First Line base boards 110 lay respectively at the outermost both sides of described superimposed substrate, or make a First Line base board 110 and second circuit base plate 120 lay respectively at the outermost both sides of described superimposed substrate, or two the second circuit base plates 120 lay respectively at the outermost both sides of described superimposed substrate, and between adjacent insulating barrier 11, there is the first film 17, the second film 22 or the 3rd film 23, secondly, after superimposed substrate described in disposable pressing, obtain 2N sandwich circuit board.In described 2N sandwich circuit board, two First Line base boards 110 lay respectively at the outermost both sides of described 2N sandwich circuit board, or First Line base board 110 and second circuit base plate 120 lay respectively at the outermost both sides of described 2N sandwich circuit board, or two the second circuit base plates 120 lay respectively at the outermost both sides of described 2N sandwich circuit board, and by the first film 17, the second film 22 or the 3rd film 23, be bonded together between adjacent insulating barrier 11.The folding method of described superimposed substrate specifically can be with reference to following embodiment:
The second embodiment: in the present embodiment, M is more than or equal to 2 natural number, and N is greater than 2M-1) described superimposed substrate can form by the following method: first, using a First Line base board 110 in M First Line base board 110 as outermost wire base board, secondly, in remaining M-1 First Line base board 110 and M-1 tertiary circuit substrate 130, by a tertiary circuit substrate 130 and first stackable unit that only has two circuit base plates of the stacking formation of First Line base board 110, thereby obtain M-1 the first stackable unit, then, by N-2M+1 second stackable unit that only has the second circuit base plate 120 of the stacking formation of the second circuit base plate 120, described the second stackable unit can comprise one or more the second circuit base plates 120, finally, M-1 described the first stackable unit and described the second stackable unit are stacked on the First Line base board 110 of outermost wire base board, and make tertiary circuit substrate 130 in each first stackable unit all the First Line base board 110 in more corresponding the first stackable unit near the First Line base board 110 as outermost wire base board, make the second conductive circuit pattern 16 of more corresponding second circuit base plate 120 of the first film 17 of the second circuit base plate 120 described in each in described the second stackable unit all near the First Line base board 110 as outermost wire base board, thereby obtain described stacking substrates.
Certainly, the stack manner of M-1 described the first stackable unit and described second stackable unit has multiple, is specifically as follows: described the second stackable unit can be between adjacent described the first stackable unit and the described First Line base board 110 as outermost wire base board; Described the second stackable unit also can be adjacent two between described the first stackable unit; Described the second stackable unit also can be positioned on the First Line base board 110 apart from the first stackable unit farthest of the First Line base board 110 as outermost wire base board.
When the multilayer circuit board in the present embodiment is increased layer or subtracted layer, only need in described superimposed substrate, increase or reduce the quantity of described the first stackable unit; Or in described superimposed substrate, increase or reduce the quantity of described the second stackable unit; Or in described superimposed substrate, increase or reduce the quantity of described the second circuit base plate 120 in described the second stackable unit.
It will be appreciated by those skilled in the art that, when the multilayer circuit board in the present embodiment is increased layer or is subtracted layer, one or more the second circuit base plates 120 can also superpose on the First Line base board 110 as outermost wire base board of the superimposed substrate of described multilayer circuit board that the present embodiment forms, thereby obtain a new multilayer circuit board, in described new multilayer circuit board, First Line base board 110 and second circuit base plate 120 are respectively the outermost wire base board of described new multilayer circuit board both sides, or two the second circuit base plates 120 are respectively the outermost wire base board of described new multilayer circuit board both sides.
Refer to Fig. 9, below with N=7, the structure of 14 sandwich circuit boards 200 that a kind of stack manner by the second embodiment during M=3 obtains is that example describes the present embodiment.Described 14 sandwich circuit boards 200 are by three First Line base boards 110, two tertiary circuit substrates 130 and two the second circuit base plates 120 are alignd and are overlapped into a superimposed substrate, and after superimposed substrate, form described in one step press.In described 14 sandwich circuit boards 200, two First Line base boards 110 lay respectively at the outermost both sides of described 14 sandwich circuit boards 200, and by the first film 17, the second film 22 or the 3rd film 23, are bonded together between adjacent insulating barrier 11.Concrete, the superimposed substrate of described 14 sandwich circuit boards 200 can form by the following method: first, outermost wire base board using a First Line base board 110 as described superimposed substrate, in remaining two First Line base boards 110 and two tertiary circuit substrates 130, by a First Line base board 110 and first stackable unit of the stacking formation of tertiary circuit substrate 130, thereby obtain two the first stackable unit, and by second stackable unit of two one the stacking formation of the second circuit base plate 120, secondly, one in described the second stackable unit described the second circuit base plate 120 is directly affixed with the First Line base board 110 as outermost wire base board, two the first stackable unit stack gradually on the second circuit base plate 120 farthest of the First Line base board 110 apart from as outermost wire base board, make tertiary circuit substrate 130 in each first stackable unit all the First Line base board 110 in more corresponding the first stackable unit near the First Line base board 110 as outermost wire base board, described in each the first film 17 of the second circuit base plate 120 all the second conductive circuit pattern 16 of more corresponding the second circuit base plate 120 all near the First Line base board 110 as outermost wire base board, thereby obtain described superimposed substrate.
The 3rd embodiment: in the present embodiment, M is more than or equal to 2 natural number, and N=3M-2) described superimposed substrate can form by the following method: first, and using a First Line base board 110 in M First Line base board 110 as outermost wire base board; Secondly, in remaining M-1 First Line base board 110, M-1 the second circuit base plate 120 and M-1 tertiary circuit substrate 130, a First Line base board 110, second circuit base plate 120 and one of a stacking formation of tertiary circuit substrate 130 are only had to the 3rd stackable unit of three circuit base plates, thereby obtain (M-1) individual the 3rd stackable unit; Finally, M-1 described the 3rd stackable unit is stacked on the First Line base board 110 of outermost wire base board, and make tertiary circuit substrate 130 in each the 3rd stackable unit all the First Line base board 110 in more corresponding the 3rd stackable unit near the First Line base board 110 as outermost wire base board, thereby obtain described superimposed substrate.
Certainly, the stack manner of three circuit base plates in described the 3rd stackable unit has multiple, be specifically as follows: in each the 3rd stackable unit, described tertiary circuit substrate 130 is arranged between adjacent First Line base board 110 and the second circuit base plate 120, now, in formed superimposed substrate, the tertiary circuit substrate 130 in more corresponding the 3rd stackable unit of the second circuit base plate 120 in each the 3rd stackable unit is near the First Line base board 110 as outermost wire base board; Or in each the 3rd stackable unit, described First Line base board 110 is arranged between adjacent tertiary circuit substrate 130 and the second circuit base plate 120, now, in formed superimposed substrate, the second circuit base plate 120 in more corresponding the 3rd stackable unit of tertiary circuit substrate 130 in each the 3rd stackable unit is near the First Line base board 110 as outermost wire base board; Or in each the 3rd stackable unit, the second circuit base plate 120 in described the 3rd stackable unit is arranged between adjacent tertiary circuit substrate 130 and First Line base board 110, now, in formed superimposed substrate, described First Line base board 110 is directly affixed with described the first film 17, and the second circuit base plate 120 in more corresponding the 3rd stackable unit of the tertiary circuit substrate 130 in each the 3rd stackable unit is near the First Line base board 110 as outermost wire base board.
When the multilayer circuit board in the present embodiment is increased layer or subtracted layer, only need in described superimposed substrate, increase or reduce the quantity of described the 3rd stackable unit.
It will be appreciated by those skilled in the art that, when the multilayer circuit board in the present embodiment is increased layer or is subtracted layer, can also in described superimposed substrate, increase one or more as the second stackable unit as described in the second embodiment, the quantity of described the second circuit base plate 120 in described the second stackable unit can be for one or more, described the second stackable unit can be between adjacent described the 3rd stackable unit and the described First Line base board 110 as outermost wire base board, also can be adjacent two between described the 3rd stackable unit, also can be stacked in apart from the 3rd stackable unit farthest of the First Line base board 110 as outermost wire base board.Those skilled in the art are further appreciated that when the multilayer circuit board in the present embodiment is increased layer or subtracted layer, can also in described superimposed substrate, increase one or more as the first stackable unit as described in the second embodiment.Those skilled in the art are further appreciated that when the multilayer circuit board in the present embodiment is increased layer or subtracted layer, can also in described superimposed substrate, increase as the first stackable unit and the second stackable unit as described in the second embodiment simultaneously.
In addition, those skilled in the art it is also understood that, when the multilayer circuit board in the present embodiment is increased layer or is subtracted layer, can also the superimposed substrate of the formed described multilayer circuit board of the present embodiment as the First Line base board 110 of outermost wire base board on or one or more the second circuit base plates 120 that carry out at the present embodiment superposeing on the First Line base board 110 as outermost wire base board of superimposed substrate of the multilayer circuit board that above-mentioned increasing layer forms afterwards, thereby obtain a new multilayer circuit board, in described new multilayer circuit board, First Line base board 110 and second circuit base plate 120 are respectively the outermost wire base board of described new multilayer circuit board both sides, or two the second circuit base plates 120 are respectively the outermost wire base board of described new multilayer circuit board both sides.
Refer to Figure 10, below with N=7, the structure of 14 sandwich circuit boards 210 that a kind of stack manner by the 3rd embodiment during M=3 obtains is that example describes the present embodiment.Described 14 sandwich circuit boards 210 are by three First Line base boards 110, two tertiary circuit substrates 130 and two the second circuit base plates 120 are alignd and are overlapped into a superimposed substrate, and after superimposed substrate, form described in one step press.In described 14 sandwich circuit boards 210, a First Line base board 110 and second circuit base plate 120 lay respectively at the outermost both sides of described 14 sandwich circuit boards 210, and by the first film 17, the second film 22 or the 3rd film 23, are bonded together between adjacent insulating barrier 11.Concrete, the superimposed substrate of described 14 sandwich circuit boards 210 can form by the following method: by second circuit base plate 120, a tertiary circuit substrate 130 and a First Line base board 110 stack gradually into the 3rd stackable unit that only has three circuit base plates, make First Line base board 110 in described the 3rd stackable unit between adjacent tertiary circuit substrate 130 and the second circuit base plate 120, two described the 3rd stackable unit cycle arrangement are also stacked on the First Line base board 110 as outermost wire base board, and make the close First Line base board 110 as outermost wire base board of the second circuit base plate 120 in more corresponding the 3rd stackable unit of tertiary circuit substrate 130 in each the 3rd stackable unit, thereby obtain described superimposed substrate.
Method two: the method is used to form 2N+1 sandwich circuit board, N is greater than or equal to 3 natural number.Be specially: first, by M First Line base board 110(M, it is natural number, and N is greater than 2M), M tertiary circuit substrate 130, N-2M the second circuit base plate 120 and first copper foil 28 align and are overlapped into a superimposed substrate, and make described the first copper foil 28 be positioned at outermost one side of described superimposed substrate, described First Line base board 110 or described the second circuit base plate 120 are positioned at the outermost opposite side of described superimposed substrate, and between adjacent insulating barrier 11, there is the first film 17, the second film 22 or the 3rd film 23, between adjacent insulating barrier 11 and the first copper foil 28, there are the first film 17 or the second film 22, secondly, after superimposed substrate described in disposable pressing, obtain 2N+1 sandwich circuit substrate, in described 2N+1 sandwich circuit substrate, described the first copper foil 28 is positioned at outermost one side of described 2N+1 sandwich circuit substrate, described First Line base board 110 or described the second circuit base plate 120 are positioned at the outermost opposite side of described 2N+1 sandwich circuit substrate, and between adjacent insulating barrier 11, by the first film 17, the second film 22 or the 3rd film 23, be bonded together, between adjacent insulating barrier 11 and the first copper foil 28, by the first film 17 or the second film 22, be bonded together, finally, more described first copper foil 28 of above-mentioned 2N+1 sandwich circuit substrate is formed to conductive circuit pattern through selective etch, obtain 2N+1 sandwich circuit board.The folding method of described superimposed substrate specifically can be with reference to following embodiment:
The 4th embodiment: in the present embodiment, M is more than or equal to 1 natural number, and N is greater than 2M, described superimposed substrate can form by the following method: first, by a tertiary circuit substrate 130 and first stackable unit that only has two circuit base plates of the stacking formation of First Line base board 110, thereby obtain M the first stackable unit; Secondly, by N-2M second stackable unit of the stacking formation of described the second circuit base plate 120; Finally, M described the first stackable unit and described the second stackable unit are stacked on described the first copper foil 28, and make tertiary circuit substrate 130 in each first stackable unit all the First Line base board 110 in more corresponding the first stackable unit near described the first copper foil 28, described in each in described the second stackable unit, the second conductive circuit pattern 16 of more corresponding second circuit base plate 120 of the first film 17 of the second circuit base plate 120 is all near described the first copper foil 28, thereby obtains described superimposed substrate.
Certainly, the stack manner of M described the first stackable unit and described second stackable unit has multiple, is specifically as follows: described the second stackable unit can be between adjacent described the first stackable unit and described the first copper foil 28; Described the second stackable unit also can be adjacent two between described the first stackable unit; Described the second stackable unit also can be stacked on the First Line base board 110 of described the first copper foil 28 of distance the first stackable unit farthest.
When the multilayer circuit board in the present embodiment is increased layer or subtracted layer, only need in described superimposed substrate, increase or reduce the quantity of described the first stackable unit; Or in described superimposed substrate, increase or reduce the quantity of described the second stackable unit; Or in described superimposed substrate, increase or reduce the quantity of described the second circuit base plate 120 in described the second stackable unit.
Refer to Figure 11, below with N=6, the structure of the 13 sandwich circuit substrates 220 that a kind of stack manner by the 4th embodiment during M=3 obtains is that example describes the present embodiment.Described 13 sandwich circuit substrates 220 are by two First Line base boards 110, two tertiary circuit substrates 130, two the second circuit base plates 120 and first copper foil 28 are alignd and be overlapped into a superimposed substrate, and after superimposed substrate, form described in one step press.In described 13 sandwich circuit substrates 220, described the first copper foil 28 is positioned at outermost one side of described 13 sandwich circuit substrates 220, described the second circuit base plate 120 is the outermost opposite side of described 13 sandwich circuit substrates 220, and between adjacent insulating barrier 11, by the first film 17, the second film 22 or the 3rd film 23, be bonded together, between adjacent insulating barrier 11 and the first copper foil 28, by the 3rd film 23, be bonded together.Concrete, the superimposed substrate of described 13 sandwich circuit substrates 220 can form by the following method: by a First Line base board 110 and first stackable unit of the stacking formation of tertiary circuit substrate 130, thereby obtain two the first stackable unit, by second stackable unit of two the stacking formation of the second circuit base plate 120, two described the first stackable unit are stacked gradually on described the first copper foil, make tertiary circuit substrate 130 in each first stackable unit all the First Line base board 110 in more corresponding the first stackable unit near the first copper foil 28, described the second stackable unit is stacked on the First Line base board 110 of described the first copper foil 28 of distance the first stackable unit farthest, and make the second conductive circuit pattern 16 of more corresponding second circuit base plate 120 of the first film 17 of the second circuit base plate 120 described in each all near described the first copper foil 28, thereby obtain described superimposed substrate.
The 5th embodiment: in the present embodiment, M is more than or equal to 1 natural number, and N=3M, described superimposed substrate can form by the following method: a First Line base board 110, second circuit base plate 120 and a tertiary circuit substrate 130 are stacked into the 3rd stackable unit that only has three circuit base plates, thereby form M the 3rd stackable unit; M described the 3rd stackable unit is stacked on described the first copper foil 28, and, make tertiary circuit substrate 130 in each the 3rd stackable unit all the First Line base board 110 in more corresponding the 3rd stackable unit near described the first copper foil 28, thereby obtain described stacking substrates.
Certainly, the stack manner of three circuit base plates in described the 3rd stackable unit has multiple, be specifically as follows: in each the 3rd stackable unit, described tertiary circuit substrate 130 is arranged between adjacent First Line base board 110 and the second circuit base plate 120, now, in formed superimposed substrate, the tertiary circuit substrate 130 in more corresponding the 3rd stackable unit of the second circuit base plate 120 in each the 3rd stackable unit is near described the first copper foil 28; Or in each the 3rd stackable unit, described First Line base board 110 is arranged between adjacent tertiary circuit substrate 130 and the second circuit base plate 120, now, in formed superimposed substrate, the second circuit base plate 120 in more corresponding the 3rd stackable unit of tertiary circuit substrate 130 in each the 3rd stackable unit is near described the first copper foil 28; Or in each the 3rd superimposed unit, the second circuit base plate 120 is arranged between adjacent tertiary circuit substrate 130 and First Line base board 110, now, in formed superimposed substrate, described First Line base board 110 is directly affixed with described the first film 17, and the second circuit base plate in more corresponding the 3rd stackable unit of the tertiary circuit substrate 130 in each the 3rd stackable unit is near described the first copper foil 28.
When the multilayer circuit board in the present embodiment is increased layer or subtracted layer, only need in described superimposed substrate, increase or reduce the quantity of described the 3rd stackable unit.
It will be appreciated by those skilled in the art that, when the multilayer circuit board in the present embodiment is increased layer or is subtracted layer, can also in described superimposed substrate, increase one or more as the second stackable unit as described in the second embodiment, the quantity of described the second circuit base plate 120 in described the second stackable unit can be for one or more, wherein, described the second stackable unit can be between adjacent described the 3rd stackable unit and described the first copper foil 28, also can be adjacent two between described the 3rd stackable unit, also can be stacked in described the first copper foil 28 of distance the 3rd stackable unit farthest.Those skilled in the art are further appreciated that when the multilayer circuit board in the present embodiment is increased layer or subtracted layer, can also in described superimposed substrate, increase one or more as the first stackable unit as described in the second embodiment.Those skilled in the art are further appreciated that when the multilayer circuit board in the present embodiment is increased layer or subtracted layer, can also in described superimposed substrate, increase as the first stackable unit and the second stackable unit as described in the second embodiment simultaneously.
Refer to Figure 12, below with N=6, the structure of the 13 sandwich circuit substrates 230 that a kind of stack manner by the 5th embodiment during M=2 obtains is that example describes the present embodiment.Described 13 sandwich circuit substrates 230 are by two First Line base boards 110, two tertiary circuit substrates 130, two the second circuit base plates 120 and first copper foil 28 are alignd and be overlapped into a superimposed substrate, and after superimposed substrate, form described in one step press.In described 13 sandwich circuit substrates 230, described the first copper foil 28 is positioned at outermost one side of described 13 sandwich circuit substrates 230, a First Line base board 110 is the outermost opposite side of described 13 sandwich circuit boards 230, and between adjacent insulating barrier 11, by the first film 17, the second film 22 or the 3rd film 23, be bonded together, between adjacent insulating barrier 11 and the first copper foil 28, by the first film 17, be bonded together.Concrete, the superimposed substrate of described 13 sandwich circuit substrates 230 can form by the following method: by second circuit base plate 120, a tertiary circuit substrate 130 and a First Line base board 110 stack gradually into the 3rd stackable unit that only has three circuit base plates, make tertiary circuit substrate 130 in described the 3rd stackable unit between First Line base board 110 and the second circuit base plate 120, by two described the 3rd stackable unit cycle arrangement and be stacked on described the first copper foil 28, and make tertiary circuit substrate 130 in more corresponding the 3rd stackable unit of the second circuit base plate 120 in each the 3rd stackable unit near described the first copper foil 28, thereby obtain described superimposed substrate.
Method three: the method is used to form 2N+2 sandwich circuit board, N is greater than or equal to 4 natural number.Be specially: first, by M First Line base board 110(M, it is natural number, and N is greater than 2M+1), M+1 tertiary circuit substrate 130, N-2M-1 the second circuit base plate 120, first copper foil 28 and second copper foil 29 align and are overlapped into a superimposed substrate, and make described the first copper foil 28 and the second copper foil 29 lay respectively at the outermost both sides layer conductive layer of described superimposed substrate, and between adjacent insulating barrier 11, there is the first film 17, the second film 22 or the 3rd film 23, between adjacent insulating barrier 11 and the first copper foil 28 and between adjacent insulating barrier 11 and the second copper foil 29, all there are the first film 17 or the second film 22 or the 3rd film, secondly, after superimposed substrate described in disposable pressing, obtain 2N+2 sandwich circuit substrate, in described 2N+2 sandwich circuit substrate, described the first copper foil 28 and described the second copper foil 29 lay respectively at the outermost both sides of described 2N+2 sandwich circuit substrate, and between adjacent insulating barrier 11, by the first film 17, the second film 22 or the 3rd film 23, be bonded together, all by the first film 17 or the second film 22 or the 3rd film 23, be bonded together between adjacent insulating barrier 11 and the first copper foil 28 and between adjacent insulating barrier 11 and the second copper foil 29, finally, described first copper foil 28 of above-mentioned 2N+2 sandwich circuit substrate and the second copper foil 29 are formed to conductive circuit pattern via selective etch respectively, obtain 2N+2 sandwich circuit board.The folding method of described superimposed substrate specifically can be with reference to following embodiment:
The 6th embodiment: in the present embodiment, M is more than or equal to 1 natural number, and N is greater than 2M+1, described superimposed substrate can form by the following method: first, a tertiary circuit substrate 130 and a First Line base board 110 are stacked into first stackable unit that only has two circuit base plates, thereby form M the first stackable unit, secondly, by N-2M-1 second stackable unit of the stacking formation of described the second circuit base plate 120, finally, by a remaining tertiary circuit substrate 130, M described the first stackable unit and described second stackable unit are stacked between described the first copper foil 28 and the second copper foil 29, so that a described remaining tertiary circuit substrate 130 is directly affixed with described the second copper foil 29, tertiary circuit substrate 130 in each first stackable unit all the First Line base board 110 in more corresponding the first stackable unit near described the first copper foil 28, described in each, the second conductive circuit pattern 16 of more corresponding second circuit base plate 120 of the first film 17 of the second circuit base plate 120 is all near described the first copper foil 28, thereby obtain described superimposed substrate.
Certainly, the stack manner of M described the first stackable unit and described second stackable unit has multiple, is specifically as follows: described the second stackable unit can be between adjacent described the first stackable unit and described the first copper foil 28; Described the second stackable unit also can be adjacent two between described the first stackable unit; Described the second stackable unit also can be positioned on the First Line base board 110 of described the first copper foil 28 of distance the first stackable unit farthest.
When the multilayer circuit board in the present embodiment is increased layer or subtracted layer, only need in described superimposed substrate, increase or reduce the quantity of described the first stackable unit; Or in described superimposed substrate, increase or reduce the quantity of described the second stackable unit; Or in described superimposed substrate, increase or reduce the quantity of described the second circuit base plate 120 in described the second stackable unit.
Refer to Figure 13, below with N=7, the structure of the 16 sandwich circuit substrates 240 that a kind of stack manner by the 6th embodiment during M=3 obtains is that example describes the present embodiment.Described 16 sandwich circuit substrates 240 are by two First Line base boards 110, three tertiary circuit substrates 130, two the second circuit base plates 120, first copper foil 28 and second copper foil 29 are alignd and be overlapped into a superimposed substrate, and after superimposed substrate, form described in one step press.In described 16 sandwich circuit substrates 240, described the first copper foil 28 and the second copper foil 29 lay respectively at the outermost both sides of described 16 sandwich circuit substrates, and between adjacent insulating barrier 11, by the first film 17, the second film 22 or the 3rd film 23, be bonded together, between adjacent insulating barrier 11 and the first copper foil 28 and adjacent insulating barrier 11 and the second copper foil 29, all by the first film 17 or the second film 22 or the 3rd film 23, be bonded together.Concrete, the superimposed substrate of described 16 sandwich circuit substrates 240 can form by the following method: by a First Line base board 110 and first stackable unit of the stacking formation of tertiary circuit substrate 130, thereby obtain two the first stackable unit, second stackable unit of two one the stacking formation of the second circuit base plate 120, by a remaining tertiary circuit substrate 130 and M described the first stackable unit, described second stackable unit is stacked between described the first copper foil 28 and the second copper foil 29, and a described remaining tertiary circuit substrate 130 is directly affixed with described the second copper foil 29, described second circuit base plate 120 in described the second stackable unit is directly affixed with described the first copper foil 28, and described in each, the second conductive circuit pattern 16 of more corresponding second circuit base plate 120 of the first film 17 of the second circuit base plate 120 is all near described the first copper foil, two the first stackable unit stack gradually on described the first copper foil 28 of distance the second circuit base plate 120 farthest, and the tertiary circuit substrate 130 in each first stackable unit all the First Line base board 110 in more corresponding the first stackable unit near the first copper foil 28, thereby obtain described superimposed substrate.
The 7th embodiment: in the present embodiment, M is more than or equal to 1 natural number, and N=3M+1, described superimposed substrate can form by the following method: first, a First Line base board 110, second circuit base plate 120 and a tertiary circuit substrate 130 are stacked into the 3rd stackable unit that only has three circuit base plates, thereby form M the 3rd stackable unit, secondly, by a remaining tertiary circuit substrate 130, M described the 3rd stackable unit is stacked between described the first copper foil 28 and the second copper foil 29, and a described remaining tertiary circuit substrate 130 is directly affixed with described the second copper foil 29, M described the 3rd stackable unit is stacked between described the first copper foil 28 and a described remaining tertiary circuit substrate 130, and make, tertiary circuit substrate 130 in each the 3rd stackable unit all the First Line base board 110 in more corresponding the 3rd stackable unit near described the first copper foil 28, thereby obtain described stacking substrates.
Certainly, the stack manner of three circuit base plates in described the 3rd stackable unit has multiple, be specifically as follows: described in each in the 3rd stackable unit, described tertiary circuit substrate 130 is arranged between adjacent First Line base board 110 and the second circuit base plate 120, now, in formed superimposed substrate, the tertiary circuit substrate 130 in more corresponding the 3rd stackable unit of the second circuit base plate 120 in each the 3rd stackable unit is near described the first copper foil 28; Or described in each in the 3rd stackable unit, described First Line base board 110 is arranged between adjacent tertiary circuit substrate 130 and the second circuit base plate 120, now, in formed superimposed substrate, the second circuit base plate 120 in more corresponding the 3rd stackable unit of tertiary circuit substrate 130 in each the 3rd stackable unit is near described the first copper foil 28; Or described in each in the 3rd stackable unit, the second circuit base plate 120 is arranged between adjacent tertiary circuit substrate 130 and First Line base board 110, now, in formed superimposed substrate, more corresponding the second circuit base plate 120 of tertiary circuit substrate 130 in each the 3rd stackable unit is near described the first copper foil 28.
When the multilayer circuit board in the present embodiment is increased layer or subtracted layer, only need in described superimposed substrate, increase or reduce the quantity of described the 3rd stackable unit.
It will be appreciated by those skilled in the art that, when the multilayer circuit board in the present embodiment is increased layer or is subtracted layer, can also in described superimposed substrate, increase one or more as the second stackable unit as described in the second embodiment, the quantity of described second circuit base plate 120 of described the second stackable unit can be for one or more, described the second stackable unit can be between adjacent described the 3rd stackable unit and described the first copper foil 28, described the second stackable unit also can be adjacent two between described the 3rd stackable unit, described the second stackable unit also can be between described the first copper foil 28 of distance the 3rd stackable unit and a described remaining tertiary circuit substrate 130 farthest, described the second stackable unit also can be between described the second copper foil 29 and a described remaining described tertiary circuit substrate 130.Those skilled in the art are further appreciated that when the multilayer circuit board in the present embodiment is increased layer or subtracted layer, can also in described superimposed substrate, increase one or more as in the first stackable unit as described in the second embodiment.Those skilled in the art are further appreciated that when the multilayer circuit board in the present embodiment is increased layer or subtracted layer, can also in described superimposed substrate, increase as in the first stackable unit as described in the second embodiment and the second stackable unit simultaneously.
Refer to Figure 14, below with N=7, the structure of the 16 sandwich circuit substrates 250 that a kind of stack manner by the 7th embodiment during M=2 obtains is that example describes the present embodiment.Described 16 sandwich circuit substrates 250 are by two First Line base boards 110, three tertiary circuit substrates 130, two the second circuit base plates 120, first copper foil 28 and second copper foil 29 are alignd and be overlapped into a superimposed substrate, and after superimposed substrate, form described in one step press.In described 16 sandwich circuit substrates 250, described the first copper foil 28 and the second copper foil 29 lay respectively at the outermost both sides of described 16 sandwich circuit substrates, and between adjacent insulating barrier 11, by the first film 17, the second film 22 or the 3rd film 23, be bonded together, between adjacent insulating barrier 11 and the first copper foil 28 and between adjacent insulating barrier 11 and the second copper foil 29, all by the second film 22 or the 3rd film, be bonded together.Concrete, the superimposed substrate of described 16 sandwich circuit substrates 250 can form by the following method: second circuit base plate 120, a tertiary circuit substrate 130 and a First Line base board 110 are stacked gradually into the 3rd stackable unit that only has three circuit base plates, make described in each in the 3rd stackable unit, described First Line base board 110 is between adjacent described the second circuit base plate 120 and tertiary circuit substrate 130, by a remaining tertiary circuit substrate 130, two described the first stackable unit are stacked between described the first copper foil 28 and the second copper foil 29, a described remaining tertiary circuit substrate 130 is directly affixed with described the second copper foil 29, make two described the 3rd stackable unit cycle arrangement and be stacked in described the first copper foil 28 and a described remaining tertiary circuit substrate 130 between, and make the second circuit base plate 120 in more corresponding the 3rd stackable unit of tertiary circuit substrate 130 in each the 3rd stackable unit near described the first copper foil 28, thereby obtain described superimposed substrate.
Method three: the method is used to form 2N+2 sandwich circuit board, N is more than or equal to 1 natural number.Be specially: N the second circuit base plate 120, a First Line base board 110 are alignd and be overlapped into a superimposed substrate, the first film 17 that makes the second circuit base plate 120 described in each is compared with the equal more close described First Line base board 110 of the second conductive circuit pattern 16, after superimposed substrate described in disposable pressing, obtain 2N+2 sandwich circuit substrate, obtain 2N+2 sandwich circuit board.In described 2N+2 sandwich circuit board, between adjacent insulating barrier 11, by the first film 17, be bonded together.
Certainly, the stack manner of N described the second circuit base plate 120 and a First Line base board 110 has multiple, be specifically as follows: described First Line base board 110 is arranged between two adjacent the second circuit base plates 120, and described in each the first film 17 of the second circuit base plate 120 compared with the equal more close described First Line base board 110 of the second conductive circuit pattern 16; Or the outermost wire base board using described First Line base board 110 as described superimposed substrate, N described the second circuit base plate 120 stacks gradually the side in described First Line base board 110.
When the multilayer circuit board in the present embodiment is increased layer or subtracted layer, only need in described superimposed substrate, increase or reduce the quantity of described the second circuit base plate 120.
The 8th embodiment, refers to Figure 15, below the structure of eight sandwich circuit boards 260 that obtain by this method three while take N=3 the present embodiment is described as example.Described eight sandwich circuit boards 260 can form by the following method: first, a First Line base board 110 is alignd and is overlapped into a superimposed substrate with three the second circuit base plates 120, make described First Line base board 110 be positioned at outermost one side of described superimposed substrate, and described in each the first film 17 of the second circuit base plate 120 compared with the equal more close described First Line base board 110 of the second conductive circuit pattern 16; Secondly, superimposed substrate described in one step press, can obtain described eight sandwich circuit boards 260.
Certainly, also can be not limited to said method one arranging to method three.
Be understandable that, said method one to the superimposed substrate that method three forms is carrying out one step press and Copper Foil is being formed to conductive circuit pattern (if having this step) afterwards, can also be included in the step that the conductive circuit pattern surface of exposing from both sides after pressing forms welding resisting layer.
The manufacturing method of multi-layer circuit board that the technical program provides is made a plurality of circuit base plates simultaneously, and then the mode by laminating forms film on one or two surface of partial line base board, and in film, forms through hole and be formed with electric conducting material.Like this, as required, stacking Copper Foil, be fitted with the circuit base plate of film and electric conducting material and be not fitted with the circuit base plate of film, thereby just can obtain multilayer circuit board by one step press.Because a plurality of circuit base plates can be made simultaneously, thereby can shorten the time that wiring board is made.Because each circuit base plate is made separately respectively, than the mode of stack successively in prior art, can improve the yield that wiring board is made.
Be understandable that, for the person of ordinary skill of the art, can make other various corresponding changes and distortion by technical conceive according to the present invention, and all these change and distortion all should belong to the protection range of the claims in the present invention.
Claims (24)
1. a manufacture method for multilayer circuit board, comprises step:
N copper-clad base plate is provided, and wherein, N is greater than or equal to 4 natural number, and described in each, copper-clad base plate comprises insulating barrier and fits in the first copper foil layer and second copper foil layer of the relative both sides of described insulating barrier;
The first copper foil layer of copper-clad base plate described in each is made and formed the first conductive circuit pattern, the second copper foil layer of copper-clad base plate described in each is made and formed the second conductive circuit pattern, and described the first conductive circuit pattern and the second conductive circuit pattern conduct mutually by least one conductive hole, thereby N described copper-clad base plate made to N First Line base board;
In N described First Line base board, get N-2M+1 First Line base board, wherein, M is more than or equal to 2 natural number, and N is greater than 2M-1, the first conductive circuit pattern surface label described in each in N-2M+1 described First Line base board in First Line base board is unified the first film, described the first film has at least one first through hole, in described at least one first through hole, fill the first electric conducting material, described the first electric conducting material and adjacent the first conductive circuit pattern conduct mutually, thereby N-2M+1 First Line base board made to N-2M+1 the second circuit base plate,
In N described First Line base board, get M-1 First Line base board, first conductive circuit pattern surface laminating the second film in each First Line base board in M-1 described First Line base board, the second conductive circuit pattern surface laminating the 3rd film in each First Line base board in M-1 described First Line base board, described the second film has at least one second through hole, described the 3rd film has at least one third through-hole, and fill the second electric conducting material in described at least one second through hole, described the second electric conducting material and adjacent the first conductive circuit pattern conduct mutually, in described at least one third through-hole, fill the 3rd electric conducting material, described the 3rd electric conducting material and adjacent the second conductive circuit pattern conduct mutually, thereby M-1 described First Line base board made to M-1 tertiary circuit substrate, and
The remaining M of an one step press First Line base board, described N-2M+1 the second circuit base plate and described M-1 tertiary circuit substrate are to form 2N sandwich circuit board, in described 2N sandwich circuit board, between adjacent insulating barrier, by the first film, the second film or the 3rd film, be bonded together, and, two First Line base boards are positioned at the outermost both sides of described 2N sandwich circuit board, or First Line base board and second circuit base plate are positioned at the outermost both sides of described 2N sandwich circuit board, or two the second circuit base plates are positioned at the outermost both sides of described 2N sandwich circuit board.
2. the manufacture method of multilayer circuit board as claimed in claim 1, it is characterized in that, before the remaining M of a pressing First Line base board, described N-2M+1 the second circuit base plate and described M-1 tertiary circuit substrate are with formation 2N sandwich circuit board, alignment a stacking described remaining M First Line base board, described N-2M+1 the second circuit base plate and described M-1 tertiary circuit substrate are to form superimposed substrate, and the formation method of described superimposed substrate comprises step:
Outermost wire base board using a First Line base board in M First Line base board as described superimposed substrate; In remaining M-1 First Line base board and M-1 tertiary circuit substrate, by a tertiary circuit substrate and first stackable unit that only has two circuit base plates of the stacking formation of First Line base board, thereby obtain M-1 the first stackable unit;
By N-2M+1 second stackable unit of the stacking formation of described the second circuit base plate;
M-1 described the first stackable unit and described second stackable unit are stacked on the First Line base board of outermost wire base board, and make tertiary circuit substrate in each first stackable unit all the First Line base board in more corresponding the first stackable unit near the First Line base board as outermost wire base board, make the second conductive circuit pattern of more corresponding second circuit base plate of the first film of the second circuit base plate described in each in described the second stackable unit all near the First Line base board as outermost wire base board, thereby obtain described superimposed substrate.
3. the manufacture method of multilayer circuit board as claimed in claim 2, it is characterized in that, M-1 described the first stackable unit and described the second stackable unit are being stacked in the step on the First Line base board of outermost wire base board, described the second stackable unit is between adjacent described the first stackable unit and the described First Line base board as outermost wire base board, or described the second stackable unit is between two adjacent described the first stackable unit, or described the second stackable unit is stacked on the First Line base board apart from the first stackable unit farthest of the First Line base board as outermost wire base board.
4. the manufacture method of multilayer circuit board as claimed in claim 1, it is characterized in that, N=3M-2, before the remaining M of a pressing First Line base board, described N-2M+1 the second circuit base plate and described M-1 tertiary circuit substrate are with formation 2N sandwich circuit board, alignment a stacking described remaining M First Line base board, described N-2M+1 the second circuit base plate and described M-1 tertiary circuit substrate are to form superimposed substrate, and the formation method of described superimposed substrate comprises step:
Using a First Line base board in M First Line base board as outermost wire base board;
In remaining M-1 First Line base board, M-1 the second circuit base plate, a M-1 tertiary circuit substrate, a First Line base board, second circuit base plate and one of a stacking formation of tertiary circuit substrate are only had to the 3rd stackable unit of three circuit base plates, thereby obtain M-1 the 3rd stackable unit;
M-1 described the 3rd stackable unit is stacked on the First Line base board of outermost wire base board, and make tertiary circuit substrate in each the 3rd stackable unit all the First Line base board in more corresponding the 3rd stackable unit near the First Line base board as outermost wire base board, thereby obtain described superimposed substrate.
5. the manufacture method of multilayer circuit board as claimed in claim 4, it is characterized in that, in described the 3rd stackable unit, described tertiary circuit substrate is arranged between adjacent First Line base board and the second circuit base plate, or described First Line base board is arranged between adjacent tertiary circuit substrate and the second circuit base plate, or described the second circuit base plate is arranged between adjacent tertiary circuit substrate and First Line base board.
6. the manufacture method of multilayer circuit board as claimed in claim 1, is characterized in that, N-2M+1 First Line base board is made to N-2M+1 the second circuit base plate and comprise step:
Superimposed described the first film and a release film successively in each first conductive circuit pattern in N-2M+1 described First Line base board, each the second conductive circuit pattern surface label unification diaphragm in N-2M+1 described First Line base board;
First Line base board, the first film, release film and diaphragm described in pre-pressing, be bonded together described the first film and described First Line base board, and described diaphragm is bonded in described the second conductive circuit pattern;
Remove described release film;
By laser drilling process, in described the first film, form described at least one first through hole, part the first conductive circuit pattern is exposed from described at least one first through hole;
Mode by printing conductive cream forms the first electric conducting material in described at least one first through hole; And
Remove described diaphragm.
7. the manufacture method of multilayer circuit board as claimed in claim 1, is characterized in that, M-1 First Line base board is made to M-1 tertiary circuit substrate and comprise step:
Superimposed described the second film and a release film successively in each first conductive circuit pattern in M-1 described First Line base board, each second conductive circuit pattern surface label unification the 3rd film and another release film in M-1 described First Line base board;
First Line base board, the second film, the 3rd film and two release films described in pre-pressing, make described the second film and the 3rd film be bonded in the both sides of described First Line base board;
Remove described two release films;
By laser drilling process, in described the second film, form described at least one second through hole, part the first conductive circuit pattern is exposed from described at least one second through hole, by laser drilling process, in described the 3rd film, form described at least one third through-hole, part the second conductive circuit pattern is exposed from described at least one third through-hole; And
Mode by printing conductive cream forms the second electric conducting material in described at least one second through hole, and the mode by printing conductive cream forms the 3rd electric conducting material in described at least one third through-hole.
8. a manufacture method for multilayer circuit board, comprises step:
N copper-clad base plate is provided, and wherein, N is greater than or equal to 3 natural number, and described in each, copper-clad base plate comprises insulating barrier and fits in the first copper foil layer and second copper foil layer of the relative both sides of described insulating barrier;
The first copper foil layer of copper-clad base plate described in each is made and formed the first conductive circuit pattern, the second copper foil layer of copper-clad base plate described in each is made and formed the second conductive circuit pattern, and described the first conductive circuit pattern and the second conductive circuit pattern conduct mutually by least one conductive hole, thereby N described copper-clad base plate made to N First Line base board;
In N described First Line base board, get N-2M First Line base board, wherein, M is natural number, and N is greater than 2M, first conductive circuit pattern surface laminating the first film described in each in N-2M described First Line base board in First Line base board, described the first film has at least one first through hole, in described the first through hole, fill the first electric conducting material, described the first electric conducting material and adjacent the first conductive circuit pattern conduct mutually, thereby N-2M described First Line base board made to N-2M the second circuit base plate;
In N described First Line base board, get M First Line base board, first conductive circuit pattern surface laminating the second film in each First Line base board in M described First Line base board, the second conductive circuit pattern surface laminating the 3rd film in each First Line base board in M described First Line base board, described the second film has at least one second through hole, described in each, the 3rd film has at least one third through-hole, , and fill the second electric conducting material in described at least one second through hole, described the second electric conducting material and adjacent the first conductive circuit pattern conduct mutually, in described at least one third through-hole, fill the 3rd electric conducting material, described the 3rd electric conducting material and adjacent the second conductive circuit pattern conduct mutually, thereby M described First Line base board made to M tertiary circuit substrate,
The first copper foil is provided, the remaining M of an one step press First Line base board, N-2M described the second circuit base plate, M described tertiary circuit substrate and described the first copper foil are to form 2N+1 sandwich circuit substrate, in described 2N+1 sandwich circuit substrate, between adjacent insulating barrier, pass through the first film, the second film or the 3rd film are bonded together, between adjacent insulating barrier and the first copper foil, by the first film or the second film, be bonded together, and described the first copper foil is positioned at described 2N+1 sandwich circuit substrate outermost one side, described First Line base board or described second circuit base plate are positioned at the outermost opposite side of described 2N+1 sandwich circuit substrate, and
Described the first copper foil is made to conductive circuit pattern via selective etch, obtain 2N+1 sandwich circuit board.
9. the manufacture method of multilayer circuit board as claimed in claim 8, it is characterized in that, before the remaining M of an one step press First Line base board, N-2M described the second circuit base plate, a M described tertiary circuit substrate and described the first copper foil are with formation 2N+1 sandwich circuit substrate, alignment a stacking described remaining M First Line base board, N-2M described the second circuit base plate, a M described tertiary circuit substrate and described the first copper foil are to form superimposed substrate, and the formation method of described superimposed substrate comprises step:
In remaining M First Line base board and M tertiary circuit substrate, by a tertiary circuit substrate and first stackable unit that only has two circuit base plates of the stacking formation of First Line base board, thereby obtain M the first stackable unit;
By N-2M second stackable unit of the stacking formation of described the second circuit base plate;
M described the first stackable unit and described second stackable unit are stacked on described the first copper foil, and make tertiary circuit substrate in each first stackable unit all the First Line base board in more corresponding the first stackable unit near described the first copper foil, make the second conductive circuit pattern of more corresponding second circuit base plate of the first film of the second circuit base plate described in each in described the second stackable unit all near described the first copper foil, thereby obtain described superimposed substrate.
10. the manufacture method of a multilayer circuit board as claimed in claim 9, it is characterized in that, M described the first stackable unit and described the second stackable unit are being stacked in the step on described the first copper foil, described the second stackable unit is between adjacent described the first stackable unit and described the first copper foil, or described the second stackable unit is between two adjacent described the first stackable unit, or described the second stackable unit is stacked on the First Line base board of described the first copper foil of distance the first stackable unit farthest.
The manufacture method of 11. multilayer circuit boards as claimed in claim 8, it is characterized in that, N=3M, before the remaining M of an one step press First Line base board, N-2M described the second circuit base plate, a M described tertiary circuit substrate and described the first copper foil are with formation 2N+1 sandwich circuit substrate, alignment a stacking described remaining M First Line base board, N-2M described the second circuit base plate, a M described tertiary circuit substrate and described the first copper foil are to form superimposed substrate, and the formation method of described superimposed substrate comprises step:
In remaining M First Line base board, M the second circuit base plate and M tertiary circuit substrate, a First Line base board, second circuit base plate and one of a stacking formation of tertiary circuit substrate are only had to the 3rd stackable unit of three circuit base plates, thereby obtain M the 3rd stackable unit;
M described the 3rd stackable unit is stacked on described the first copper foil, and make tertiary circuit substrate in each the 3rd stackable unit all the First Line base board in more corresponding the 3rd stackable unit near described the first copper foil, thereby obtain described superimposed substrate.
The manufacture method of 12. multilayer circuit boards as claimed in claim 11, it is characterized in that, in described the 3rd stackable unit, described tertiary circuit substrate is arranged between adjacent First Line base board and the second circuit base plate, or described First Line base board is arranged between adjacent tertiary circuit substrate and the second circuit base plate, or described the second circuit base plate is arranged between adjacent tertiary circuit substrate and First Line base board.
The manufacture method of 13. multilayer circuit boards as claimed in claim 8, is characterized in that, N-2M First Line base board is made to N-2M the second circuit base plate and comprise step:
Superimposed described the first film and a release film successively in each first conductive circuit pattern in N-2M described First Line base board, each the second conductive circuit pattern surface label unification diaphragm in N-2M described First Line base board;
First Line base board, the first film, release film and diaphragm described in pre-pressing, be bonded together described the first film and described First Line base board, and described diaphragm is bonded in described the second conductive circuit pattern;
Remove described release film;
By laser drilling process, in described the first film, form described at least one first through hole, part the first conductive circuit pattern is exposed from described at least one first through hole;
Mode by printing conductive cream forms the first electric conducting material in described at least one first through hole; And
Remove described diaphragm.
The manufacture method of 14. multilayer circuit boards as claimed in claim 8, is characterized in that, M First Line base board is made to M tertiary circuit substrate and comprise step:
Superimposed described the second film and a release film successively in each first conductive circuit pattern in M described First Line base board, each second conductive circuit pattern surface label unification the 3rd film and another release film in M described First Line base board;
First Line base board, the second film, the 3rd film and two release films described in pre-pressing, make described the second film and the 3rd film be bonded in the both sides of described First Line base board;
Remove described two release films;
By laser drilling process, in described the second film, form described at least one second through hole, part the first conductive circuit pattern is exposed from described at least one second through hole, by laser drilling process, in described the 3rd film, form described at least one third through-hole, part the second conductive circuit pattern is exposed from described at least one third through-hole; And
Mode by printing conductive cream forms the second electric conducting material in described at least one second through hole, and the mode by printing conductive cream forms the 3rd electric conducting material in described at least one third through-hole.
The manufacture method of 15. 1 kinds of multilayer circuit boards, comprises step:
N copper-clad base plate is provided, and wherein, N is greater than or equal to 3 natural number, and described in each, copper-clad base plate comprises insulating barrier and fits in the first copper foil layer and second copper foil layer of the relative both sides of described insulating barrier;
The first copper foil layer of copper-clad base plate described in each is made and formed the first conductive circuit pattern, the second copper foil layer of copper-clad base plate described in each is made and formed the second conductive circuit pattern, and described the first conductive circuit pattern and the second conductive circuit pattern conduct mutually by least one conductive hole, thereby N described copper-clad base plate made to N First Line base board;
In N described First Line base board, get N-2M-1 First Line base board, wherein, M is natural number, and N is greater than 2M+1, the first conductive circuit pattern surface label described in each in N-2M-1 described First Line base board in First Line base board is unified the first film, described the first film has at least one first through hole, in described at least one first through hole, fill the first electric conducting material, described the first electric conducting material and corresponding the first conductive circuit pattern conduct mutually, thereby N-2M-1 described First Line base board made to N-2M-1 the second circuit base plate,
In N described First Line base board, get M+1 First Line base board, first conductive circuit pattern surface laminating the second film in each First Line base board in described in M+1 First Line base board, the second conductive circuit pattern surface laminating the 3rd film in each First Line base board in described M+1 First Line base board, described the second film has at least one second through hole, described the 3rd film has at least one third through-hole, and fill the second electric conducting material in described at least one second through hole, described the second electric conducting material and adjacent the first conductive circuit pattern conduct mutually, in described at least one third through-hole, fill the 3rd electric conducting material, described the 3rd electric conducting material and adjacent the second conductive circuit pattern conduct mutually, thereby M+1 described First Line base board made to M+1 tertiary circuit substrate,
The first copper foil and the second copper foil are provided, the first copper foil described in one step press, remaining M First Line base board, N-2M-1 described the second circuit base plate, M+1 described tertiary circuit substrate and described the second copper foil are to form 2N+2 sandwich circuit substrate, in described 2N+2 sandwich circuit substrate, described the first copper foil and described the second copper foil lay respectively at the outermost both sides of described 2N+2 sandwich circuit substrate, and between adjacent insulating barrier, pass through the first film, the second film or the 3rd film are bonded together, all by the first film or the second film or the 3rd film, be bonded together between adjacent insulating barrier and the first copper foil and between adjacent insulating barrier and the second copper foil, and
Described the first copper foil and the second copper foil are made to conductive circuit pattern via selective etch respectively, to obtain 2N+2 sandwich circuit board.
16. the manufacture method of multilayer circuit board as claimed in claim 15, it is characterized in that, at the first copper foil described in one step press, remaining M First Line base board, N-2M-1 described the second circuit base plate, M+1 described tertiary circuit substrate and described the second copper foil are with before forming 2N+2 sandwich circuit substrate, alignment stacking described the first copper foil, remaining M First Line base board, N-2M-1 described the second circuit base plate, M+1 described tertiary circuit substrate and described the second copper foil are to form superimposed substrate, the formation method of described superimposed substrate comprises step:
In remaining M First Line base board and M tertiary circuit substrate, by a tertiary circuit substrate and first stackable unit that only has two circuit base plates of the stacking formation of First Line base board, thereby obtain M the first stackable unit;
By N-2M-1 second stackable unit of the stacking formation of described the second circuit base plate;
By a remaining tertiary circuit substrate, M described the first stackable unit and described second stackable unit are stacked between described the first copper foil and described the second copper foil, and a described remaining tertiary circuit substrate and described the second copper foil are directly affixed, make tertiary circuit substrate in each first stackable unit all the First Line base board in more corresponding the first stackable unit near described the first copper foil, make the second conductive circuit pattern of more corresponding second circuit base plate of the first film of the second circuit base plate described in each in described the second stackable unit all near described the first copper foil, thereby obtain described superimposed substrate.
17. the manufacture method of multilayer circuit board as claimed in claim 16, it is characterized in that, by a remaining tertiary circuit substrate, M described the first stackable unit, described second stackable unit is stacked in the step between described the first copper foil and described the second copper foil, described the second stackable unit is between adjacent described the first stackable unit and described the first copper foil, or described the second stackable unit is between two adjacent described the first stackable unit, or described the second stackable unit is stacked on the First Line base board of described the first copper foil of distance the first stackable unit farthest.
The manufacture method of 18. multilayer circuit boards as claimed in claim 15, it is characterized in that, N=3M+1, at the first copper foil described in one step press, remaining M First Line base board, N-2M-1 described the second circuit base plate, M+1 described tertiary circuit substrate and described the second copper foil are with before forming 2N+2 sandwich circuit substrate, alignment stacking described the first copper foil, remaining M First Line base board, N-2M-1 described the second circuit base plate, M+1 described tertiary circuit substrate and described the second copper foil are to form superimposed substrate, the formation method of described superimposed substrate comprises step:
In remaining M First Line base board, M the second circuit base plate and M tertiary circuit substrate, a First Line base board, second circuit base plate and one of a stacking formation of tertiary circuit substrate are only had to the 3rd stackable unit of three circuit base plates, thereby obtain M the 3rd stackable unit;
A remaining tertiary circuit substrate and M described the 3rd stackable unit are stacked between described the first copper foil and the second copper foil, and a described remaining tertiary circuit substrate and described the second copper foil are directly affixed, M described the 3rd stackable unit is stacked between described the first copper foil and a described remaining tertiary circuit substrate, make tertiary circuit substrate in each the 3rd stackable unit all the First Line base board in more corresponding the 3rd stackable unit near described the first copper foil, thereby obtain described superimposed substrate.
19. the manufacture method of multilayer circuit board as claimed in claim 18, it is characterized in that, in described the 3rd stackable unit, described tertiary circuit substrate is arranged between adjacent First Line base board and the second circuit base plate, or described First Line base board is arranged between adjacent tertiary circuit substrate and the second circuit base plate, or described the second circuit base plate is arranged between adjacent tertiary circuit substrate and First Line base board.
The manufacture method of 20. multilayer circuit boards as claimed in claim 15, is characterized in that, N-2M-1 First Line base board is made to N-2M-1 the second circuit base plate and comprise step:
Superimposed described the first film and a release film successively in each first conductive circuit pattern in N-2M-1 described First Line base board, each the second conductive circuit pattern surface label unification diaphragm in N-2M-1 described First Line base board;
First Line base board, the first film, release film and diaphragm described in pre-pressing, be bonded together described the first film and described First Line base board, and described diaphragm is bonded in described the second conductive circuit pattern;
Remove described release film;
By laser drilling process, in described the first film, form described at least one first through hole, part the first conductive circuit pattern is exposed from described at least one first through hole;
Mode by printing conductive cream forms the first electric conducting material in described at least one first through hole; And
Remove described diaphragm.
The manufacture method of 21. multilayer circuit boards as claimed in claim 15, is characterized in that, M+1 First Line base board is made to M+1 tertiary circuit substrate and comprise step:
Superimposed described the second film and a release film successively in each first conductive circuit pattern in M+1 described First Line base board, each second conductive circuit pattern surface label unification the 3rd film and another release film in M+1 described First Line base board;
First Line base board, the second film, the 3rd film and two release films described in pre-pressing, make described the second film and the 3rd film be bonded in the both sides of described First Line base board;
Remove described release film;
By laser drilling process, in described the second film, form described at least one second through hole, part the first conductive circuit pattern is exposed from described at least one second through hole, by laser drilling process, in described the 3rd film, form described at least one third through-hole, part the second conductive circuit pattern is exposed from described at least one third through-hole; And
Mode by printing conductive cream forms the second electric conducting material in described at least one second through hole, and the mode by printing conductive cream forms the 3rd electric conducting material in described at least one third through-hole.
The manufacture method of 22. 1 kinds of multilayer circuit boards, comprises step:
N+1 copper-clad base plate is provided, wherein,, N is greater than or equal to 1 natural number, and described in each, copper-clad base plate comprises insulating barrier and fits in the first copper foil layer and second copper foil layer of the relative both sides of described insulating barrier;
The first copper foil layer of copper-clad base plate described in each is made and formed the first conductive circuit pattern, the second copper foil layer of copper-clad base plate described in each is made and formed the second conductive circuit pattern, and described the first conductive circuit pattern and the second conductive circuit pattern conduct mutually by least one conductive hole, thereby N+1 described copper-clad base plate made to N+1 First Line base board;
In N+1 described First Line base board, get N First Line base board, first conductive circuit pattern surface laminating the first film described in each in N described First Line base board in First Line base board, described the first film has at least one first through hole, in described at least one first through hole, fill the first electric conducting material, described the first electric conducting material and adjacent the first conductive circuit pattern conduct mutually, thereby N described First Line base board made to N the second circuit base plate;
One step press N described the second circuit base plate and a remaining First Line base board are to form 2N+2 sandwich circuit board, in described 2N+2 sandwich circuit board, the first film described in each in the second circuit base plate, compared with the more close described First Line base board of the second conductive circuit pattern, is bonded together by the first film between adjacent insulating barrier.
The manufacture method of 23. multilayer circuit boards as claimed in claim 22, is characterized in that, N First Line base board is made to N the second circuit base plate and comprise step:
Superimposed described the first film and a release film successively in the first conductive circuit pattern of First Line base board described in each in N described First Line base board, a second conductive circuit pattern surface label unification diaphragm of First Line base board described in each in N described First Line base board;
First Line base board, the first film, release film and diaphragm described in pre-pressing, be bonded together described the first film and described First Line base board, and described diaphragm is bonded in described the second conductive circuit pattern;
Remove described release film;
By laser drilling process, in described the first film, form described at least one first through hole, part the first conductive circuit pattern is exposed from described at least one first through hole;
Mode by printing conductive cream forms the first electric conducting material in described at least one first through hole; And
Remove described diaphragm.
24. 1 kinds of multilayer circuit boards, it is characterized in that, described multilayer circuit board adopts the manufacture method of the multilayer circuit board as described in any one in claim 1 to 23 to make, described multilayer circuit board comprises multilayer dielectric layer, multifilm and multilayer conductive circuit figure, the relative both sides of every layer insulating are provided with conductive circuit pattern described in one deck, and the conductive circuit pattern of every layer insulating both sides conducts by least one conductive hole being arranged in this insulating barrier, the relative both sides of every layer of film are provided with conductive circuit pattern described in one deck, and the conductive circuit pattern of the relative both sides of every layer of film conducts by the electric conducting material being arranged in this film, electric conducting material in this film forms by printing conductive cream.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210250824.5A CN103582322B (en) | 2012-07-19 | 2012-07-19 | Multilayer circuit board and preparation method thereof |
| TW101127406A TW201406222A (en) | 2012-07-19 | 2012-07-30 | Multilayer printed circuit board and method for manufacturing same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210250824.5A CN103582322B (en) | 2012-07-19 | 2012-07-19 | Multilayer circuit board and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103582322A true CN103582322A (en) | 2014-02-12 |
| CN103582322B CN103582322B (en) | 2016-08-24 |
Family
ID=50052913
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210250824.5A Active CN103582322B (en) | 2012-07-19 | 2012-07-19 | Multilayer circuit board and preparation method thereof |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN103582322B (en) |
| TW (1) | TW201406222A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105530762A (en) * | 2014-09-29 | 2016-04-27 | 深南电路有限公司 | Resistance welding processing method and circuit board |
| CN107148171A (en) * | 2017-06-27 | 2017-09-08 | 北大方正集团有限公司 | The compression method of multilayer circuit board |
| CN108112178A (en) * | 2017-12-25 | 2018-06-01 | 广州兴森快捷电路科技有限公司 | Circuit board fabrication method |
| CN109922612A (en) * | 2019-03-22 | 2019-06-21 | 深圳明阳电路科技股份有限公司 | A kind of HDI board manufacturing method and HDI plate |
| CN112566390A (en) * | 2019-09-10 | 2021-03-26 | 宏启胜精密电子(秦皇岛)有限公司 | Multilayer flexible circuit board and preparation method thereof |
| WO2021081867A1 (en) * | 2019-10-31 | 2021-05-06 | 鹏鼎控股(深圳)股份有限公司 | Thin circuit board and manufacturing method therefor |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04221887A (en) * | 1990-12-25 | 1992-08-12 | Fujitsu Ltd | Manufacture of multilayer printed circuit board |
| CN101112140A (en) * | 2005-10-20 | 2008-01-23 | 松下电器产业株式会社 | Multilayer printed wiring board and its manufacturing method |
| JP2008060573A (en) * | 2006-08-30 | 2008-03-13 | Samsung Electro Mech Co Ltd | Manufacturing method of electronic element built-in printed circuit board |
| US20120023744A1 (en) * | 2010-07-29 | 2012-02-02 | Zhen Ding Technology Co., Ltd. | Method for manufacturing multilayer printed circuit board |
| CN102387672A (en) * | 2010-08-30 | 2012-03-21 | 富葵精密组件(深圳)有限公司 | Method for manufacturing multilayer circuit board |
-
2012
- 2012-07-19 CN CN201210250824.5A patent/CN103582322B/en active Active
- 2012-07-30 TW TW101127406A patent/TW201406222A/en unknown
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04221887A (en) * | 1990-12-25 | 1992-08-12 | Fujitsu Ltd | Manufacture of multilayer printed circuit board |
| CN101112140A (en) * | 2005-10-20 | 2008-01-23 | 松下电器产业株式会社 | Multilayer printed wiring board and its manufacturing method |
| JP2008060573A (en) * | 2006-08-30 | 2008-03-13 | Samsung Electro Mech Co Ltd | Manufacturing method of electronic element built-in printed circuit board |
| US20120023744A1 (en) * | 2010-07-29 | 2012-02-02 | Zhen Ding Technology Co., Ltd. | Method for manufacturing multilayer printed circuit board |
| CN102387672A (en) * | 2010-08-30 | 2012-03-21 | 富葵精密组件(深圳)有限公司 | Method for manufacturing multilayer circuit board |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105530762A (en) * | 2014-09-29 | 2016-04-27 | 深南电路有限公司 | Resistance welding processing method and circuit board |
| CN105530762B (en) * | 2014-09-29 | 2018-08-07 | 深南电路有限公司 | Resistance welding processing method and circuit board |
| CN107148171A (en) * | 2017-06-27 | 2017-09-08 | 北大方正集团有限公司 | The compression method of multilayer circuit board |
| CN108112178A (en) * | 2017-12-25 | 2018-06-01 | 广州兴森快捷电路科技有限公司 | Circuit board fabrication method |
| CN109922612A (en) * | 2019-03-22 | 2019-06-21 | 深圳明阳电路科技股份有限公司 | A kind of HDI board manufacturing method and HDI plate |
| CN112566390A (en) * | 2019-09-10 | 2021-03-26 | 宏启胜精密电子(秦皇岛)有限公司 | Multilayer flexible circuit board and preparation method thereof |
| CN112566390B (en) * | 2019-09-10 | 2022-04-15 | 宏启胜精密电子(秦皇岛)有限公司 | Multilayer flexible circuit board and preparation method thereof |
| WO2021081867A1 (en) * | 2019-10-31 | 2021-05-06 | 鹏鼎控股(深圳)股份有限公司 | Thin circuit board and manufacturing method therefor |
| CN113545170A (en) * | 2019-10-31 | 2021-10-22 | 鹏鼎控股(深圳)股份有限公司 | Thin circuit board and method for manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201406222A (en) | 2014-02-01 |
| CN103582322B (en) | 2016-08-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103582320B (en) | Multilayer circuit board and manufacturing method thereof | |
| KR100962837B1 (en) | Multilayer printed wiring board and process for producing the same | |
| US8863379B2 (en) | Methods of manufacturing printed circuit boards using parallel processes to interconnect with subassemblies | |
| CN103379750B (en) | Multilayer circuit board and preparation method thereof | |
| CN103582322A (en) | Multilayer circuit board and manufacturing method thereof | |
| JPH05198946A (en) | Manufacture of multilayer printed circuit board | |
| EP2327282B1 (en) | Additional functionality single lammination stacked via with plated through holes for multilayer printed circuit boards | |
| US20160135295A1 (en) | Multi-layer circuit board | |
| JP2001015917A (en) | Manufacture of rigid flex printed wiring board | |
| CN103582321B (en) | Multilayer circuit board and preparation method thereof | |
| US20170006699A1 (en) | Multilayer circuit board, semiconductor apparatus, and method of manufacturing multilayer circuit board | |
| JP2006128360A (en) | Printed wiring board and its manufacturing method | |
| CN103906376A (en) | Flexible circuit board and manufacturing method thereof | |
| CN103517584A (en) | Manufacturing method of multilayer circuit board | |
| CN103037637A (en) | Multilayer circuit board and manufacture method of multilayer circuit board | |
| JP2011258779A (en) | Layer circuit board and method for producing circuit board | |
| KR100734244B1 (en) | Multilayer printed circuit board and fabricating method thereof | |
| KR101097504B1 (en) | The method for preparing multi layered circuit board | |
| JP2007335631A (en) | Manufacturing method of laminated wiring board | |
| JP2014068047A (en) | Method for manufacturing multilayer printed wiring board | |
| CN112911834B (en) | Production method of soft-hard combined PCB | |
| CN102958293A (en) | Manufacturing method of circuit board with offset structure | |
| JP2010205809A (en) | Multilayer printed wiring board and method of manufacturing the same | |
| JP2005026548A (en) | Method for manufacturing multi-wire wiring board | |
| JP2007053393A (en) | Multilayer substrate and method of manufacturing same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20170309 Address after: Guangdong city of Shenzhen province Baoan District Songgang streets Yan Chuanyan Luzhen Luo Ding Technology Park plant A1 building to building A3 Patentee after: Fuku Precision Components (Shenzhen) Co., Ltd. Patentee after: Peng Ding Polytron Technologies Inc Address before: 518103 Shenzhen Province, Baoan District Town, Fuyong Tong tail Industrial Zone, factory building, building 5, floor, 1 Patentee before: Fuku Precision Components (Shenzhen) Co., Ltd. Patentee before: Zhending Technology Co., Ltd. |
|
| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: Guangdong city of Shenzhen province Baoan District Songgang street Chuanyan Luo Lu Yan Co-patentee after: Peng Ding Polytron Technologies Inc Patentee after: Peng Ding Holdings (Shenzhen) Limited by Share Ltd Address before: 518000 Shenzhen Baoan District city Songgang street Chuanyan Luzhen Yan Luo Ding Technology Park plant A1 building to building A3 Co-patentee before: Peng Ding Polytron Technologies Inc Patentee before: Fuku Precision Components (Shenzhen) Co., Ltd. |