TW201946515A - Method of manufacturing the printed circuit board - Google Patents

Abstract

The present invention discloses a method of making a printed circuit board comprising the steps of forming a sublayer comprising a combination of alternating copper and insulating layers, which has a first through-hole the internal wall of which is copper electroplated, forming a sublayer attaching structure comprising a hardened (cured) epoxy layer and adhesive films on top of both surfaces of said epoxy layer, which has q second through-hole filled with conducting ink, and (c) laying the sublayer attaching structure in contact between the upper sublayer and lower sublayer in such a way that said first through-hole is aligned with said second through-hole, and performing a complete hardening (curing) process.

Description

Method for manufacturing printed circuit board

The present invention relates to a printed circuit board (PCB, Printed Circuit Board), and particularly to a technology for manufacturing a multilayer circuit board having a large aspect ratio (for example, 36: 1 or more) and a thick thickness (for example, 8T or more).

FIGS. 1A to 1E are diagrams showing a method of manufacturing a circuit board using a laminate pressing technique of the prior art. Referring to FIG. 1A and FIG. 1B, after the secondary layers (plate A (10), plate B (30)) repeatedly formed by the copper foil and the insulating layer are separately prepared, a prepreg material (PPG) is provided between the secondary layers 10 and 30. , PREPREG) 20 and laminated press forming. The sublayer may be a multilayer circuit board. The prepreg 20 sandwiched in the middle during the lamination is an uncured epoxy resin (EPOXY).

Next, a drilling operation is performed to produce the through-holes 40, and then copper plating is performed to cover the inner walls of the through-holes with copper plating so that the copper foil layers of the sub-layers are energized. Referring to FIG. 1E, a solder resist (SR) 50 is finally printed on the substrate surface.

However, recently, with the miniaturization of circuit line widths, the aspect ratio of through holes has increased to 36: 1 or more, and the thickness of circuit boards has increased to 8T or more with the lamination of multiple sublayers. . When the aspect ratio of the hole is increased, it is difficult to fill the plating layer in the hole in the step of FIG. 1D, and when the thickness of the substrate is thickened, it is difficult to perform the drilling process in the step of FIG. 1C.

An object of the present invention is a technique for manufacturing a multilayer circuit board having a large aspect ratio and a thick thickness.

In order to achieve the object, a method for manufacturing a circuit board according to an embodiment of the present invention, which is used to manufacture a multi-layer circuit board, includes: step a, manufacturing a sub-layer, where the sub-layer is a copper foil with a circuit pattern transferred thereon and an insulation layer; A layer-by-layer structure is provided with a first through-hole, and the inner wall of the first through-hole is copper-plated for inter-layer connection; step b, an inter-layer joint structure is produced, and the inter-layer joint structure is in a hardened ring. The surface of the oxyresin is provided with an adhesive film, and the epoxy resin is provided with a second through-hole filled with conductive ink; and step c, the interlayer bonding structure is sandwiched between the sublayers so that The first through-holes and the second through-holes are laminated such that their central axes are aligned with each other, are brought into close contact, and are completely hardened.

The present invention is a technology for performing inter-layer bonding without using a stamping process (molding process). The present invention provides a copper-clad laminate (CCL) instead of the conventional prepreg material PPG. Sub-layer, and the technology of joining the products completed as a sub-layer using an adhesive film and conductive ink.

In the present invention, the molding process of pressing (press) in a high-temperature and high-pressure manner is not used instead of sandwiching a prepreg material in the middle and laminating the sub-layers on the upper and lower sides in the same manner as in the prior art. Interlayer bonding technology.

In the present invention, both sides of a cured epoxy resin obtained by removing copper foil on both sides of a copper clad laminate (CCL; Copper cladded laminate) are closely adhered to an adhesive film and a carrier. The first hardening, after the hole is made, the second hardening is performed after the hole is filled with the conductive ink, and the surface of the adhesive film is exposed on both sides by peeling the carrier film. Such a structure is called an interlayer bonding structure.

By interposing the interlayer bonding structure of the present invention between the sublayers, the sublayers are bonded, so that the bonding film on the surface of the interlayer bonding structure serves as a medium for bonding the upper and lower sublayers to each other. The conductive ink performs a role of energizing the secondary layers on both sides.

After the manufacturing of the substrate such as the groove planing process is completed, the present invention can also realize board to board connection, and can increase the thickness of the product according to the required thickness. By using the layer bonding technology of the present invention, a substrate having a high aspect ratio can be adjusted down to a level of 50% or less. In the present invention, since a cured insulating layer is used, it is possible to stably cope with changes in dimensions. In the present invention, a laser via hole can be used instead of a direct through hole, so that the thickness of the product can be reduced.

The present invention does not use the prior art laminated press molding process, which aims to provide a technique for performing interlayer bonding using an adhesive film and a conductive ink. Compared with the prior art, which uses non-hardened PPG for lamination molding, in the present invention, a hardened epoxy resin is used to form the interlayer bonding.

The invention provides a method for manufacturing an interlayer joint structure, which is used for manufacturing an interlayer joint structure. The interlayer joint structure is sandwiched between sub-layers composed of a copper foil and an insulating layer repeatedly combined, and baked and bonded. , Including: step a, after the adhesive film and the carrier tape are closely adhered on the hardened epoxy resin, the first curing is performed in a manner that the adhesive film is not completely cured; step b, a drilling process is used in The result of the step a forms a hole penetrating up and down; step c, the conductive paste is filled into the hole with the solder paste printing process method and a second hardening is performed to harden the conductive ink to form a hole plug, and The adhesive film is baked without being hardened; and step d, peeling off and removing the carrier tape attached to the surface of the result of step c to expose the hole plugs and the adhesive film on the surface.

The invention provides a method for manufacturing a circuit board, which is used for manufacturing a multilayer circuit board. The method includes the step a of manufacturing a secondary layer. The secondary layer is provided on a structure in which a copper foil and an insulating layer combined with a circuit pattern are transferred. A first through-hole, and the inner wall of the first through-hole is copper-plated for inter-layer connection; in step b, an inter-layer bonding structure is prepared, and the inter-layer bonding structure is provided with an adhesive on the surface of the hardened epoxy resin layer; A thin film is formed, the epoxy resin layer is provided with a second through hole filled with conductive ink; and step c, the sub-layer is placed between the interlayer bonding structures, and the first through hole and the The second through holes are laminated in such a manner that the central axes of the second through holes are aligned with each other, and are closely adhered and completely hardened (as an example, a high temperature and high pressure stamping process). The inner diameter of the second through-hole of the present invention can be made larger than the inner diameter of the first through-hole. After partial removal, lamination was performed.

2A to 2C are diagrams illustrating a method of manufacturing a circuit board using the interlayer bonding structure of the first embodiment of the present invention.

FIG. 2A is a basic embodiment of the present invention, and illustrates a technique of joining two sub-layers by sandwiching the inter-layer bonding structure of the present invention between two sub-layers. The present invention can join multiple sub-layers.

Referring to FIG. 2A, each of the sub-layers (plate A and plate B) is composed of a combination of a plurality of layers of copper foil and an insulating layer, and is provided with holes for inter-layer connection. 2B and 2C, the sub-layers are bonded up and down by sandwiching the inter-layer bonding structure of the present invention between the respective sub-layers.

The interlayer bonding structure of the present invention is covered with an adhesive film 200b over the hardened epoxy resin 100b, and the adhesive film 200b performs a function of bonding upper and lower sub-layers to each other. In addition, a hole is formed at a position aligned with the hole of the sub-layer of the cured epoxy resin 100b, and a conductive ink 130 is filled in the hole, and the conductive ink 130 is hardened and plugged. When joining the upper and lower sub-layers, the conductive ink that has been plugged by the hole is energized with the plating layer electroplated on the inner wall of the hole of the sub-layer.

3A to 3E are diagrams illustrating a method of manufacturing an interlayer bonding structure according to the present invention.

Referring to FIG. 3A, as a preferred embodiment of the present invention, both sides of copper foils 100a and 100c of a copper cladded laminate (CCL; copper cladded laminate) are completely removed, and only the cured epoxy resin 100b remains. 3B, the adhesive layer of the present invention is closely adhered to both sides of the cured epoxy resin 100b.

The adhesive layer of the present invention has a structure in which an adhesive film 200b and a carrier tape 200c are formed on top of a base film 200a. Referring to FIG. 3B, when the adhesive layer of the present invention is in close contact with both sides of the cured epoxy resin 100b, the base film 200a is peeled off and the adhesive film 200b and the carrier tape 200c are closely adhered. Next, the first hardening is performed. In the first hardening, roll lamination is performed at 50 to 150 ° C. to induce partial hardening.

Referring to FIG. 3C, a hole 110 is drilled using a laser drill or a CNC drill. Referring to FIG. 3D, the inside of the hole 110 is filled with the conductive ink 130 by printing the conductive ink 130, and a second thermal curing is performed. The second hardening is preferably oven-baked at 80 to 180 ° C. within about 2 hours.

Among them, the carrier tape 200c plays a role of protecting the adhesive film 200b in a physical processing step such as a laser drill or a CNC drill. The carrier tape 200c should not be detached from the adhesive film in a chemical post-treatment process such as a plasma cleaning or desmear process. The adhesive film of the present invention can achieve stepwise hardening, which requires no reaction when the conductive ink is hardened after the first hardening, and is completely hardened when the final products are joined.

Referring to FIG. 3E, the adhesive film 200b is exposed by removing the carrier tape 200c, and the conductive ink 130 blocked in the hole 110 is exposed. The structure of FIG. 3E is an interlayer bonding structure of the present invention.

By sandwiching the interlayer bonding structure of the present invention between the sublayers, the sublayers are bonded to the top and bottom of the interlayer bonding structure as described in FIG. 2B. When the joining is performed according to the present invention, the oven-baking can be performed at 150 to 250 ° C within about 4 hours, thereby performing the third hardening. As another embodiment of the present invention, a stamping process (layer forming) under high temperature and high pressure may also be used.

4A to 4C are diagrams illustrating a method of manufacturing a circuit board using an interlayer bonding structure according to a second embodiment of the present invention. The second embodiment of the present invention is characterized in that after the copper foil (pad copper foil) of the bonding surface of the sublayers to be laminated is etched and removed, the interlayer bonding structure of the present invention is interposed between the sublayers. Perform the joining. Furthermore, the second embodiment of the present invention is characterized in that the inner diameter of the hole 110 of the interlayer bonding structure filled with the conductive ink is made larger than the inner diameter of the hole of the sub-layer. Referring to FIGS. 4B and 4C, when bonding with the upper and lower sub-layers, the effect of inserting the plating layer plated on the inner wall of the hole of the sub-layer into the conductive ink plugged by the hole and energizing each other can be achieved. FIG. 5 shows a tomogram of a substrate for manufacturing a circuit board using an interlayer bonding structure according to a second embodiment of the present invention.

6A to 6C are diagrams illustrating a method of manufacturing a circuit board using an interlayer bonding structure according to a third embodiment of the present invention. The third embodiment of the present invention is characterized in that after a part of the copper foil (pad copper foil) on the bonding surface of the sublayers to be laminated is etched and removed, interlayers of the present invention are interposed between the sublayers. The bonding structure is bonded. The third embodiment of the present invention is characterized in that the inner diameter of the hole 110 of the interlayer bonding structure filled with the conductive ink is larger than the inner diameter of the hole of the sub-layer, as in the second embodiment. Referring to FIGS. 6B and 6C, when bonding with the upper and lower sublayers, the inner wall of the hole of the sublayer can be connected to the conductive ink blocked by the hole plug, and the effect of bonding the copper foil pad and the conductive ink to each other can be achieved. power ups. FIG. 7 shows a tomographic photograph of a substrate for manufacturing a circuit board using an interlayer bonding structure according to a third embodiment of the present invention.

In the foregoing, the features and technical advantages of the present invention have been extensively improved, so that the protection scope of the scope of the attached patent application can be better understood. Additional features and advantages constituting the patentable scope of the present invention will be described in detail in the patentable scope. Those skilled in the art should understand that the disclosed concepts and specific embodiments of the present invention can be used immediately as the basis for the design or modification of other structures for carrying out similar purposes to the present invention.

In order to perform the same purpose of the present invention, the concepts and embodiments of the invention disclosed in the present invention may be used by those skilled in the art as a basis for modifying or designing other structures. In addition, the equivalent structure of the modification or change described above by those skilled in the art can be variously evolved, replaced, and changed without departing from the idea or scope of the invention described in the scope of the patent application.

Industrial Applicability After the substrate manufacturing such as the groove planing process is completed, the present invention can also realize board to board connection, and can increase the thickness of the product according to the required thickness. By using the layer bonding technology of the present invention, a substrate having a high aspect ratio can be adjusted down to a level of 50% or less. In the present invention, since a cured insulating layer is used, it is possible to stably cope with changes in dimensions. In the present invention, a laser via hole can be used instead of a direct through hole, so that the thickness of the product can be reduced.

10‧‧‧board A

20‧‧‧ Prepreg

30‧‧‧board B

40‧‧‧through hole

50‧‧‧Printed solder mask on substrate surface

100a, 100c‧‧‧ copper foil

100b‧‧‧ epoxy resin

110‧‧‧hole

130‧‧‧ conductive ink

200a‧‧‧ substrate film

200b‧‧‧adhesive film

200c‧‧‧ carrier tape

FIGS. 1A to 1E are diagrams showing a conventional method for manufacturing a circuit board using a laminated press molding technology.

2A to 2C are diagrams illustrating a method of manufacturing a circuit board using the interlayer bonding structure of the first embodiment of the present invention.

3A to 3E are diagrams illustrating a method of manufacturing an interlayer bonding structure according to the present invention.

4A to 4C are diagrams illustrating a method of manufacturing a circuit board using an interlayer bonding structure according to a second embodiment of the present invention.

FIG. 5 is a tomogram showing a substrate for manufacturing a circuit board using an interlayer bonding structure according to a second embodiment of the present invention.

6A to 6C are diagrams illustrating a method of manufacturing a circuit board using an interlayer bonding structure according to a third embodiment of the present invention.

FIG. 7 is a tomogram showing a substrate for manufacturing a circuit board using an interlayer bonding structure according to a third embodiment of the present invention.

Claims (10)

A method for manufacturing a circuit board, which is used for manufacturing a multi-layer circuit board, is characterized in that it includes: Step a, making a sub-layer, the sub-layer is provided on a structure in which a copper foil and an insulating layer which are transferred with a circuit pattern are combined into a multilayer structure; There is a first through-hole, and the inner wall of the first through-hole is copper-plated for inter-layer connection; Step b, an inter-layer bonding structure is prepared, and the inter-layer bonding structure is provided with an adhesive on the surface of the hardened epoxy resin A thin film is formed, the epoxy resin is provided with a second through hole filled with conductive ink; and step c, the interlayer bonding structure is sandwiched between the sub-layers, and the first through hole and the The second through holes are laminated in such a manner that the central axes of the second through holes are aligned with each other, are closely adhered, and are completely hardened. The method for manufacturing a circuit board according to claim 1, wherein the step of manufacturing an interlayer bonding structure in step b includes: step b1, after the adhesive film and the carrier tape are closely adhered on the hardened epoxy resin, The first hardening is partially performed in a manner that the adhesive film is not completely hardened; step b2, a second through hole penetrating vertically is formed on the result of step b1 by a drilling process; step b3, in the step The second through hole is filled with a conductive ink, a second hardening is performed and the conductive ink is hardened to form a hole plug, and the second hardening is performed in a range where the adhesive film is not completely hardened; and step b4, peeling and removing The carrier tape attached to the surface of the result of step b3 to expose the hole plug surface of the second through hole and the adhesive film. The method for manufacturing a circuit board according to claim 2, wherein the hardened epoxy resin in step b1 is prepared by completely removing copper foil on both sides of the copper foil laminate. The method for manufacturing a circuit board according to claim 2, wherein the first hardening in step b1 is performed by a roll lamination process at a temperature of 50 to 150 ° C. The method for manufacturing a circuit board according to claim 2, wherein the second hardening in step b3 is performed in an oven baking at 80 to 180 ° C. within 2 hours. The method for manufacturing a circuit board according to claim 2, wherein the adhesive film and the carrier tape in step b1 are obtained by peeling off the base film from a structure in which the adhesive film and the carrier tape are formed above the base film. The structure is formed in close contact with the hardened epoxy resin. The method for manufacturing a circuit board according to claim 1, wherein the complete curing in step c is performed by oven baking at 150 to 250 ° C. within 4 hours, thereby curing and laminating. The method for manufacturing a circuit board according to claim 1, wherein the complete hardening in step c is a high temperature and high pressure stamping process. The method of manufacturing a circuit board according to claim 1, wherein an inner diameter of the second through hole is made larger than an inner diameter of the first through hole. The method for manufacturing a circuit board according to claim 1, wherein in the step c, the copper foil pad above the first through hole of the bonding surface of the sub-layer to be laminated is completely or partially removed, and then the layer is layered. product.