TW200941684A - Leadframe board, semiconductor module, and method for making a leadframe board - Google Patents

Leadframe board, semiconductor module, and method for making a leadframe board Download PDF

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Publication number
TW200941684A
TW200941684A TW098106345A TW98106345A TW200941684A TW 200941684 A TW200941684 A TW 200941684A TW 098106345 A TW098106345 A TW 098106345A TW 98106345 A TW98106345 A TW 98106345A TW 200941684 A TW200941684 A TW 200941684A
Authority
TW
Taiwan
Prior art keywords
lead frame
resin
bonding material
frame substrate
pattern
Prior art date
Application number
TW098106345A
Other languages
English (en)
Chinese (zh)
Inventor
Seiji Oka
Takeshi Oi
Yoichi Goto
Masaki Goto
Kiyofumi Kitai
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of TW200941684A publication Critical patent/TW200941684A/zh

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/202Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using self-supporting metal foil pattern
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49575Assemblies of semiconductor devices on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861Lead-frames fixed on or encapsulated in insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09881Coating only between conductors, i.e. flush with the conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/17Post-manufacturing processes
    • H05K2203/175Configurations of connections suitable for easy deletion, e.g. modifiable circuits or temporary conductors for electroplating; Processes for deleting connections

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Structure Of Printed Boards (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
TW098106345A 2008-03-06 2009-02-27 Leadframe board, semiconductor module, and method for making a leadframe board TW200941684A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008055771 2008-03-06

Publications (1)

Publication Number Publication Date
TW200941684A true TW200941684A (en) 2009-10-01

Family

ID=41055936

Family Applications (1)

Application Number Title Priority Date Filing Date
TW098106345A TW200941684A (en) 2008-03-06 2009-02-27 Leadframe board, semiconductor module, and method for making a leadframe board

Country Status (3)

Country Link
JP (1) JPWO2009110376A1 (fr)
TW (1) TW200941684A (fr)
WO (1) WO2009110376A1 (fr)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5432045B2 (ja) * 2010-04-13 2014-03-05 シチズン電子株式会社 半導体発光装置の製造方法
WO2012127696A1 (fr) * 2011-03-24 2012-09-27 三菱電機株式会社 Module de semi-conducteurs de puissance et dispositif à unité de puissance
JP2014099547A (ja) 2012-11-15 2014-05-29 Mitsubishi Electric Corp 電力半導体モジュールおよびその製造方法
JP2016184596A (ja) * 2013-08-19 2016-10-20 凸版印刷株式会社 フレキシブル配線基材と配線基板及び太陽電池モジュールとicカード
JP6401444B2 (ja) * 2013-10-07 2018-10-10 ローム株式会社 パワーモジュールおよびその製造方法
JP6391430B2 (ja) * 2014-11-06 2018-09-19 三菱電機株式会社 電子制御装置およびその製造方法
CN107004649B (zh) * 2014-11-20 2019-09-03 日本精工株式会社 电子部件搭载用散热基板
JP6191784B2 (ja) * 2014-11-20 2017-09-06 日本精工株式会社 電子部品搭載用放熱基板
CN107004648B (zh) * 2014-11-20 2019-04-23 日本精工株式会社 电子部件搭载用散热基板
JP6488940B2 (ja) * 2015-08-07 2019-03-27 富士電機株式会社 半導体装置
JP6218876B2 (ja) * 2016-04-14 2017-10-25 三菱電機株式会社 モジュール部品およびその製造方法
WO2018012006A1 (fr) * 2016-07-12 2018-01-18 日立化成株式会社 Procédé de fabrication d'une carte de circuits et carte de circuits
WO2018189797A1 (fr) 2017-04-10 2018-10-18 日立化成株式会社 Procédé de production de carte de circuits, feuille de circuits et carte de circuits
WO2019142282A1 (fr) * 2018-01-17 2019-07-25 日立化成株式会社 Procédé de fabrication de feuille de circuit, procédé de fabrication de carte de circuits imprimés, feuille de circuit et carte de circuits imprimés
CN114364141A (zh) * 2022-01-04 2022-04-15 深圳中富电路股份有限公司 一种厚铜陶瓷基板及其制作方法
WO2023210420A1 (fr) * 2022-04-28 2023-11-02 住友ベークライト株式会社 Carte de circuit imprimé dotée d'un dissipateur thermique et son procédé de fabrication, et dispositif à semi-conducteur l'utilisant et procédé de fabrication dudit dispositif à semi-conducteur

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06177188A (ja) * 1992-12-04 1994-06-24 Hitachi Ltd 半導体装置
JPH06318670A (ja) * 1993-05-06 1994-11-15 Sony Corp リードフレーム及びその製造方法
JP3169578B2 (ja) * 1998-03-23 2001-05-28 松下電器産業株式会社 電子部品用基板
JP2002033558A (ja) * 2000-07-18 2002-01-31 Matsushita Electric Ind Co Ltd 回路基板とその製造方法
EP1492164A4 (fr) * 2002-03-29 2007-10-31 Matsushita Electric Ind Co Ltd Procede de fabrication d'un substrat thermoconducteur
JP4409849B2 (ja) * 2003-04-24 2010-02-03 株式会社東芝 半導体装置の形成方法
JP2004349400A (ja) * 2003-05-21 2004-12-09 Matsushita Electric Ind Co Ltd 熱伝導性回路基板およびそれを用いたパワーモジュール
JP4050200B2 (ja) * 2003-07-08 2008-02-20 新日本無線株式会社 半導体装置の製造方法および半導体装置
JP2005303107A (ja) * 2004-04-14 2005-10-27 New Japan Radio Co Ltd リードフレームおよび半導体装置並びにそれらの製造方法

Also Published As

Publication number Publication date
WO2009110376A1 (fr) 2009-09-11
JPWO2009110376A1 (ja) 2011-07-14

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