JP2006237517A - 回路装置およびその製造方法 - Google Patents

回路装置およびその製造方法 Download PDF

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Publication number
JP2006237517A
JP2006237517A JP2005053742A JP2005053742A JP2006237517A JP 2006237517 A JP2006237517 A JP 2006237517A JP 2005053742 A JP2005053742 A JP 2005053742A JP 2005053742 A JP2005053742 A JP 2005053742A JP 2006237517 A JP2006237517 A JP 2006237517A
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Japan
Prior art keywords
circuit element
circuit
insulating resin
film
conductive film
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JP2005053742A
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English (en)
Inventor
Ryosuke Usui
良輔 臼井
Hideki Mizuhara
秀樹 水原
Yasunori Inoue
恭典 井上
Makoto Murai
誠 村井
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Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
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Priority to JP2005053742A priority Critical patent/JP2006237517A/ja
Priority to US11/359,429 priority patent/US20060193108A1/en
Publication of JP2006237517A publication Critical patent/JP2006237517A/ja
Withdrawn legal-status Critical Current

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    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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Abstract

【課題】 動作が高速で薄型構造の回路装置を得る。
【解決手段】 回路装置１０は、第１の回路素子１４と、基板７４に形成された回路素子部１６とを備え、第１の回路素子１４と回路素子部１６とが、素子面同士が対向するように配置されている。第１の回路素子１４の素子面に形成された端子と回路素子部１６の素子面に形成された端子１７とは、異方性導電フィルム１８を構成するバインダ中の導電性粒子、および、ビア２４を介して電気的に導通している。また、異方性導電フィルム１８および第３の絶縁樹脂膜３０を同一工程で熱圧着することによって、回路装置１０の製造工程の簡素化が図れる。
【選択図】図１

Description

本発明は、回路装置およびその製造方法に関する。
携帯電話、ＰＤＡ、ＤＶＣ、ＤＳＣといったポータブルエレクトロニクス機器の高機能化が加速するなか、これらの製品が市場で受け入れられるためには、小型・軽量化がほぼ必須となっている。エレクトロニクス機器の小型・軽量化の実現のためには、高集積のシステムＬＳＩが求められている。
一方、これらのエレクトロニクス機器に対しては、より使い易く便利なものが求められており、機器に使用されるＬＳＩに対し、高機能化、高性能化が要求されている。このため、ＬＳＩチップの高集積化に伴ってそのＩ／Ｏ数が増大する一方で、パッケージ自体の小型化要求も強い。Ｉ／Ｏ数の増大とパッケージの小型化を両立させるためには、半導体部品の高密度な基板実装に適合した半導体パッケージの開発が強く求められる。
回路素子が搭載された回路装置を積層し、回路素子を高密度に実装した回路装置として、回路素子間の接続導体回路を絶縁層内部に形成したものが知られている（例えば、特許文献１参照）。
特開平７−１０６５０９号公報
しかしながら、特許文献１に記載された回路装置では、回路素子間を接続する配線が長くなり、処理速度が遅くなる。また、ある回路素子の接続端子と他の回路素子の接続端子とが、ハンダ電極またはバンプ電極を介して接続されているため、回路装置の積層構造が厚くなってしまう。
本発明は、上記の問題に鑑みてなされたもので、動作が高速で薄型構造の回路装置を提供することを目的とする。
本発明の第１の態様は、第１の回路素子と、第２の回路素子とを備える回路装置であって、第１の回路素子と第２の回路素子とは、素子面同士が対向するように配置され、第１の回路素子の素子面に形成された端子と第２の回路素子の素子面に形成された端子とは、絶縁樹脂中に複数の導電性粒子を有する膜を介して電気的に導通している回路装置である。
この構成によれば、第１の回路素子と第２の回路素子とは、素子面同士が対向するように配置されているため、回路素子間を接続する配線を短くすることができる。このため、処理速度を上げることができる。また、絶縁樹脂中に複数の導電性粒子を有する膜を介して回路素子間の電気的な導通を行えるため、回路装置を簡易に作製することができる。
第１の回路素子の素子面に形成された端子と、第２の回路素子の素子面に形成された端子は、異方性導電フィルムを介して電気的に導通していてもよい。この構成によれば、異方性導電フィルムを介して回路素子間の電気的な導通を行えるため、回路装置を簡易に作製することができる。
本発明の第２の態様は、基材と、基材上に設けられた第１の回路素子と、第１の回路素子上に設けられた絶縁層と、絶縁層に設けられると共に、第１の回路素子の素子面に形成された端子と電気的に導通する導電体と、絶縁層上に設けられると共に、導電体と電気的に導通する導電性粒子を含む樹脂層と、樹脂層上に設けられると共に、素子面に形成された端子が導電性粒子と電気的に導通する第２の回路素子と、を有する回路装置である。
本発明の第３の態様は、基材上に、第１の回路素子を配置する第１回路素子配置工程と、第１の回路素子上に、異方性導電フィルムと第２の回路素子とを積層状に配置する第２回路素子積層配置工程と、第２の回路素子上に、絶縁樹脂を配置する絶縁樹脂配置工程と、第２回路素子積層配置工程、および、絶縁樹脂配置工程の後、異方性導電フィルムおよび絶縁樹脂を加熱して、第２の回路素子を異方性導電フィルムおよび絶縁樹脂に圧着する工程と、を有する回路装置の製造方法である。
この方法によれば、第２の回路素子を異方性導電フィルムおよび絶縁樹脂に圧着する工程を同時に行うことができ、製造工程の簡素化が図れる。
第２回路素子積層配置工程は、第１の回路素子上に、素子面に異方性導電フィルムが貼着された第２の回路素子を配置する工程であってもよい。また、第２回路素子積層配置工程において、第２の回路素子は、その素子面が第１の回路素子の素子面と対向するように配置されてもよい。
本発明によれば、動作が高速で薄型構造の回路装置が得られる。
以下、本発明の実施の形態について、図面を用いて説明する。なお、すべての図面において、同様な構成要素には同様の符号を付し、適宜説明を省略することがある。また、本明細書において、「上」とは、膜の積層の順番によって決まり、先に積層される膜から見て後から積層される膜の方向をいう。この場合、先に積層される膜と後から積層される膜とが接触しているか否かは問わない。
図１は、本実施の形態に係る回路装置１０の断面を示す。回路装置１０は、主に、基材１２と、第１の回路素子１４と、第２の回路素子である半導体ウエハ等の基板７４上に形成された回路素子部１６と、異方性導電フィルム（Ａｎｉｓｏｔｒｏｐｉｃ Ｃｏｎｄｕｃｔｉｖｅ Ｆｉｌｍ；以下、「ＡＣＦ」ということがある。）１８と、を備える。また、回路装置１０は、第３の回路素子２０と、他の回路素子である受動素子２２と、ビア２４と、第１の絶縁樹脂膜２６と、第２の絶縁樹脂膜２８と、第３の絶縁樹脂膜３０と、導電膜４０と、ハンダ電極４２と、を備える。
基材１２は、第１の回路素子１４、第３の回路素子２０、および、受動素子２２等の他の回路素子を溝にはめ込んで固定する板状部材である。基材１２は、熱膨張係数が０．５×１０−６から５．０×１０−６／Ｋの金属と、熱伝導率が２００から５００Ｗ／ｍＫの金属とを組み合わせたクラッド材を用いることができる。
第１の回路素子１４および第３の回路素子２０は、例えば、トランジスタ、ダイオード、または、ＩＣチップ等である。また、回路素子部１６は、半導体ウエハ等に形成された回路素子である。第１の回路素子１４と回路素子部１６とは、素子面同士が対向した状態で、回路装置１０内に配置されている。このため、回路素子間を接続する配線を短くすることができ、回路装置１０の処理速度を上げることができる。
第３の回路素子２０には、裏面に金属が埋め込まれた複数の凹部が形成されている。 このように、第３の回路素子２０の裏面に金属が埋め込まれた凹部を形成することによって、第３の回路素子２０に蓄積された熱は、凹部の金属を介して外部に放出されやすくなる。
ＡＣＦ１８は、導電性粒子がバインダ中に含まれる膜状部材である。導電性粒子としては、Ｃｕ単体、Ａｇ単体、もしくは、Ｎｉ単体、金メッキ処理を施したＮｉ等の金属粒子、または、スチレン樹脂もしくはアクリル樹脂等の樹脂核に金メッキを施した粒子などが使用できる。バインダとしては、合成ゴム、熱硬化樹脂、または、熱可塑性樹脂などが使用できる。
ＡＣＦ１８の膜形状の表側と裏側から２つの部材を圧着すると、これらの２つの部材は、導電性粒子を介して電気的に導通する。一方、ＡＣＦ１８の膜形状の平面方向は、導電性粒子間にバインダが存在するため、電気的に導通されない。本実施の形態では、図１に示すように、第１の回路素子１４の素子面の所定の端子（不図示）と、回路素子部１６の素子面の所定の端子１７とが、ＡＣＦ１８およびビア２４を介して電気的に導通されている。
受動素子２２は、例えば、チップコンデンサまたはチップ抵抗等である。受動素子２２は、一部または全部の材料となる埋込材料を、第１の絶縁樹脂膜２６の凹部内部に埋め込むことによっても形成することができる。
ビア２４は、Ｃｕ、Ａｌ、または、Ｃｕ−Ａｌ合金等の導電体を、めっき等によってビアホールに埋め込んで形成される。第１、第２、第３の絶縁樹脂膜２６，２８，３０としては、加熱によって一度軟化し、冷却後に硬化するものが使用できる。このようなものとしては、例えば、エポキシ樹脂、ＢＴレジン等のメラミン誘導体、液晶ポリマー、ＰＰＥ樹脂、ポリイミド樹脂、フッ素樹脂、フェノール樹脂、または、ポリアミドビスマレイミドなどが挙げられる。これらを用いることによって、回路装置１０の剛性を高めることができ、回路装置１０の安定性が向上する。
第１、第２、第３の絶縁樹脂膜２６，２８，３０は、回路素子を安定的に固定し、また、回路素子で発生した熱を効率良く放出する。第１、第２、第３の絶縁樹脂膜２６，２８，３０には、フィラーまたは繊維等の充填材を含めることができる。フィラーとしては、例えば、粒子状または繊維状のＳｉＯ２やＳｉＮを用いることができる。
第１、第２、第３の絶縁樹脂膜２６，２８，３０に充填材を含めることによって、第１、第２、第３の絶縁樹脂膜２６，２８，３０を加熱して回路素子を熱圧着した後に第１、第２、第３の絶縁樹脂膜２６，２８，３０を冷却する際、第１、第２、第３の絶縁樹脂膜２６，２８，３０の反りが低減されると共に、熱伝導性が向上する。このため、回路素子と第１、第２、第３の絶縁樹脂膜２６，２８，３０との密着性を上げることができる。なお、第１、第２、第３の絶縁樹脂膜２６，２８，３０は、同一の絶縁樹脂膜であってもよいし、それぞれ異なる絶縁樹脂膜であってもよい。
導電膜４０は、例えば、圧延銅箔等の圧延金属である。後述する他の導電膜５０，５４，５６，５８も、例えば、圧延銅箔等の圧延金属とすることができる。ハンダ電極４２は、導電膜４０上にハンダ印刷法等によって形成された回路装置１０の裏面電極である。回路装置１０は、ハンダ電極４２を介して、外部基板等の外部装置と電気的に導通させることができる。
次に、図２から図８を参照しながら、本実施の形態に係る回路装置１０の製造方法について説明する。
図２から図８は、回路装置１０の製造工程を説明する断面図である。まず、図２に示すように、第１の回路素子１４、第３の回路素子２０、および、受動素子２２等の他の回路素子を基材１２上の溝４８に固定するダイ・チップボンド工程を行う。本実施の形態では、回路素子を搭載する領域に合わせて基材の表面に溝４８が形成されている。このため、基材１２に第１の回路素子１４、第３の回路素子２０、および、受動素子２２をそれぞれに対応する溝４８にはめ込むことにより、これらを容易かつ正確に、基材１２に載置することができる。
次に、図３に示すように、導電膜５０と第１の絶縁樹脂膜２６を備える導電膜付き絶縁樹脂膜５２を基材１２上に貼付し、真空プレスにより、第１の回路素子１４、第３の回路素子２０、および、受動素子２２を第１の絶縁樹脂膜２６内に押し込む。この工程によって、第１の回路素子１４、第３の回路素子２０、および、受動素子２２は、第１の絶縁樹脂膜２６内に埋め込まれると共に、第１の絶縁樹脂膜２６内に圧着されて第１の絶縁樹脂膜２６と接着する。また、この工程によって、第１の絶縁樹脂膜２６と基材１２とが接合する。
また、第１の回路素子１４、第３の回路素子２０、および、受動素子２２に段差が生じている場合でも、第１の回路素子１４、第３の回路素子２０、および、受動素子２２の間に絶縁樹脂膜が入り込むため、基材１２から導電膜４０までの厚さを均一に保つことができる。この結果、回路装置１０の寸法精度を高めることができる。
導電膜付き絶縁樹脂膜５２としては、フィルム状の第１の絶縁樹脂膜２６上に導電膜５０が付着したものを用いることができる。また、導電膜付き絶縁樹脂膜５２は、導電膜５０上に、第１の絶縁樹脂膜２６を構成する樹脂組成物を塗布し、乾燥させることによって形成することもできる。本実施の形態において、樹脂組成物は、本発明の目的に反しない範囲において、硬化剤、硬化促進剤、粘度調整剤、または、その他の添加剤を含むことができる。
なお、導電膜付き絶縁樹脂膜５２は、第１の絶縁樹脂膜２６が一次硬化、半硬化、または、仮硬化した状態で基材１２上に配置される。このようにすれば、第１の絶縁樹脂膜２６と第１の回路素子１４、第３の回路素子２０、および、受動素子２２との密着性を高めることができる。
次に、第１の絶縁樹脂膜２６を構成する樹脂の種類に応じて、第１の絶縁樹脂膜２６を加熱し、減圧下で導電膜付き絶縁樹脂膜５２を第１の回路素子１４、第３の回路素子２０、および、受動素子２２に圧着する。
なお、この工程に代えて、フィルム状の第１の絶縁樹脂膜２６が一次硬化、半硬化、または、仮硬化した状態で基材１２上に配置し、更にその上に導電膜５０を配置し、第１の絶縁樹脂膜２６を第１の回路素子１４、第３の回路素子２０、および、受動素子２２と熱圧着する際に、導電膜５０を第１の絶縁樹脂膜２６と熱圧着して導電膜付き絶縁樹脂膜５２を形成することもできる。
次に、導電膜５０を、レーザー直描法、または、ウェット銅エッチングによって、ビア形成するビアパターニング工程およびＣｕを開口させる工程を行う。次に、図４に示すように、炭酸ガスレーザー照射、ＹＡＧレーザー照射、または、ドライエッチングを適宜組み合わせて、第１の絶縁樹脂膜２６にビアホールを形成するビアホール形成工程を行う。
次に、図５に示すように、高アスペクト比対応の無電解銅めっき、または、スパッタ等によりＣｕを成膜する。次に、電解銅めっきを施して、導電膜５４を形成すると共に、ビアホール内を導電性材料で充填するめっき工程を行う。次に、リソグラフィーとエッチングによりパターニングして高密度配線を形成し、第１の回路素子１４、第３の回路素子２０、および、受動素子２２間を電気的に導通させる配線形成工程を行う。
次に、図６に示すように、導電膜５６が付いた第２の絶縁樹脂膜２８を形成する。この工程によって、第１の絶縁樹脂膜２６上に第２の絶縁樹脂膜２８が形成され、第２の絶縁樹脂膜２８上に導電膜５６が形成される。
次に、図７に示すように、第２の絶縁樹脂膜２８およびその上部の導電膜５６についても、上述と同様に、ビアパターニング工程、ビアホール形成工程、めっき工程、および、配線形成工程を繰り返して、二層目の配線を形成する。
次に、図８に示すように、ＡＣＦ１８を挟んで回路素子部１６の素子面と第１の回路素子１４の素子面とが対向するように、基板７４を配置し、更に、その上に導電膜５８が付いた第３の絶縁樹脂膜３０を配置する。なお、ＡＣＦ１８を回路素子部１６の素子面に設ける工程、および、ＡＣＦ１８が素子面に設けられた回路素子部１６を第２の絶縁樹脂膜２８上に配置する工程の詳細は後述する。
次に、ＡＣＦ１８および第３の絶縁樹脂膜３０を加熱して、（１）ＡＣＦ１８によって、第２の絶縁樹脂膜２８およびビア２４と、回路素子部１６とを、（２）第３の絶縁樹脂膜３０によって、第２の絶縁樹脂膜２８と配線２９とを、それぞれ圧着させる。このように、ＡＣＦ１８および第３の絶縁樹脂膜３０が同一の工程で熱圧着されるため、製造工程を簡素化できる。
次に、第３の絶縁樹脂膜３０およびその上部の導電膜５８についても、上述と同様に、ビアパターニング工程、ビアホール形成工程、めっき工程、および、配線形成工程を繰り返して、三層目の配線を形成する。次に、フォトソルダーレジスト（ＰＳＲ）４１を成膜し、パターニングする。次に、回路装置１０の最上層の表面に形成された導電膜４０上に、ハンダ電極４２を形成する。こうして、図１に示すような回路装置１０が作製される。
次に、図９から図１１を参照しながら、本実施の形態に係る素子面にＡＣＦ１８が設けられた回路素子部１６を第２の絶縁樹脂膜２８に配置する工程について詳しく説明する。
まず、剥離シート７０，７２が両面に設けられたＡＣＦ１８を準備する。このとき、ＡＣＦ１８中のバインダは、一次硬化、半硬化、または、仮硬化した状態である。次に、図９に示すように、片面の剥離シート７０をはがして、ＡＣＦ１８を半導体ウエハ等の基板７４の回路素子部１６が形成されている面に仮貼着する。なお、剥離シート７０，７２は、例えば、ＰＥＴ（ＰｏｌｙＥｔｈｙｌｅｎｅ Ｔｅｒｅｐｈｔｈａｌａｔｅ）シートとすることができる。
次に、図１０に示すように、基板７４をダイシングする。このとき、剥離シート７２の一部にも切り込みが入るようにダイシングする。次に、図１１に示すように、ＡＣＦ１８が回路素子部１６に設けられた基板７４を剥離シート７２からはがして、第２の絶縁樹脂膜２８上に設置する。こうして、第１、第２の絶縁樹脂膜２６，２８、ビア２４、および、ＡＣＦ１８を介して、回路素子部１６の素子面が、第１の回路素子１４の素子面と対向するように仮配置される。
以上、実施の形態に基づいて本発明を説明したが、本発明は、上述の実施の形態に限定されるものではなく、当業者の知識に基づいて各種の設計変更等の変形を加えることも可能であり、そのような変形が加えられた実施の形態も本発明の範囲に含まれ得る。
例えば、層間を電気的に導通させる方法は、ビアホールに導電性材料を埋め込む方法に限らない。ワイヤを介して層間を電気的に導通させることもできる。この場合、ワイヤを封止材により覆ってもよい。
また、本実施の形態に係る回路装置１０では、絶縁性樹脂膜によって積層構造を形成したが、これに代えて、抵抗器の材料となるカーボン材料、または、キャパシタの構成部材となる高誘電率材料によって積層構造を形成してもよい。
本発明の実施の形態に係る回路装置を示す断面図である。 図１の回路装置の製造工程を説明する断面図である。 図１の回路装置の製造工程を説明する断面図である。 図１の回路装置の製造工程を説明する断面図である。 図１の回路装置の製造工程を説明する断面図である。 図１の回路装置の製造工程を説明する断面図である。 図１の回路装置の製造工程を説明する断面図である。 図１の回路装置の製造工程を説明する断面図である。 本発明の実施の形態に係るＡＣＦを備える基板を配置する工程を説明する断面図である。 本発明の実施の形態に係るＡＣＦを備える基板を配置する工程を説明する断面図である。 本発明の実施の形態に係るＡＣＦを備える基板を配置する工程を説明する断面図である。
符号の説明
１０ 回路装置、 １２ 基材、 １４ 第１の回路素子、 １６ 回路素子部、 １８ 異方性導電フィルム（ＡＣＦ）、 ２０ 第３の回路素子、 ２２ 受動素子、 ２４ ビア、 ２６ 第１の絶縁樹脂膜、 ２８ 第２の絶縁樹脂膜、 ３０ 第３の絶縁樹脂膜、 ４０ 導電膜、 ４２ ハンダ電極。

Claims (6)

  1. 第１の回路素子と、第２の回路素子とを備える回路装置であって、
    前記第１の回路素子と前記第２の回路素子とは、素子面同士が対向するように配置され、
    前記第１の回路素子の素子面に形成された端子と前記第２の回路素子の素子面に形成された端子とは、絶縁樹脂中に複数の導電性粒子を有する膜を介して電気的に導通していることを特徴とする回路装置。
  2. 前記第１の回路素子の素子面に形成された端子と、前記第２の回路素子の素子面に形成された端子は、異方性導電フィルムを介して電気的に導通していることを特徴とする請求項１記載の回路装置。
  3. 基材と、
    前記基材上に設けられた第１の回路素子と、
    前記第１の回路素子上に設けられた絶縁層と、
    前記絶縁層に設けられると共に、前記第１の回路素子の素子面に形成された端子と電気的に導通する導電体と、
    前記絶縁層上に設けられると共に、前記導電体と電気的に導通する導電性粒子を含む樹脂層と、
    前記樹脂層上に設けられると共に、素子面に形成された端子が前記導電性粒子と電気的に導通する第２の回路素子と、
    を有することを特徴とする回路装置。
  4. 基材上に、第１の回路素子を配置する第１回路素子配置工程と、
    前記第１の回路素子上に、異方性導電フィルムと第２の回路素子とを積層状に配置する第２回路素子積層配置工程と、
    前記第２の回路素子上に、絶縁樹脂を配置する絶縁樹脂配置工程と、
    前記第２回路素子積層配置工程、および、絶縁樹脂配置工程の後、前記異方性導電フィルムおよび前記絶縁樹脂を加熱して、前記第２の回路素子を異方性導電フィルムおよび絶縁樹脂に圧着する工程と、
    を有することを特徴とする回路装置の製造方法。
  5. 前記第２回路素子積層配置工程は、前記第１の回路素子上に、素子面に前記異方性導電フィルムが貼着された前記第２の回路素子を配置する工程であることを特徴とする請求項４記載の回路装置の製造方法。
  6. 前記第２回路素子積層配置工程において、前記第２の回路素子は、その素子面が前記第１の回路素子の素子面と対向するように配置されることを特徴とする請求項４または５記載の回路装置の製造方法。
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