JP6076675B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP6076675B2 JP6076675B2 JP2012224920A JP2012224920A JP6076675B2 JP 6076675 B2 JP6076675 B2 JP 6076675B2 JP 2012224920 A JP2012224920 A JP 2012224920A JP 2012224920 A JP2012224920 A JP 2012224920A JP 6076675 B2 JP6076675 B2 JP 6076675B2
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- JP
- Japan
- Prior art keywords
- die pad
- semiconductor device
- layer
- bonding
- heat dissipation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Description
互いに反対方向を向く主面および裏面を有するダイパッド部と、
上記ダイパッド部の上記主面に搭載された半導体チップと、
樹脂底面から凹んでいるとともに上記ダイパッド部の上記裏面を露出させる凹部が形成され、且つ、上記ダイパッド部および上記半導体チップを覆う封止樹脂部と、
上記凹部に配置された放熱層と、を備え、
上記凹部は、上記裏面が広がる方向において上記ダイパッド部よりも外側に位置し、上記樹脂底面に繋がる第1側面、上記第1側面に繋がり、上記裏面が向く方向を向く支持面、上記支持面に繋がり、上記裏面が広がる方向において上記ダイパッド部と上記第1側面との間に位置する第2側面、を有しており、
上記放熱層は、上記裏面が広がる方向において少なくとも一部が上記第1側面と上記第2側面との間に位置する外縁を有し、上記ダイパッド部の厚さ方向において上記第1側面と重なる放熱層、および上記放熱層と上記ダイパッド部との間に介在する接合層、を有することを特徴とする、半導体装置。
〔付記2〕
上記放熱層は、金属からなる、付記1に記載の半導体装置。
〔付記3〕
上記金属は、Cuである、付記2に記載の半導体装置。
〔付記4〕
上記接合層は、樹脂からなる、付記2または3に記載の半導体装置。
〔付記5〕
上記支持面と上記放熱層との間に、上記接合層の一部が介在する、付記4に記載の半導体装置。
〔付記6〕
上記凹部は、上記裏面が広がる方向において上記ダイパッド部よりも外側に位置し、且つ、上記裏面よりも上記主面側に位置する部分を有する溝を有しており、
上記接合層は、一部が上記溝に充填されている、付記1ないし5のいずれかに記載の半導体装置。
〔付記7〕
上記放熱層の一部は、その厚さ方向において上記凹部から突出している、付記6に記載の半導体装置。
〔付記8〕
上記溝は、上記裏面が広がる方向において上記放熱層に対して外側に位置する、付記6または7に記載の半導体装置。
〔付記9〕
上記凹部は、上記放熱層と上記溝との間に位置する部分を有する凹部底面を有する、付記8に記載の半導体装置。
〔付記10〕
上記溝は、上記裏面が広がる方向において上記ダイパッド部から離間するほど、上記ダイパッド部の厚さ方向において上記裏面側から上記主面側に位置するように傾斜している、付記6ないし9のいずれかに記載の半導体装置。
〔付記11〕
互いに反対方向を向く主面および裏面を有する複数のダイパッド部と、
上記複数のダイパッド部の上記主面に各別に搭載された複数の半導体チップと、
樹脂底面から凹んでいるとともに上記ダイパッド部の内の少なくとも一部の上記各裏面を共通に露出させる凹部が形成され、且つ、上記各ダイパッド部および上記各半導体チップを共通に覆う封止樹脂部と、
上記凹部に配置された放熱層と、を備え、
上記凹部は、上記裏面側において上記各ダイパッド部よりも外側に位置し、上記樹脂底面に繋がる第1側面、上記第1側面に繋がり、上記裏面が向く方向を向く支持面、上記支持面に繋がり、上記裏面が広がる方向において上記ダイパッド部と上記第1側面との間に位置する第2側面、を有しており、
上記放熱層は、上記裏面が広がる方向において少なくとも一部が上記第1側面と上記第2側面との間に位置する外縁を有し、上記ダイパッド部の厚さ方向において上記第1側面と重なる放熱層、および上記放熱層と上記各ダイパッド部との間に介在する接合層、を有することを特徴とする、半導体装置。
互いに反対方向を向くダイパッド主面およびダイパッド裏面を有するダイパッド部と、
上記ダイパッド主面に搭載された半導体チップと、
底面から凹んでいるとともに上記ダイパッド裏面を露出させる凹部が形成され、且つ、上記ダイパッド部および上記半導体チップを覆う封止樹脂部と、
上記凹部に配置され、上記ダイパッド裏面に対面する放熱層主面およびこの放熱層主面とは反対側にある放熱層裏面を有し、且つ、上記ダイパッド部に接合された放熱層と、を備え、
上記放熱層は、上記ダイパッド裏面が広がる方向において上記ダイパッド部よりも外側に位置し、上記放熱層裏面に繋がる第1側面、上記第1側面に繋がり、上記放熱層主面が向く方向を向く中間面、上記中間面に繋がり、上記ダイパッド裏面が広がる方向において上記ダイパッド部と上記第1側面との間に位置する第2側面、を有することを特徴とする、半導体装置。
〔付記2〕
上記放熱層は、セラミックスからなる、付記1に記載の半導体装置。
〔付記3〕
上記第1側面、上記中間面、および上記第2側面は、上記封止樹脂部に接している、付記1または2に記載の半導体装置。
〔付記4〕
上記放熱層の上記放熱層裏面は、上記封止樹脂部の上記底面と面一とされている、付記3に記載の半導体装置。
〔付記5〕
上記第1側面と上記中間面とは、第1角部を形成している、付記1ないし4のいずれかに記載の半導体装置。
〔付記6〕
上記中間面と上記第2側面とは、第2角部を形成している、付記1ないし5のいずれかに記載の半導体装置。
〔付記7〕
上記第1角部および第2角部の少なくともいずれかは、直角である、付記6に記載の半導体装置。
〔付記8〕
上記第1側面の上記放熱層の厚さ方向寸法は、上記第2側面の上記放熱層の厚さ方向寸法よりも大である、付記1ないし7のいずれかに記載の半導体装置。
〔付記9〕
上記放熱層と上記ダイパッド部とは、接合層を介して接合されている、1ないし8のいずれかに記載の半導体装置。
〔付記10〕
上記放熱層の上記放熱層主面には、上記放熱層の厚さ方向に対して直角である方向に延びる複数の溝が形成されている、付記9に記載の半導体装置。
〔付記11〕
上記各溝は、断面矩形状である、付記10に記載の半導体装置。
〔付記12〕
上記複数の溝のいずれかは、上記接合層に接している、付記10または11に記載の半導体装置。
〔付記13〕
上記複数の溝のいずれかは、上記封止樹脂部に接している、付記10ないし12のいずれかに記載の半導体装置。
〔付記14〕
互いに反対方向を向くダイパッド主面およびダイパッド裏面を有する複数のダイパッド部と、
上記複数のダイパッド主面に各別に搭載された複数の半導体チップと、
底面から凹んでいるとともに上記各ダイパッド裏面を共通に露出させる凹部が形成され、且つ、上記各ダイパッド部および上記各半導体チップを共通に覆う封止樹脂部と、
上記凹部に配置され、上記ダイパッド裏面に対面する放熱層主面およびこの放熱層主面とは反対側にある放熱層裏面を有し、且つ、上記各ダイパッド部に共通に接合された放熱層と、を備え、
上記放熱層は、上記ダイパッド裏面が広がる方向において上記各ダイパッド部よりも外側に位置し、上記放熱層裏面に繋がる第1側面、上記第1側面に繋がり、上記放熱層主面が向く方向を向く中間面、上記中間面に繋がり、上記ダイパッド裏面が広がる方向において上記ダイパッド部と上記第1側面との間に位置する第2側面、を有することを特徴とする、半導体装置。
1対の押さえ片を、ボンディング対象物の互いに離間した2か所に押圧した状態で、上記ボンディング対象物のうち上記1対の押さえ片が離間する方向において上記1対の押さえ片の間に位置する部位にワイヤをボンディングするワイヤボンディング工程を有することを特徴とする、ワイヤボンディング方法。
〔付記2〕
上記ワイヤボンディング工程においては、上記ボンディング対象物のうち上記1対の押さえ片を結ぶ直線と交差する部位に上記ワイヤをボンディングする、付記1に記載のワイヤボンディング方法。
〔付記3〕
上記ボンディング対象物は、金属板からなるダイパッド部と、このダイパッド部に搭載され、1以上の電極を有する半導体チップと、を含み、
上記ワイヤボンディング工程においては、上記ダイパッド部のうち上記半導体チップを挟む位置に上記1対の押さえ片を押圧した状態で、上記電極に対してワイヤをボンディングする、付記1または2に記載のワイヤボンディング方法。
〔付記4〕
上記半導体チップは、複数の電極を有しており、
上記ワイヤボンディング工程においては、上記複数の電極を挟む位置に上記1対の押さえ片を押圧した状態で、上記複数の電極に対して個別にワイヤをボンディングする、付記3に記載のワイヤボンディング方法。
〔付記5〕
上記ボンディング対象物は、金属板からなるワイヤボンディング部を含み、
上記ワイヤボンディング工程においては、上記ワイヤボンディング部に対して上記1対の押さえ片を押圧した状態で、上記ワイヤボンディング部にワイヤをボンディングする、付記1または2に記載のワイヤボンディング方法。
〔付記6〕
上記ボンディング対象物は、金属板からなるダイパッド部と、このダイパッド部に搭載され、1以上の電極を有する半導体チップと、上記ダイパッド部と離間したワイヤボンディング部と、を含み、
上記ワイヤボンディング工程においては、上記ダイパッド部のうち上記半導体チップを挟む位置に上記1対の押さえ片を押圧した状態で、上記電極に対してワイヤをボンディングし、
上記ワイヤボンディング工程の後に、上記ワイヤボンディング部に対して追加の1対の押さえ片を押圧した状態で、上記ワイヤボンディング部にワイヤをボンディングする追加のワイヤボンディング工程を有する、付記1または2に記載のワイヤボンディング方法。
〔付記7〕
上記半導体チップは、複数の電極を有しており、
上記ワイヤボンディング工程においては、上記複数の電極を挟む位置に上記1対の押さえ片を押圧した状態で、上記複数の電極に対して個別にワイヤをボンディングする、付記6に記載のワイヤボンディング方法。
〔付記8〕
上記ワイヤは、アルミニウムからなる、付記1ないし7のいずれかに記載のワイヤボンディング方法。
〔付記9〕
上記ワイヤボンディング工程においては、上記ワイヤに対して圧力および振動を加える、
付記8に記載のワイヤボンディング方法。
〔付記10〕
互いに反対方向を向く主面および裏面を有するダイパッド部と、
上記ダイパッド部の上記主面に搭載されており、1以上の電極を有する半導体チップと、
上記ダイパッド部および上記半導体チップを覆う封止樹脂部と、を備え、
上記ダイパッド部には、互いに離間する1対の押さえ痕が形成されており、
上記電極のうち上記1対の押さえ痕が離間する方向において上記1対の押さえ痕の間に位置する部位にワイヤの一端がボンディングされていることを特徴とする、半導体装置。
〔付記11〕
上記ワイヤの一端は、上記電極のうち上記1対の押さえ痕を結ぶ直線と交差する部位にボンディングされている、付記10に記載の半導体装置。
〔付記12〕
上記ダイパッド部に対して離間したワイヤボンディング部をさらに備えており、
上記ワイヤボンディング部には、互いに離間する追加の1対の押さえ痕が形成されており、
上記ワイヤボンディング部のうち上記追加の1対の押さえ痕が離間する方向において上記追加の1対の押さえ痕の間に位置する部位に上記ワイヤの他端がボンディングされている、付記10または11に記載の半導体装置。
〔付記13〕
上記ワイヤの他端は、上記ワイヤボンディング部のうち上記追加の1対の押さえ痕を結ぶ直線と交差する部位にボンディングされている、付記12に記載の半導体装置。
〔付記14〕
互いに反対方向を向く主面および裏面を有するダイパッド部と、
上記ダイパッド部の上記主面に搭載されており、1以上の電極を有する半導体チップと、
上記半導体チップとワイヤを介して電気的に接続されるリードと、
上記ダイパッド部、上記半導体チップおよび上記リードの一部を覆う封止樹脂部と、を備え、
上記リードの上記ワイヤの一端がボンディングされている接続部を挟む上記リードの表面には、互いに離間する1対の押さえ痕が形成されていることを特徴とする、半導体装置。
〔付記15〕
上記押さえ痕を有するリードは、押さえ痕のないリードよりも幅広の部分を有する、付記11に記載の半導体装置。
〔付記16〕
上記ワイヤは太さの異なる種類を有し、
上記押さえ痕は太さの太い上記ワイヤの接続部の近くのみに形成されている、付記11または12に記載の半導体装置。
〔付記17〕
上記半導体チップは複数あり、
上記太さの太いワイヤは一部の上記半導体チップと上記リードとの間のみを電気的に接続する、付記13に記載の半導体装置。
〔付記18〕
上記半導体チップを挟む上記ダイパッドの表面には、上記半導体チップを挟んで互いに離間する1対の押さえ痕が形成されている、付記11ないし14のいずれかに記載の半導体装置。
〔付記19〕
上記半導体チップは、複数あり、かつ、出力トランジスタとその制御用の半導体チップとを含み、
上記リードの押さえ痕は、上記出力トランジスタと接続された上記リードの接続部を挟んで互いに離間するように形成されている、付記11ないし15のいずれかに記載の半導体装置。
ダイパッド部の主面に導電性接合ペーストを塗布する塗布工程と、
上記主面が向く方向視における大きさが、上記導電性接合ペーストが塗布された領域よりも大である半導体チップの裏面を、上記主面が向く方向視において上記導電性接合ペーストが塗布された領域を内方に含むように上記導電性接合ペーストに接しさせる載置工程と、
上記導電性接合ペーストを軟化させた後に硬化させることにより導電性接合材を形成する接合工程と、
を備えることを特徴とする、半導体装置の製造方法。
〔付記2〕
上記導電性接合ペーストは、はんだペーストである、付記1に記載の半導体装置の製造方法。
〔付記3〕
上記塗布工程においては、開口を有するマスクによって上記主面を覆った後に、上記開口に上記導電性接合ペーストを埋める、付記2に記載の半導体装置の製造方法。
〔付記4〕
上記半導体チップの上記裏面は、上記ダイパッド部の上記主面よりも上記導電性接合ペーストに対する濡れ性が高い、付記1ないし3のいずれかに記載の半導体装置の製造方法。
〔付記5〕
上記半導体チップの上記裏面は、Ag、Au、Niまたはこれらの金属を含む合金からなり、
上記ダイパッド部の上記主面は、Cu、FeNi合金、Feのいずれかからなる、付記4に記載の半導体装置の製造方法。
〔付記6〕
主面を有するダイパッド部と、
裏面を有する半導体チップと、
上記ダイパッド部の上記主面および上記半導体チップの上記裏面の間に介在し、上記ダイパッド部と上記半導体チップとを接合する導電性接合材と、を備えており、
上記半導体チップの上記裏面と上記導電性接合材との接合面積は、上記ダイパッド部の上記主面と上記導電性接合材との接合面積よりも大であることを特徴とする、半導体装置。
〔付記7〕
上記導電性接合材は、はんだである、付記6に記載の半導体装置。
〔付記8〕
上記半導体チップの上記裏面は、上記ダイパッド部の上記主面よりも上記導電性接合ペーストに対する濡れ性が高い、付記6に記載の半導体装置。
〔付記9〕
上記半導体チップの上記裏面は、Ag、Au、Niまたはこれらの金属を含む合金からなり、
上記ダイパッド部の上記主面は、Cu、FeNi合金、Feのいずれかからなる、付記8に記載の半導体装置。
〔付記10〕
互いに反対方向を向く主面および裏面を有するダイパッド部と、
上記ダイパッド部の上記主面に搭載される複数の半導体チップと、
上記ダイパッド部の主面および上記複数の半導体チップのそれぞれの裏面との間に介在し、上記ダイパッド部と上記複数の半導体チップとを接合する導電性接合材と、を備えており、
上記複数の半導体チップのそれぞれの裏面と上記導電性接合材との接合面積は、上記ダイパッド部の主面に上記半導体チップに対応してそれぞれ形成された上記導電性接合材との接合面積よりも大であることを特徴とする、半導体装置。
〔付記11〕
上記半導体チップは、複数の出力トランジスタとその制御用の半導体チップとを有し、
上記複数の出力トランジスタにおいて、上記接合面積の関係を有する、付記9に記載の半導体装置。
〔付記12〕
上記複数の出力トランジスタの出力を外部にそれぞれ取り出すための複数のリードと、上記出力トランジスタと上記リードとをそれぞれ接続する複数のワイヤを更に有し、
上記ワイヤはアルミニウムである、付記10に記載の半導体装置。
1 第1電極部
11 ダイパッド部
111 主面
111 ダイパッド主面
112 ダイパッド裏面
113 押さえ痕
12 接続部
13 ワイヤボンディング部
131 (追加の)押さえ痕
14 リード
2 第2電極部
23 ワイヤボンディング部
24 リード
3 第3電極部
31 制御用ダイパッド部
32 リード
300 リードフレーム
41 半導体チップ
411 電極
412 裏面
413 裏面電極
42 半導体チップ
43 受動部品チップ
6 放熱層
61 放熱層主面
611 溝
62 放熱層裏面
631 第1側面
632 中間面
633 第2側面
634 第1角部
645 第2角部
65 金属層
66 接合層
69 接合層
7 封止樹脂部
71 樹脂主面
72 樹脂底面
73 樹脂側面
75 凹部
751 凹部底面
752 凹部側面
753 凹部溝
754 凹部第1側面
755 凹部第2側面
756 凹部支持面
8 ワイヤ
81 ファーストボンディング部
82 セカンドボンディング部
85 ボンディング装置
801 実装構造
807 基板
808 放熱部材
809 孔
810 ハンダ層
810 はんだ層
831 押さえ片
832 (追加の)押さえ片
851 キャピラリ
852 ガイド
853 カッタ
854 ベース
855 アーム
856 ワイヤリール
860 治具
861 支持面
862 支持面
881 金型
991 はんだ(導電性接合材)
991 接合層
991’ はんだペースト(導電性接合ペースト)
992 マスク
993 開口
Claims (6)
- 互いに反対方向を向く主面および裏面を有するダイパッド部と、
上記ダイパッド部の上記主面に搭載された半導体チップと、
上記ダイパッド部の上記裏面を露出させる凹部が形成され、且つ、上記ダイパッド部および上記半導体チップを覆う封止樹脂部と、
上記凹部に配置された放熱層と、を備え、
上記凹部は、上記裏面が広がる方向において上記ダイパッド部よりも外側に位置し、且つ、上記裏面よりも上記主面側に位置する部分を有する溝を有しており、
上記放熱層は、一部が上記溝に充填され、且つ、上記ダイパッド部の上記裏面に接する接合層を有するとともに、
上記放熱層は、上記接合層に対して上記ダイパッド部とは反対側に積層された金属層を有し、
上記溝は、上記裏面が広がる方向において上記金属層に対して外側に位置し、
上記凹部は、上記金属層と上記溝との間に位置する部分を有する底面を有し、
上記凹部は、上記裏面が広がる方向において上記ダイパッド部よりも外側に位置し、上記底面に繋がる第1側面、上記第1側面に繋がり、上記裏面が向く方向を向く支持面、上記支持面に繋がり、上記裏面が広がる方向において上記ダイパッド部と上記第1側面との間に位置する第2側面、を有しており、
上記金属層は、上記裏面が広がる方向において少なくとも一部が上記第1側面と上記第2側面との間に位置する外縁を有し、上記ダイパッド部の厚さ方向において上記第1側面と重なっていることを特徴とする、半導体装置。 - 上記金属層は、Cuからなる、請求項1に記載の半導体装置。
- 上記接合層は、樹脂からなる、請求項1または2に記載の半導体装置。
- 上記金属層の一部は、その厚さ方向において上記凹部から突出している、請求項1ないし3のいずれかに記載の半導体装置。
- 上記溝は、上記裏面が広がる方向において上記ダイパッド部から離間するほど、上記ダイパッド部の厚さ方向において上記裏面側から上記主面側に位置するように傾斜している、請求項1ないし4のいずれかに記載の半導体装置。
- 上記支持面と上記金属層との間に、上記接合層の一部が介在する、請求項1ないし5のいずれかに記載の半導体装置。
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CN104025287A (zh) | 2014-09-03 |
US10504822B2 (en) | 2019-12-10 |
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US20170162485A1 (en) | 2017-06-08 |
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