TW200941684A - Leadframe board, semiconductor module, and method for making a leadframe board - Google Patents

Leadframe board, semiconductor module, and method for making a leadframe board Download PDF

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Publication number
TW200941684A
TW200941684A TW098106345A TW98106345A TW200941684A TW 200941684 A TW200941684 A TW 200941684A TW 098106345 A TW098106345 A TW 098106345A TW 98106345 A TW98106345 A TW 98106345A TW 200941684 A TW200941684 A TW 200941684A
Authority
TW
Taiwan
Prior art keywords
lead frame
resin
bonding material
frame substrate
pattern
Prior art date
Application number
TW098106345A
Other languages
Chinese (zh)
Inventor
Seiji Oka
Takeshi Oi
Yoichi Goto
Masaki Goto
Kiyofumi Kitai
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of TW200941684A publication Critical patent/TW200941684A/en

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/202—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using self-supporting metal foil pattern
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861—Lead-frames fixed on or encapsulated in insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09881—Coating only between conductors, i.e. flush with the conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/17—Post-manufacturing processes
    • H05K2203/175—Configurations of connections suitable for easy deletion, e.g. modifiable circuits or temporary conductors for electroplating; Processes for deleting connections

Abstract

This invention provides a leadframe board on which electronic components such as power semiconductor elements are to be mounted. The leadframe board has an excellent heat dissipating characteristic even with a high density arrangement of the electronic components to be mounted and also an excellent dependability of mounting. The leadframe board 1 is obtained by the manufacturing method which comprises: a first process for obtaining a leadframe 2 from a metal sheet, the leadframe 2 having a plurality of patterns 11 each being independent from another and connecting portions 21 connecting adjoining patterns with each other, a filling process for filling the clearance portions 22 with a resin bonding material 13, the clearance portions 22 being formed in between adjoining patterns by the first process and a second process for removing by press-punching of the connecting portions.

Description

200941684 六、發明說明： 【發明所屬之技術領域】 本發明係有關特別適合用於電力用半導體模組的引線 架基板、半導體模組、以及引線架基板之製造方法。 【先前技術】 近年來，隨著電力用半導體模組的小型化、高性能化 的需求，也出現了電力用半導體元件之高密度安裝化的需 求。為了實現該需求而期望使安裝有電力用半導體元件的 引線架基板也成為高密度且小型化者。結果，為了高密度 化而藉由蝕刻製程將銅箔圖案形成所製造的如金屬基板之 於任意位置可形成獨立之圖案的引線架基板構造之開發、 及電力用半導體元件之發熱如何散熱即成為重要的課題。 以往，就改良如上所述之散熱性的同時達成引線架基板之 高密度化的方法而言，已知有一種於殘留有圖案間之連結 部的引線架基板之單面重疊填充有未硬化的無機填料之熱 傳導樹脂片材，於該狀態下，將電路上不要的連結部與片 材一起鑿穿切斷，之後，將熱傳導樹脂片材單獨地或與散 熱用金屬板一起加熱•加壓鑿穿後所形成的孔部分、以及 電路圖案間以片材埋設一體化且硬化後，將電子零件以焊 料等進行安裝的方法（例如參照專利文獻1)。 專利文獻1 :日本國特開2002-33558號公報（第1頁、第2 圖） 【發明内容】 (發明所欲解決之課題） 4 321057 200941684 於如上所述之習知的引線架 圖案間之連結部的步驟中认板中’在鑾穿引線架之 硬化，故樹脂之強“，而相=賴傳導樹脂片材未 導樹脂片材與連結部周邊的、穿歷力而使熱傳 故在後序步驟之電子零件之安^=生部分彎曲等變形’ 佳地進行錢，“會㈣力^難㈣電子零件平坦性 Ο ❹ 焊料的連接可靠性降低的_。件與引線架間之 片材而難以確保與料㈣之 ，⑤重疊有未硬化 連、、“之步驟中會產生片材剥離、破損等絕緣可靠性的問 題。另外，在僅於引線牟之嚴如 U緣"^的問 Φ ^心承丄 侧形成熱傳導樹脂片的構造 焊接電力料導體元件等電子零件的回流（reflow) f驟中，會㈣熱傳導樹脂片材之熱膨脹係數的失誤匹配 :matching)而使引線架產生彎曲而難以安裝電子零 件等課題。 (解決課題的手段） 本發明之引線架基板係具有：複數個圖案，用以保持 電子零件而彼此獨立；以及樹脂接合材，填充於鄰接的圖 案間之間隙部且將該鄰接之圖案彼此連接。 另外，本發明之半導體模組係於前述本發明之引線架 基板安裝有由電力用半導體元件所構成的電子零件。”BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame substrate, a semiconductor module, and a method of manufacturing a lead frame substrate which are particularly suitable for use in a power semiconductor module. [Prior Art] In recent years, with the demand for miniaturization and high performance of power semiconductor modules, there has been a demand for high-density mounting of power semiconductor elements. In order to achieve this demand, it is desirable to make the lead frame substrate on which the power semiconductor element is mounted also high in density and miniaturization. As a result, in order to increase the density, the development of the lead frame substrate structure in which the copper foil pattern is formed by forming the copper foil pattern by an etching process at an arbitrary position, and the heat generation of the power semiconductor element can be dissipated. Important topic. Conventionally, in order to improve the heat dissipation property as described above and to achieve a high density of the lead frame substrate, it is known that a single surface of a lead frame substrate in which a connection portion between patterns remains is filled with an uncured portion. In this state, the heat-conductive resin sheet of the inorganic filler is cut and cut together with the sheet on the circuit, and then the heat-conductive resin sheet is heated separately or together with the heat-dissipating metal sheet. A method of attaching the electronic component to the solder or the like after the hole portion formed after the insertion and the circuit pattern are integrated and hardened by the sheet (see, for example, Patent Document 1). Patent Document 1: Japanese Laid-Open Patent Publication No. 2002-33558 (first page, second drawing) [Description of the Invention] (Problems to be Solved by the Invention) 4 321057 200941684 Between the conventional lead frame patterns as described above In the step of the connecting portion, in the embossing plate, 'the hardening of the lead frame is hardened, so the resin is strong", and the phase = the conductive resin sheet is not guided by the resin sheet and the peripheral portion of the connecting portion is subjected to heat generation. In the following steps, the electronic parts are replaced by the deformation of the electronic part, etc. 'Good for money, 'will be (four) force ^ difficult (four) electronic parts flatness Ο 焊料 solder connection reliability is reduced _. The sheet between the piece and the lead frame is difficult to ensure that the material (4) is overlapped with the unhardened joint, and the problem of insulation reliability such as peeling and breakage of the sheet occurs in the step.严如U缘"^ Φ ^The structure of the heat-conducting resin sheet is formed on the side of the heart-bearing side. The reflow of the electronic parts such as the welding power material conductor element is reflowed. In the fourth step, the thermal expansion coefficient of the heat-conductive resin sheet is mismatched. : Matching) causes the lead frame to be bent and it is difficult to mount an electronic component. (Means for Solving the Problem) The lead frame substrate of the present invention has a plurality of patterns for holding electronic components independently of each other, and a resin bonding material. The semiconductor module of the present invention is mounted on the lead frame substrate of the present invention, and the electronic component formed of the power semiconductor element is mounted on the gap portion between the adjacent patterns.

另外，本發明之引線架基板之製造方法係包含：形成 具有從金屬板彼此獨立的複數個圖案及 ▲ S J 連接之連結部的引線架的第-加工步驟^的圖案彼此 奋於兹山斗拉 將樹脂接合材填 充；猎由該加工步驟而形成的鄰接之_案間之間隙部 321057 5 200941684 的步驟；以及藉由衝壓而將前述連結部鑿穿去除的第二加 工步驟。 (發明之效果） 本發明之引線架基板係藉由樹脂接合材將彼此獨立之 複數個圖案間填充而連接之構造，故不需如以往地將圖案 拉繞至引線架基板之外周部而可於引線架内形成獨立的圖 案，因此，可使引線架基板之安裝面積高密度化。另外， 由於可使圖案之上表面及下表面成為露出有作為構成素材 之金屬材之表面的狀態，藉此不會有以往之製造過程中會 產生的彎曲，而可密著性佳且高密度地安裝電子零件。 另外，本發明之半導體模組由於係使用如上所述之平 坦性佳且高密度化後之引線架基板，故可高密度地安裝由 電力用半導體元件所構成的電子零件，且藉由使用任意厚 度之引線架材而可得到散熱特性佳、可靠性提昇之效果。 另外，依據本發明之引線架基板之製造方法，由於不 會產生對將彼此獨立之複數個圖案互相連接的連結部進行 鑿穿時的彎曲等變形，故可得到可精密度良好地安裝電子 零件之品質優良的引線架基板。 【實施方式】 第一實施形態 第1圖及第2圖係示意性顯示適合於本發明之第一實 施形態之電力用半導體模組的引線架基板之俯視圖，第2 圖係示意性顯示於第1圖所示之引線架基板之剖面構造的 圖。又，第1圖為將外部電極彎曲加工後之圖，而且，為 6 321057 200941684 了使構造易於理解而省略構成構件之厚度的圖示。另外， 各圖中同一符號係表示同一或相當的部分。於圖中’引線 架基板1係具有：複數個圖案（島（island)部）11，為了保 持例如電力用半導體元件等電子零件而彼此獨立；複數個 外部電極，分別設置於兩側部；以及樹脂接合材13 ’填充 於彼此鄰接的圖案11之間且使該鄰接之圖案11互相迷 接。另外’於複數個圖案11及複數個外部電極12彼此間 的預定位置係開設有孔14，該孔14係藉由鑿穿將於下迷 第三實施形態詳述之製造過程中設置的連結部21(參照第 4圖）予以切除的部分，且使複數個圖案u及複數個外部 電極12彼此間成為電性絕緣的狀態。 就構成前述圖案11及外部電極12的引線架2而言棱 佳的材料係可列舉鋁板、銅板等電傳導性及熱傳導性良好 的金屬板’尤其在低熱阻化中較適合使用銅板。另外，讀 引線架2之厚度係可依據安裝於引線架基板1的電力用半 ©導體元件等電子零件的電壓•電流等而任意選定，通常例 如係使用〇. 3至丄〇mm左右者，而非特別被限定於上述範 圍内者。另外’引線架2.之表面係例如藉由鍍鎳、鍍錫而 處理加—般而言可使用防止銅氧化者。而且，就連接前述 引線木2之圖案11彼此間的樹脂接合材13而言，較佳^ 可使1例如包含熱硬化性樹脂、硬化劑、以及硬化促進齊4 的樹脂構成物所構成的熱硬化性樹脂接合材。又，考慮與 所才木用的弓I線架2之熱膨脹率間的匹配，亦可於該熱硬化 性樹月曰接合材中適當混合無機填料等。另外，亦可使用具 321057 200941684 有同樣效果的抗焊劑（s〇lder resist)用乾膜等來取 硬化f生樹&接合材。又，由於將於下三 詳述=料仏此省略其說明。 〜形態 接者’針對如上所述而構成的第一實施形態 =。如前述以圖及第2圖所示的引線架基板= 進 而圖案U及外部電極12係彼此藉由樹脂接合 口者且—體化，而圖案11及外部電極丨2之上矣 表面係露出有素材之金屬表面(鍍覆面)。而且，=下 ❹ 段中將引線架2之圖宰 在製造階 费μ本“間連結部21(第4 .整 穿的步驟中，藉由使用硬化後的樹脂接合部來取鑿 的熱傳導樹則材喊昇樹脂之強度，故不會^硬化 (press)模具之馨穿壓力而使孔14之周邊圖 = 曲等變形，而可於平面方向平滑地形成高密度宰二背 從而’在如上所述的引線架基板1安裝未 案11。 .¾. ejL 厘1不的雷六田土 導體元件和電路零件等電子零件時，該電子零 /用丰 圖案11平坦性佳，具有與焊料的良好密著M牛係相對於 〇 進行安裴。因此，藉由焊料連接電子零件與 同…度 連接可靠性也會提昇。 A U間時之 如上所述，第一實施形態之引線架基板2係具 二 了保持電子零件而彼此獨立的複數個圖柰 ’、八 ·為 示11，以及填充於 鄰接的圖案11間之間隙部而將該鄰接的圖案u / ' 、 的樹脂接合材13;圖案U部並無局部f曲等變：此= 平面方向整體平滑且高密度地形成圖案u。因此，將電力 用半導體元件等電子零件安裝於引線架基板的安裝製程也 321057 200941684 可直接使用通常的製程•裝置，且可密著性、平坦性佳、 且高密度地安裝該電子零件。因此，可獲得易於確保電子 零件與圖案11間之焊料的連接可靠性等效果，且也可提昇 作為半導體模組時之可靠性。 第二實施形態 第3圖係顯示謀求本發明第二實施形態之引線架基板 的樹脂接合材間之接合性提昇的扣合凸部之要部平面圖。 於圖中，係在圖案11與樹脂接合材13間之接合部設有謀 ® 求接合性提昇的扣合凸部15。於此例中，係如橢圓A内所 示於鄰接的圖案11之相對向的側面部彼此形成壺狀的凹 部，且以樹脂接合材13凸狀地進入該凹部内的方式於樹脂 接合材13側構成錨狀的扣合凸部15。又，於第3圖所例 示的扣合凸部15僅為一例，只要圖案11與樹脂接合材13 之接合面為彼此扣合的凹凸，則亦可於圖案11和樹脂接合 材13之任一者設置扣合凸部15。另外，就形狀而言亦可 Q 為例如三角形狀、梯形狀、楔形狀等任意形狀。另外，不 一定要為鄰接的圖案11之相對向位置，亦可於圖案11與 樹脂接合材13之一方形成凹部和凸部兩方。又，就大小而 言，若扣合凸部15過大，則安裝電子零件的圖案11部會 成為大面積，而不利於所得的半導體模組之小型化、高密 度化，因此就該扣合凸部15之大小而言，期望為可藉由鑿 穿或银刻等進行加工之最小的大小，且比起增加其大小， 更期望增加扣合凸部15之設置數量。 在如上所述之方式構成的第二實施形態中，藉由在引 9 321057 200941684 線架2之圖案11與樹脂接合材13間之接合部設置提昇接 合性用的扣合凸部15，而使樹脂接合材13以錨狀或楔形 狀陷入該扣合凸部15,而大幅地提昇圖案u部的接合強 度。藉此，在將電力用半導體元件等電子零件焊接在^案 11的回流步驟、以及之後的引線搭接（wire b〇nd)步驟中^ 也可防止產生獨立圖案11之脫落、彎曲等缺失，而提 裝可靠性。 接著，依據圖式說明本發明之引線架製造基板的 方法。 第三實施形態 第4圖至第7圖為說明本發明之第三實施形態的引線 架基板之製造方法的圖，第4圖為顯示於第一加工步驟之 一次塞穿後的引線架的平面圖，帛5圖係顯示於第4圖所 讀引線架之鄰接的圖案間之間隙部填充樹月旨接合材之步 =中所用的樹脂接合材 材進行配設時之位置_的剖面 圖▲’第6圖為顯示於引線架之圖案間填充樹月旨接合材後之 6圖所示的職基板之剖 士入屈…第二實態中，首先，係藉由第1加工步驟， 板獲得具有彼此獨立之複數侧案丨卜外部電極 接 1 及將鄰接的圖案11彼此連接的連結部21的引線架 ’於連接的圖案U間之間隙部22進行填 合材的步驟，之徭，於楚 、f月曰接 部21切斷去^1、加工步驟中，藉由衝壓將連結 刀斷去除而传到目的之引線架基板。 第4圖係顯示藉由前述第1加工步驟而得的引線架2。 321057 10 200941684 又，於該第三實施形態中，就金屬板而言，可使用於表面 施有鍍鎳的厚度1. Omm之銅板，藉由對該銅板以衝壓方式 進行鑿穿加工，可得到引線架2,其係具有：複數個圖案（島 部）11，如第4圖所示彼此獨立；連接部21，將鄰接的圖 案11彼此連接；複數個外部電極12 ;以及間隙部22，藉 由鑿穿而形成。又，該第一加工步驟即使為藉由蝕刻而進 行的加工亦無妨。另外，當然圖案11和外部電極12之大 小、形狀、數量、配置等可依據期望而適當變更。 ® 接著，就於圖案11間之間隙部22填充樹脂接合材的 步驟而言，在此，將具有填充圖案11彼此間之間隙部22 所需之充分體積的任意厚度之未硬化的樹脂接合材片材31 如第5圖所示地設置於引線架2之上表面後，藉由將該樹 脂接合材片材31設置於省略圖示之例如習知的真空加熱 衝壓或真空加熱疊層裝置之熱盤上而進行加壓加熱，可使 樹脂接合材片材31流動而在填充於圖案11間之間隙部22 Q 的同時進行硬化。於該方法時，由於可總括地進行填充和 硬化，因而可謀求製程之低成本化。又，加壓時藉由於引 線架2和裝置下面之熱盤間設置有具有彈性的鐵氟龍（註 冊商標）等耐熱片材，而可防止樹脂接合材片材31之樹脂 於衝壓、或層疊時通過圖案11間之間隙部22而迴繞至引 線架2之下表面的金屬面上。又，當於引線架2之上表面 殘留有樹脂接合材片材31之樹脂時，例如可以拋光（buff) 研磨等習知適當手段去除而使金屬面露出。 另外，就於引線架2之上表面不殘留樹脂的方法而 11 321057 200941684 言，將以具有和引線架2相同圖案的極薄金屬或樹脂作成 的遮罩板設置於樹脂接合材片材31與引線架2之間，而以 如上所述的製程填充樹脂接合材後，藉由剝離前述遮罩材 而可獲得與上述同樣地於上表面不殘留有樹脂的引線架2。 第6圖係顯示經由如上所述之第1加工步驟、以及於 圖案間之間隙部填充樹脂接合材之步驟而得的引線架2， 於引線架2之圖案11間之各間隙部22係填充有樹脂接合 材片材31硬化的樹脂接合材13，而將圖案11彼此間、以 及圖案11與外部電極12間接著。又，將圖案11彼此、以 及圖案11與外部電極12連結的連結部21係於此時間點仍 殘留。之後，於利用衝壓的2次加工步驟中，在不重疊半 硬化狀之片材之情況下，將圖案11間、以及圖案11與外 部電極12之間的連結部21鑿穿去除後，藉由使外部電極 12折曲加工而成形，而獲得如第1圖所示之引線架基板1。 又，由2次加工步驟而進行的連結部21之去除和外部電極 12之折曲加工的順序何者為先皆無妨，另外，也可同時進 行。 如上所述，第三實施形態之引線架基板之製造方法係 包含：藉由對金屬板進行衝壓而形成具有彼此獨立的複數 個圖案、和將鄰接的圖案彼此連接之連結部的引線架的第 1加工步驟；於鄰接的圖案間之間隙部填充樹脂接合材的 步驟；以及藉由衝壓而去除上述連結部的第2加工步驟。 依據此方法，由於在第2加工步驟中未疊合半硬化狀之片 材，故即使將用以連接圖案11彼此的連結部21鑿穿時也 12 321057 200941684 不會產生彎曲等變形，而可獲得於平面方向平滑且品質優 良的引線架基板1。另外，就於鄰接的圖案11間之間隙邛 22填充樹脂接合材的步驟而言，在此由於使用未硬化的樹 脂接合材片材31，故可獲得可簡單地於圖案U間壤 脂接合材的效果。 、 (第四實施形態） 第8圖為示意性說明本發明第四實施形態之引線架基 ❹板之製造方法中於鄰接圖案間之間隙部填充樹脂接合材的 步驟之要部的說明圖。又，本第四實施形態係至第丨加工 步驟為止與第三實施形態相同。藉由第1加工步驟而獲得 與第4圖相同的引線架2後，使用液狀的熱硬化性樹脂接 s材塗料32作為形成樹脂接合材Μ的樹脂材料，如第§ 圖所不將該樹脂接合材塗料32於引線架2上之適當位置載 置預疋置後，使用括漿板（SqUeegee)33而於引線架2上展 開，且藉由真空印刷法而填充於引線架2之圖案U間之間 ©隙部22後，使用乾燥機將填充於間隙部22的樹脂接合材 糊料32加熱硬化，藉此得到例如與第7圖相同的引線架基 板。於該第四實施形態中，藉由使用真空印刷法進行對於 間隙部22的樹脂材料之填充，可從填充於間隙部22的樹 知接合材糊料之容積（bulk)中去除空洞（v〇id)，而可綿密 地填充樹脂接合材糊料32。 又’雖於前述填充步驟中可某種程度地防止樹脂接合 材殘留於引線架2之上下圖案部，但在於引線架2之圖案 U部表面殘留有樹脂接合材時，可與第三實施形態相同地 13 321057 200941684 藉由拋光研磨等予以去除而露出金屬面。 更且，當於真空印刷時使用形成有與引線架相同之圖 案的金屬遮罩，藉此即可防止於引線架2之圖案11部表面 有樹脂殘留。 關於防止樹脂朝引線架2之下表面的繞入，在以第1 加工步驟進行一次鑿穿後之引線架的下表面貼合具有黏著 性之耐熱片後，實施真空印刷即可達成。 之後，進行二次鑿穿的第二加工步驟、外部電極12之 折曲加工係與第三實施形態相同地進行，藉此而可獲得本 發明之第1圖所例示的引線架基板。 如上所述，於第四實施形態之製造方法中，由於係使 用真空印刷法而將樹脂接合材糊料32填充於間隙部22， 故於填充的樹脂接合材之容積中不會產生空洞，而可獲得 使鄰接的圖案11彼此及外部電極12更穩固地連接的引線 架基板1。 (第五實施形態） 第9圖及第10圖為說明本發明之第五實施形態的引線 架基板之製造方法的圖，第9圖為表示第1加工步驟結束 後的引線架之剖面圖，第10圖為所得的引線架基板之剖面 圖。於此第五實施形態中，在進行第1加工步驟前，在與 第三實施形態相同的表面施以鍍鎳後的厚度1. Omm之銅板 的上下兩面之整面，預先貼合接著有單面具有黏著性的厚 度約20/z m之PET製的樹脂膜4之黏著面。接著，與第三 實施形態相同地，於第一加工步驟中藉由以模具鑿穿而使 14 321057 200941684 第9圖所示之引線架2的兩面接著樹脂膜4，而獲得形成 有用以區隔圖案11間之間隙部22之剖面形狀的引線架2。 之後，以與第三實施形態或第四實施形態相同的方法，於 引線架2之間隙部22填充樹脂接合材13且使其硬化。接 著，藉由將樹脂膜4從引線架2剝離，即可獲得如第10圖 所示之樹脂接合材13之厚度為從引線架2之厚度加算相當 於樹脂膜4之厚度的尺寸，而從引線架2之表面突出者。 之後的2次加工步驟、外部電極12之折曲加工也與第三、 ® 第四實施形態相同地進行，藉此而獲得引線架基板1。 依據如上所述之第五實施形態，藉由在以樹脂膜4預 先覆蓋於引線架2進行加工的金屬板之表面的狀態下進行 第一加工步驟的鑿穿加工，而可於鄰接的圖案間之間隙部 填充樹脂接合材的步驟中，防止樹脂接合材13直接附著於 引線架2之圖案11表面。因此，即使在間隙部22以外的 部分殘留有樹脂接合材13的情形時，在樹脂接合材13之 Q 硬化後，藉由剝離樹脂膜4 1即可輕易地使圖案11之上下 金屬面露出，於第三實施形態之真空加熱衝壓、或真空加 熱疊層步驟、及第四實施形態之真空印刷步驟中，樹脂接 合材13於圖案11部的殘留已不構成問題，故可有效率地 進行製造。 (第六實施形態） 第11圖、第12圖為說明本發明之第六實施形態的引 線架基板之製造方法的圖，第11圖為顯示於鄰接的圖案間 之間隙部填充作為樹脂接合材而使用的抗焊劑用乾膜後之 15 •321057 200941684 2態的剖面圖’第12圖為顯示去除了第U圖所示之抗焊 背J用乾膜之不要部分後之狀態的剖面圖。於該第六實施形 態之製造方法中’首先使用於與前述第三實施形態相同的 表面施有錢鎳的厚度1. 〇_之銅板，同樣地不進行一次加 工步驟’而獲得在與第4_同的鄰接圖案u間殘留有連 結部21的狀態之引線架2。接著，在將樹脂接合材填充於 圖=11 1¾之間隙部22財驟中，取代樹賴合材片材、 樹脂接合材_等*使用抗焊姻乾膜34，載置於獲得有 該抗焊劑用乾膜34的引線架2之上表面後，藉由習知之真 空加熱疊層裝置使其疊層，藉此於第11圖所示之圖案u 間之間隙部22填充抗焊_乾膜之樹脂，同時於安裝 子零件的引線架2之上表面整面獲得例如以1()至之 厚度覆蓋形成有抗焊劑用乾膜34者。 之後’使用用以形成圖案11上所安裝的電子零件之定 位部=之例如對應電子零件之形狀的遮罩（皆省略圖 二），藉由進㈣光步驟、顯像步驟、硬化步驟，而 =接圖部22填充抗焊綱翻34之樹脂作為樹 “體元件等μ㈣突出的部分形成電力用 +¥體疋件4電子零件之定位部13a的圖$(省略詳 2示力)係t成㈣線架2之上表面。之後’進行s穿加工的第 2加工步驟、外部電極12之折曲加工係與第三、 五實施形態相同。 ^ 第 如上所述，第六實施形態之製造方法中， 劑用乾膜34作為樹脂接合材13，將該抗焊_ =用3 321057 16 200941684 跨引線架2上之圖案11與間隙部22之整面而設置，藉由 曝光步驟、顯像步驟將圖案11上之不要的部分去除，另一 方面，由於圖案11上突出的樹脂接合材之周圍部成為電子 零件之定位部13a，因此也可得到於電子零件之安裝時可 簡單地進行電子零件之定位的附加效果。另外，間隙部22 之樹脂接合材13係於圖案11之周圍部延伸而設置成剖面 T字狀，因此接觸面積會增大，也可獲得提昇鄰接的圖案 11彼此之接合強度的效果。 ®第七實施形態 第13至第15圖為概念性地說明本發明之第七實施形 態的半導體模組之内部構成的圖，第13圖為在製造步驟中 於引線架基板安裝電子零件後，實施引線搭接之狀態的鳥 瞰圖，第14圖為顯示於第13圖所示的安裝基板經由熱傳 導樹脂片而安裝金屬基材板之封裝前的半導體模組之剖面 圖，第15圖為顯示第14圖之變形例的剖面圖。該第七實 ◎ 施形態之半導體模組係使用藉由於前述第三至六實施形態 所例示的製造方法而得的第一、第二實施形態之第1圖至 第3圖所示的於上下面露出金屬面之狀態的引線架基板1 作為基礎。例如係將包含電力用半導體元件的預定之複數 個電子零件5如第13圖所示安裝於如第1圖之引線架基板 1之圖案11上表面後，將電子零件5間、電子零件5與圖 案11間、及電子零件5或圖案11與外部電極12間用搭接 引線6電性連接後，如第14圖所示經由具有絕緣性且熱傳 導性良好的熱傳導樹脂片7而接合由鋁或銅材料所構成的 17 321057 200941684 金屬基材板8。 之後’使用形成預定形狀、尺寸的框，以例如矽膠 C/ 1 icone ge 1)樹脂、液狀環氧（ep〇xy)樹脂等封裝樹脂材 # ’ AiEth外部電極12的狀態下，封裝成使金屬基材板 旨片？與相反面露出的形狀，藉此即可獲得 目1之電力用半導體模組（圖示省略）。X，就_L述熱傳導 7而§較佳為可使用熱傳導性優良之屬於無機填料 之將例如氧化叙、氮化鋁、氮化硼等混合在熱硬化性樹脂 的熱硬化性樹脂片等。另外，就封裝方法而言 ，除了矽膠 樹月曰或液狀環氧樹脂以外，也可使用利用模具的移轉封裝 方法等。更且’如第15圖之變形例所示，亦可直接接合金 屬冷卻片8A來取代金屬基材板8。 如上所述而構成的第七實施形態之半導體模組，由於 引線架基板1於其製造過程中藉由衝壓將連結部21(第4 圖）馨穿時’存在有該連結部21(第4圖）的部分之孔14(第 圖）月邊的圖案11部並無局部地變曲等變形，..而於平面 方向平滑地形成’故在安裝電力用半導體元件和電路零件 等電子零件5時，可密著性、平坦性佳且高密度地安裝該 電子零件5。另外，由於密著性、平坦性佳，故電子零件5 =圖案11間之焊料的連接可靠性也較高。另外，隔介熱傳 V樹脂片7之與金屬基材板8的密著度也較高，故散熱特 性良好，而可獲得穩定性提昇的顯著效果。 【圖式簡單說明】 第1圖為示意性顯示本發明第一實施形態之引線架基 18 321057 200941684 板的鳥瞰圖。 第2圖為示意性顯示第1圖之引線架基板的剖面構造 的圖。 第3圖為顯示謀求本發明第二實施形態之引線架基板 的樹脂接合材間之接合性提昇的扣合凸部的要部平面圖。 第4圖為顯示本發明第三實施形態之引線架基板之製 造方法中的第一加工步驟之一次馨穿後的引線架之平面 圖。 ® 第5圖為說明將在填充樹脂接合材的步驟中所使用的 樹脂接合材片配設於第4圖所示之引線架的鄰接圖案間之 間隙部時之位置關係的剖面圖。 第6圖為顯示於第4圖所示之引線架之圖案間填充樹 脂接合材之狀態的平面圖。 第7圖為於第6圖所示的引線架基板之剖面圖。 第8圖為於本發明之第四實施形態之引線架基板之製 @ 造方法中在鄰接圖案間之間隙部填充樹脂接合材的步驟之 主要部分的概念性說明圖。 第9圖為顯示於本發明之第5實施形態的引線架基板 之製造方法中的第一加工步驟結束後之引線架的剖面圖。 第10圖為顯示從於第9圖所示之引線架加工而成的引 線架基板的剖面圖。 第11圖為顯示在本發明第6實施形態之引線架基板之 製造方法中，於鄰接圖案間之間隙部填充作為樹脂接合材 而使用的抗焊劑用乾膜後之狀態的剖面圖。 19· 321057 200941684 第12圖為顯示將第11圖所示之抗焊劑用乾膜之不要 部分去除之狀態的剖面圖。 第13圖為顯示本發明第7實施形態之半導體模組之製 造步驟中於引線架基板安裝電子零件後實施引線搭接後之 狀態的鳥瞰圖。 第14圖為顯示於第13圖所示之安裝基板經由熱傳導 樹脂片材而安裝金屬基材板之封裝前半導體模組的剖面 圖。 第15圖為顯示第μ圖之變形例的剖面圖。 【主要元件符號說明】 1 引線架基板 2 引線架 4 樹脂膜 5 電子零件 6 搭接引線 7 熱傳導樹脂片 8 金屬基材板 8A 金屬冷卻片 11 圖案（島部） 12 外部電極 13 14 樹月曰接合材 13a 定位部 孔 15 扣合凸部 21 r\ 1 連結部 22 間隙部 31 33 樹脂接合材片材 括漿板 32 34 樹脂接合材糊料 阻烊劑用乾膜 321057 20Further, the method of manufacturing the lead frame substrate of the present invention comprises: forming a pattern of the first processing step of the lead frame having a plurality of patterns independent of the metal plates and the connection portion of the ▲ SJ connection; The resin bonding material is filled; the step of the adjacent gap portion 321057 5 200941684 formed by the processing step; and the second processing step of cutting the aforementioned connecting portion by punching. (Effects of the Invention) The lead frame substrate of the present invention has a structure in which a plurality of patterns independent of each other are filled by a resin bonding material, so that it is not necessary to draw the pattern to the outer peripheral portion of the lead frame substrate as in the related art. Since the independent pattern is formed in the lead frame, the mounting area of the lead frame substrate can be increased in density. Further, since the upper surface and the lower surface of the pattern can be exposed to the surface of the metal material constituting the material, the bending which is generated in the conventional manufacturing process can be prevented, and the adhesion and the high density can be achieved. Install electronic parts. Further, in the semiconductor module of the present invention, since the lead frame substrate having high flatness and high density as described above is used, the electronic component composed of the power semiconductor element can be mounted at a high density, and by using any The thickness of the lead frame material can be obtained with good heat dissipation characteristics and improved reliability. Further, according to the method for manufacturing a lead frame substrate of the present invention, since deformation such as bending when the connecting portion connecting the plurality of patterns independent of each other is not generated, it is possible to mount the electronic component with high precision. A good quality lead frame substrate. [Embodiment] FIG. 1 and FIG. 2 are schematic plan views showing a lead frame substrate suitable for a power semiconductor module according to a first embodiment of the present invention, and FIG. 2 is a schematic view showing Figure 1 is a diagram showing the cross-sectional structure of the lead frame substrate. In addition, Fig. 1 is a view showing a state in which the external electrode is bent, and it is 6 321 057 200941684. The structure is easily understood, and the thickness of the constituent member is omitted. In addition, the same symbols in the respective drawings denote the same or equivalent parts. In the drawing, the lead frame substrate 1 has a plurality of patterns (island portions) 11 which are independent of each other in order to hold electronic components such as power semiconductor elements, and a plurality of external electrodes are provided on both sides; The resin bonding material 13' is filled between the patterns 11 adjacent to each other and the adjacent patterns 11 are connected to each other. Further, a hole 14 is formed in a predetermined position between the plurality of patterns 11 and the plurality of external electrodes 12, and the hole 14 is formed by cutting through a joint portion which is provided in a manufacturing process which will be described in detail in the third embodiment. 21 (refer to Fig. 4) a portion to be cut, and a plurality of patterns u and a plurality of external electrodes 12 are electrically insulated from each other. The material of the lead frame 2 constituting the pattern 11 and the external electrode 12 is preferably a metal plate having excellent electrical conductivity and thermal conductivity such as an aluminum plate or a copper plate. In particular, a copper plate is preferably used for low thermal resistance. In addition, the thickness of the read lead frame 2 can be arbitrarily selected according to the voltage, current, and the like of an electronic component such as a power semiconductor element mounted on the lead frame substrate 1, and is usually, for example, about 丄〇3 to 丄〇mm. It is not specifically limited to the above range. Further, the surface of the lead frame 2. is treated by, for example, nickel plating or tin plating, and copper oxidation can be used. Further, in the resin bonding material 13 in which the patterns 11 of the lead wires 2 are connected to each other, it is preferable to make the heat composed of, for example, a thermosetting resin, a curing agent, and a resin composition of the curing promoting layer 4. A curable resin bonding material. Further, in consideration of the matching with the thermal expansion coefficient of the bow wire frame 2 for the wood, it is also possible to appropriately mix the inorganic filler or the like with the thermosetting tree moonk joint material. Further, it is also possible to use a dry film or the like to obtain a hardened f-tree & bonding material using a swell resist having the same effect as 321057 200941684. Further, since the details will be explained in the next three paragraphs, the description thereof will be omitted. The "form" is the first embodiment configured as described above. As shown in the above drawings and the lead frame substrate shown in FIG. 2, the pattern U and the external electrode 12 are bonded to each other by a resin joint, and the surface of the pattern 11 and the external electrode 2 are exposed. The metal surface of the material (plated surface). Further, in the lower section, the diagram of the lead frame 2 is slaughtered in the manufacturing section of the "inter-connection portion 21 (the fourth step of the step of wearing, by using the hardened resin joint portion to extract the heat conduction tree) The material shouts the strength of the resin, so it does not harden the pressure of the mold, so that the peripheral image of the hole 14 is deformed, and the high-density slaughter can be smoothly formed in the plane direction. When the lead frame substrate 1 is mounted on an electronic component such as a conductor element and a circuit component such as a hexL PCT, the electronic zero/use pattern 11 has good flatness and good soldering. The M-cylinder is ampoules relative to the cymbal. Therefore, the reliability of the connection between the electronic components and the solder joint by soldering is also improved. As described above, the lead frame substrate 2 of the first embodiment is provided as described above. A plurality of patterns 柰', 八· are shown as 11 in which electronic components are held, and a resin bonding material 13 which is filled in a gap between adjacent patterns 11 and which is adjacent to the pattern u / '; There is no local f-curve change: this = plane direction The pattern u is formed in a smooth and high-density manner. Therefore, the mounting process for mounting electronic components such as power semiconductor elements on the lead frame substrate is also 321057 200941684. The usual process and apparatus can be used directly, and the adhesion and flatness are good, and Since the electronic component is mounted at a high density, it is possible to obtain an effect of facilitating connection reliability of solder between the electronic component and the pattern 11, and also to improve the reliability as a semiconductor module. A plan view of a main portion of the engaging convex portion for improving the bondability between the resin bonding materials of the lead frame substrate according to the second embodiment of the present invention is shown in the drawing, and is provided at the joint portion between the pattern 11 and the resin bonding material 13. In the example, as shown in the ellipse A, the opposite side faces of the adjacent patterns 11 form a pot-shaped recess, and the resin bonding material 13 is convex. The anchoring convex portion 15 is formed on the resin bonding material 13 side in such a manner as to enter the concave portion. Further, the fastening convex portion 15 illustrated in Fig. 3 is only an example, as long as the pattern 11 and the tree The joint surface of the joining material 13 is a concave-convex which is engaged with each other, and the engaging convex portion 15 may be provided in any of the pattern 11 and the resin bonding material 13. Further, in terms of shape, Q may be, for example, a triangular shape or a ladder. Any shape such as a shape or a wedge shape is not necessarily required to be the position of the adjacent pattern 11 but also the concave portion and the convex portion may be formed on one of the pattern 11 and the resin bonding material 13. Further, in terms of size, When the fastening convex portion 15 is too large, the pattern 11 portion on which the electronic component is mounted has a large area, which is disadvantageous in miniaturization and high density of the obtained semiconductor module. Therefore, in terms of the size of the fastening convex portion 15, It is desirable to be the smallest size that can be processed by chiseling or silver engraving, and it is more desirable to increase the number of the engaging projections 15 than to increase the size thereof. In the second embodiment configured as described above, the engaging convex portion 15 for improving the bonding property is provided at the joint portion between the pattern 11 of the bobbin 2 and the resin bonding material 13 at No. 9 321057 200941684. The resin bonding material 13 is caught in the anchoring convex portion 15 in an anchor shape or a wedge shape, and the joint strength of the pattern u portion is greatly enhanced. Thereby, in the step of soldering the electronic component such as the power semiconductor element, and the subsequent step of wire bonding, it is possible to prevent the occurrence of the loss of the individual pattern 11 such as dropping or bending. And the reliability of the installation. Next, a method of manufacturing a substrate of the lead frame of the present invention will be described based on the drawings. Third Embodiment FIG. 4 to FIG. 7 are views for explaining a method of manufacturing a lead frame substrate according to a third embodiment of the present invention, and FIG. 4 is a plan view showing a lead frame after one plugging in the first processing step. Fig. 5 is a cross-sectional view showing the position of the gap between the adjacent patterns of the lead frame read in Fig. 4 and the position of the resin bonding material used in the arrangement of the resin bonding material. Figure 6 is a cross-sectional view showing the orientation of the substrate shown in Figure 6 after filling the pattern between the leads of the lead frame. In the second embodiment, first, the board is obtained by the first processing step. a step of filling the gap between the lead frames ' of the connecting portions 21 of the connecting portions 21 connecting the external electrodes 1 and the connecting portions 21 connecting the adjacent patterns 11 to each other, and then performing the step of filling the material The splicing portion 21 is cut and removed. In the processing step, the connecting blade is removed by punching and transferred to the target lead frame substrate. Fig. 4 shows the lead frame 2 obtained by the first processing step described above. 321057 10 200941684 Further, in the third embodiment, a copper plate having a thickness of 1.0 mm for nickel plating on the surface thereof can be obtained by punching the copper plate by pressing. The lead frame 2 has a plurality of patterns (island portions) 11 which are independent from each other as shown in FIG. 4; a connecting portion 21 that connects adjacent patterns 11 to each other; a plurality of external electrodes 12; and a gap portion 22 Formed by chiseling. Further, the first processing step may be performed by etching. Further, of course, the size, shape, number, arrangement, and the like of the pattern 11 and the external electrode 12 can be appropriately changed as desired. Then, in the step of filling the gap portion 22 between the patterns 11 with the resin bonding material, an uncured resin bonding material having an arbitrary volume required to fill the gap portion 22 between the patterns 11 is used. The sheet member 31 is placed on the upper surface of the lead frame 2 as shown in Fig. 5, and the resin bonding material sheet 31 is placed on a vacuum heat-drawing or vacuum heating laminating apparatus, for example, which is not shown. Pressurization heating is performed on the hot plate to allow the resin bonding material sheet 31 to flow and to be hardened while being filled in the gap portion 22 Q between the patterns 11. In this method, since filling and hardening can be collectively performed, the cost of the process can be reduced. Further, when the heat-resistant sheet such as Teflon (registered trademark) having elasticity is provided between the lead frame 2 and the hot plate under the apparatus, the resin of the resin bonding material sheet 31 can be prevented from being pressed or laminated. When it passes through the gap portion 22 between the patterns 11, it is wound back to the metal surface of the lower surface of the lead frame 2. Further, when the resin of the resin bonding material sheet 31 remains on the upper surface of the lead frame 2, for example, it can be removed by a conventional means such as buff polishing to expose the metal surface. Further, a method in which no resin remains on the upper surface of the lead frame 2 is provided. In the case of the resin bonding material sheet 31, a mask sheet made of an extremely thin metal or resin having the same pattern as the lead frame 2 is provided. After the resin bonding material is filled between the lead frames 2 and the above-described process, the lead frame 2 in which the resin does not remain on the upper surface in the same manner as described above can be obtained by peeling off the mask material. Fig. 6 shows the lead frame 2 obtained by the first processing step as described above and the step of filling the resin bonding material between the gaps between the patterns, and the gap portions 22 between the patterns 11 of the lead frame 2 are filled. The resin bonding material 13 having the resin bonding material sheet 31 cured is followed by the pattern 11 and the pattern 11 and the external electrode 12. Further, the connection portions 21 connecting the patterns 11 and the pattern 11 and the external electrodes 12 remain at this point of time. Thereafter, in the secondary processing step by press, the connecting portion 21 between the patterns 11 and between the pattern 11 and the external electrode 12 is cut and removed without overlapping the semi-hardened sheet. The external electrode 12 is bent and formed to obtain the lead frame substrate 1 as shown in Fig. 1. Further, the order of removal of the connecting portion 21 by the secondary processing step and the bending process of the external electrode 12 may be either first or both. As described above, the method of manufacturing the lead frame substrate according to the third embodiment includes the step of forming a lead frame having a plurality of patterns independent of each other and a connecting portion connecting the adjacent patterns by pressing the metal plate. 1 processing step; a step of filling a resin bonding material in a gap portion between adjacent patterns; and a second processing step of removing the connecting portion by pressing. According to this method, since the semi-hardened sheet is not laminated in the second processing step, even when the connecting portion 21 for connecting the patterns 11 is cut, 12 321057 200941684 does not cause deformation such as bending, but The lead frame substrate 1 which is smooth in the planar direction and excellent in quality is obtained. Further, in the step of filling the gap 邛22 between the adjacent patterns 11 to fill the resin bonding material, since the uncured resin bonding material sheet 31 is used, it is possible to obtain a simple interfacial bonding material between the patterns U. Effect. (Fourth Embodiment) Fig. 8 is an explanatory view showing a main part of a step of filling a resin bonding material in a gap portion between adjacent patterns in a method of manufacturing a lead frame base plate according to a fourth embodiment of the present invention. Further, the fourth embodiment is the same as the third embodiment up to the second processing step. After the lead frame 2 similar to that of Fig. 4 is obtained by the first processing step, a liquid thermosetting resin is used as the resin material for forming the resin bonding material, as the resin material for forming the resin bonding material ,, as shown in the § The resin bonding material coating material 32 is placed on the lead frame 2 at a suitable position, and then spread on the lead frame 2 using a paddle plate (SqUeegee) 33, and is filled in the pattern of the lead frame 2 by vacuum printing. After the gap portion 22 between the Us, the resin bonding material paste 32 filled in the gap portion 22 is heat-cured by a dryer to obtain, for example, the same lead frame substrate as in Fig. 7. In the fourth embodiment, by filling the resin material of the gap portion 22 by the vacuum printing method, the void can be removed from the bulk of the bonding material paste filled in the gap portion 22 (v〇 Id), and the resin bonding material paste 32 can be densely filled. Further, although the resin bonding material may be prevented from remaining in the upper and lower pattern portions of the lead frame 2 in the filling step, the resin bonding material may remain on the surface of the U portion of the lead frame 2, and the third embodiment may be used. Similarly, 13 321057 200941684 is removed by polishing or the like to expose the metal surface. Further, when a vacuum mask is used, a metal mask formed with the same pattern as that of the lead frame is used, whereby resin residue on the surface of the pattern 11 of the lead frame 2 can be prevented. The prevention of the resin from being wound around the lower surface of the lead frame 2 can be achieved by applying a heat-resistant sheet having adhesiveness to the lower surface of the lead frame after the chiseling in the first processing step. Thereafter, the second processing step of performing the second chiseling and the bending process of the external electrode 12 are performed in the same manner as in the third embodiment, whereby the lead frame substrate exemplified in Fig. 1 of the present invention can be obtained. As described above, in the manufacturing method of the fourth embodiment, since the resin bonding material paste 32 is filled in the gap portion 22 by the vacuum printing method, no void is formed in the volume of the filled resin bonding material. The lead frame substrate 1 in which the adjacent patterns 11 and the external electrodes 12 are more firmly connected can be obtained. (Fifth Embodiment) Figs. 9 and 10 are views for explaining a method of manufacturing a lead frame substrate according to a fifth embodiment of the present invention, and Fig. 9 is a cross-sectional view showing the lead frame after completion of the first processing step. Figure 10 is a cross-sectional view of the resulting lead frame substrate. In the fifth embodiment, before the first processing step, the entire surface of the upper and lower surfaces of the copper plate having a thickness of 1.0 mm is applied to the same surface as the third embodiment, and the surface is bonded in advance. The adhesive surface of the PET resin film 4 having an adhesive thickness of about 20/zm is used. Then, in the same manner as in the third embodiment, in the first processing step, the both sides of the lead frame 2 shown in Fig. 9 of Fig. 14321057 200941684 are bonded to the resin film 4 by the die cutting, thereby forming useful to separate. A lead frame 2 having a cross-sectional shape of the gap portion 22 between the patterns 11. Thereafter, the resin bonding material 13 is filled and hardened in the gap portion 22 of the lead frame 2 in the same manner as in the third embodiment or the fourth embodiment. Then, by peeling the resin film 4 from the lead frame 2, the thickness of the resin bonding material 13 as shown in Fig. 10 is obtained by adding the thickness corresponding to the thickness of the resin film 4 from the thickness of the lead frame 2, and The surface of the lead frame 2 is protruded. The subsequent two processing steps and the bending process of the external electrode 12 are also performed in the same manner as in the third and third embodiments, whereby the lead frame substrate 1 is obtained. According to the fifth embodiment as described above, the chiseling process of the first processing step is performed in a state where the surface of the metal plate processed by the lead frame 2 is covered with the resin film 4 in advance, and the adjacent patterns can be interposed between the adjacent patterns. In the step of filling the gap portion with the resin bonding material, the resin bonding material 13 is prevented from directly adhering to the surface of the pattern 11 of the lead frame 2. Therefore, even when the resin bonding material 13 remains in a portion other than the gap portion 22, after the Q of the resin bonding material 13 is cured, the upper metal surface of the pattern 11 can be easily exposed by peeling off the resin film 41. In the vacuum heating press or the vacuum heating lamination step of the third embodiment and the vacuum printing step of the fourth embodiment, the resin bonding material 13 remains in the pattern 11 without any problem, so that it can be efficiently manufactured. . (Embodiment) FIG. 11 and FIG. 12 are views for explaining a method of manufacturing a lead frame substrate according to a sixth embodiment of the present invention, and FIG. 11 is a view showing a gap portion between adjacent patterns filled as a resin bonding material. In the case of the use of the dry film for the solder resist, the cross-sectional view of Fig. 12 is a cross-sectional view showing the state in which the unnecessary portion of the dry film for solder resist back J shown in Fig. U is removed. In the manufacturing method of the sixth embodiment, the copper plate having a thickness of 1. 〇 施 is applied to the same surface as the third embodiment, and the same is performed without the primary processing step. The lead frame 2 in a state in which the connecting portion 21 remains between the adjacent adjacent patterns u. Next, in the case where the resin bonding material is filled in the gap portion 22 of Fig. 11 13⁄4, the solder resist film 34 is used instead of the tree-laid material sheet, the resin bonding material _, etc., and the solder resist film 34 is placed thereon to be used for obtaining the solder resist. After the upper surface of the lead frame 2 of the dry film 34 is laminated by a conventional vacuum heating lamination device, the gap portion 22 between the patterns u shown in Fig. 11 is filled with a solder resist-dry film resin. At the same time, the entire surface of the lead frame 2 on which the sub-assembly is mounted is obtained by, for example, covering the dry film 34 for solder resist with a thickness of 1 (). Then 'using the positioning portion for forming the electronic component mounted on the pattern 11 = for example, the mask corresponding to the shape of the electronic component (all omitted FIG. 2), by the (four) light step, the developing step, the hardening step, The connection portion 22 is filled with the resin of the solder resist 34 as a portion of the tree "body element, etc. μ (four) protrudes to form the power supply + body member 4 electronic component positioning portion 13a (not shown in detail 2) The fourth surface of the wire frame 2 is formed. The second processing step of performing the spun processing and the bending process of the external electrode 12 are the same as those of the third and fifth embodiments. ^ As described above, the manufacturing of the sixth embodiment In the method, the dry film 34 is used as the resin bonding material 13, and the solder resist is set by the entire surface of the pattern 11 and the gap portion 22 on the lead frame 2 by using 3 321057 16 200941684, by exposure step, development In the step, the unnecessary portion of the pattern 11 is removed. On the other hand, since the peripheral portion of the resin bonding material protruding on the pattern 11 serves as the positioning portion 13a of the electronic component, it is also possible to easily perform the electronic mounting of the electronic component. Attachment of part positioning In addition, since the resin bonding material 13 of the gap portion 22 extends in the peripheral portion of the pattern 11 and is formed in a T-shaped cross section, the contact area is increased, and the effect of improving the bonding strength between the adjacent patterns 11 can be obtained. Fig. 13 to Fig. 15 are diagrams conceptually explaining the internal configuration of a semiconductor module according to a seventh embodiment of the present invention, and Fig. 13 is a view showing the mounting of electronic components on the lead frame substrate in the manufacturing step. FIG. 14 is a cross-sectional view showing the semiconductor module before the package in which the metal substrate is mounted on the mounting substrate shown in FIG. 13 via the heat conductive resin sheet, and FIG. 15 is a view showing the bird's eye view; A cross-sectional view of a modification of the fourth embodiment. The semiconductor module of the seventh embodiment is the first of the first and second embodiments obtained by the manufacturing method exemplified in the third to sixth embodiments. The lead frame substrate 1 in a state in which the metal surface is exposed on the upper and lower surfaces is shown in Fig. 3. For example, a predetermined plurality of electronic components 5 including the power semiconductor element are as shown in Fig. 13. After being mounted on the upper surface of the pattern 11 of the lead frame substrate 1 as shown in FIG. 1, the electronic component 5, the electronic component 5 and the pattern 11, and the electronic component 5 or the pattern 11 and the external electrode 12 are electrically connected by the bonding wire 6. After the sexual connection, as shown in Fig. 14, a 173210-1200941684 metal substrate plate 8 made of aluminum or a copper material is bonded via a thermally conductive resin sheet 7 having good insulating properties and good thermal conductivity. Then, 'the use is formed into a predetermined shape and size. The frame is encapsulated in a state in which the resin material #'AiEth external electrode 12 is encapsulated by, for example, silicone C/1 icone ge 1) resin, liquid epoxy (ep〇xy) resin, etc. The shape of the opposite surface is exposed, whereby the power semiconductor module (not shown) can be obtained. In the case of X, it is preferable to use a thermosetting resin sheet in which a thermosetting resin such as oxidized, aluminum nitride or boron nitride is mixed with an inorganic filler which is excellent in thermal conductivity. Further, as for the encapsulation method, in addition to the silicone resin or the liquid epoxy resin, a transfer packaging method using a mold or the like can be used. Further, as shown in the modification of Fig. 15, the metal cooling plate 8A may be directly joined to the metal substrate plate 8. In the semiconductor module of the seventh embodiment configured as described above, the lead frame substrate 1 has the connecting portion 21 when the connecting portion 21 (fourth drawing) is slid by the press during the manufacturing process. In the hole 14 (Fig.) of the portion of the hole 14 (Fig.), the portion 11 of the moon pattern is not locally deformed or the like, and is formed smoothly in the plane direction. Therefore, the electronic component such as the power semiconductor element and the circuit component is mounted. In this case, the electronic component 5 can be mounted with high adhesion, flatness, and high density. Further, since the adhesion and the flatness are good, the connection reliability of the solder between the electronic component 5 = the pattern 11 is also high. Further, since the heat-transfer V resin sheet 7 has a high degree of adhesion to the metal substrate plate 8, the heat dissipation property is good, and a remarkable effect of improving the stability can be obtained. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a bird's eye view schematically showing a lead frame base 18 321057 200941684 of the first embodiment of the present invention. Fig. 2 is a view schematically showing a cross-sectional structure of a lead frame substrate of Fig. 1. Fig. 3 is a plan view showing the main part of the engaging convex portion for improving the bondability between the resin bonding materials of the lead frame substrate according to the second embodiment of the present invention. Fig. 4 is a plan view showing the lead frame after the priming of the first processing step in the method of manufacturing the lead frame substrate according to the third embodiment of the present invention. Fig. 5 is a cross-sectional view showing the positional relationship when the resin bonding material sheets used in the step of filling the resin bonding material are disposed in the gap portions between the adjacent patterns of the lead frames shown in Fig. 4. Fig. 6 is a plan view showing a state in which the resin bonding material is filled between the patterns of the lead frame shown in Fig. 4. Fig. 7 is a cross-sectional view of the lead frame substrate shown in Fig. 6. Fig. 8 is a conceptual explanatory view showing a main part of a step of filling a resin bonding material in a gap portion between adjacent patterns in the manufacturing method of the lead frame substrate according to the fourth embodiment of the present invention. Fig. 9 is a cross-sectional view showing the lead frame after completion of the first processing step in the method of manufacturing the lead frame substrate according to the fifth embodiment of the present invention. Fig. 10 is a cross-sectional view showing the lead frame substrate processed from the lead frame shown in Fig. 9. Figure 11 is a cross-sectional view showing a state in which a dry film for a solder resist used as a resin bonding material is filled in a gap between adjacent patterns in a method of manufacturing a lead frame substrate according to a sixth embodiment of the present invention. 19· 321057 200941684 Fig. 12 is a cross-sectional view showing a state in which the dry film for the solder resist shown in Fig. 11 is not partially removed. Fig. 13 is a bird's eye view showing a state in which the wire bonding is performed after the electronic component is mounted on the lead frame substrate in the manufacturing process of the semiconductor module according to the seventh embodiment of the present invention. Fig. 14 is a cross-sectional view showing the packaged front semiconductor module in which the metal substrate is mounted on the mounting substrate shown in Fig. 13 via the thermally conductive resin sheet. Fig. 15 is a cross-sectional view showing a modification of the μth diagram. [Main component symbol description] 1 Lead frame substrate 2 Lead frame 4 Resin film 5 Electronic parts 6 Lap leads 7 Heat conductive resin sheet 8 Metal substrate board 8A Metal cooling sheet 11 Pattern (island) 12 External electrode 13 14 Bonding material 13a Positioning hole 15 Folding convex part 21 r\1 Jointing part 22 Gap part 31 33 Resin joining material sheet baffle plate 32 34 Resin bonding material paste resisting agent dry film 321057 20

Claims (1)

200941684 · « 申請專利範圍： 一種引線架基板，係具 〜 零件而彼此獨立；以及 複數個圖案，用以保持電子 間之間隙部且將今澈&樹脂接合材，填充於鄰接的圖案 如申請專利範圍第：圈案彼此連接。 案和前述榭脂技A』，、之W線架基板，其中，於前述圖 七 1. 2. 和前述樹脂接合材”咏朱暴板，其中，於前述圖 的扣合凸部。 接合部係設有謀求换合性之提 ❹ 案 昇的扣合凸部 3.如申請專利範圍第1 樹脂接合材係從前什_ +項之引線架基板，其中，前述 4. 樹脂接合材係從前述 、卩丨線架基板，其中，前述 如申請專利範圍第3項木之表面位置朝厚度方向突出。 接合材之突出部分丨線架基板，其中，前述樹脂 5.如申請專利範_以為所安裝的電子零件之定位部。 6. 個圖案之上表面及下表 ==其：前述複數 ❹ 7. 將前述連結部鑿穿女除的第 一種半導體模組，係於申請專利範圍第1項之引線架基 板安裝有由電力用半導體元件所構成的電子零件。 一種引線架基板之製造方法，係包含：形成異有從金屬 板彼此獨立的複數個圖案及使鄰接的圖案彼此連接之 連結部的引線架之第〆P步驟；將樹脂接合材填充於 藉由該第-加工步驟而形成的鄰接圖案間之間隙部的 弓丨線架基板之製造方法，其 係將未硬化之樹脂接 步驟；以及藉由衝壓床而 加工步驟。 8.如申請專利範圍第7項& 中，前述填充樹脂接合讨的步 合材片設置於前述引線禁之表面後’藉由真空加熱衝塵 321057 2Γ 1 200941684 床或真空加熱疊層裝置予以填充並且使之硬化。 9. 如申請專利範圍第7項之引線架基板之製造方法，其 中，前述填充樹脂接合材的步驟，係藉由真空印刷法將 熱硬化性之樹脂接合材糊料填充於前述圖案間之間隙 部後，進行加熱硬化。 10. 如申請專利範圍第7項之引線架基板之製造方法，其 中，前述填充樹脂接合材的步驟係在將阻焊劑用乾膜設 置於前述引線架之表面後，藉由真空加熱疊層裝置而將 該阻焊劑用乾膜填充於前述間隙部且覆蓋於前述圖案 表面，然後，進行曝光、顯像、硬化，且將前述圖案表 面部之阻劑用乾膜去除。 11. 如申請專利範圍第10項之引線架基板之製造方法，其 中，於前述曝光時係形成安裝於前述圖案上之電子零件 的定位部。 12. 如申請專利範圍第7至11項之中任一項的引線架基板 之製造方法，其中，就前述金屬板而言，使用於兩面貼 合有樹脂膜的金屬板，且於前述第二加工步驟後，將殘 留於前述引線架上之樹脂膜剝離。 22 321057200941684 · « Patent application scope: A lead frame substrate, which is independent of each other, and a plurality of patterns for holding the gap between the electrons and filling the adjacent resin pattern with the adjacent pattern. Patent scope: The circle is connected to each other. And the aforementioned squeegee A", the W-frame substrate, wherein, in the above-mentioned Figure VII 1. 2. and the above-mentioned resin bonding material, the smashing plate, wherein the engaging portion is in the above-mentioned figure. The fastening member 3 is provided with a lifting handle for the purpose of improving the compatibility. The first resin bonding material is the lead frame substrate of the preceding paragraph, wherein the above-mentioned 4. resin bonding material is from the foregoing And a wire frame substrate, wherein the surface position of the wood of the third item of the patent application is protruded toward the thickness direction. The protruding portion of the bonding material is a wire frame substrate, wherein the resin is as described in the patent application. The positioning part of the electronic parts. 6. The upper surface of the pattern and the following table == it: the above plural ❹ 7. The first type of semiconductor module that is punctured by the above-mentioned connecting part is the first item of the patent application. The lead frame substrate is mounted with an electronic component composed of a power semiconductor element. A method of manufacturing a lead frame substrate includes: forming a plurality of patterns different from each other from the metal plate and connecting the adjacent patterns to each other a step P of the lead frame of the junction; a method of manufacturing a bowstring substrate in which a resin bonding material is filled in a gap portion between adjacent patterns formed by the first processing step, which is an uncured resin And the step of processing by means of a stamping bed. 8. In the scope of the application of the seventh aspect of the invention, the step of filling the resin-bonded step is disposed on the surface of the lead-free surface, and is evacuated by vacuum heating. 321 057 2 Γ 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 2009 The method of manufacturing a lead frame substrate according to the seventh aspect of the invention, wherein the resin-bonding material is filled with a thermosetting resin, and the resin is bonded to the gap between the patterns. After the dry film of the solder resist is placed on the surface of the lead frame, the solder resist is filled with the dry film by the vacuum heating lamination device. The gap portion is covered on the surface of the pattern, and then exposed, developed, and cured, and the resist of the surface portion of the pattern is removed by a dry film. 11. The method for manufacturing a lead frame substrate according to claim 10, The method of manufacturing the lead frame substrate according to any one of the items 7 to 11 of the invention, wherein the metal plate is In the case of the metal plate to which the resin film is bonded to both surfaces, the resin film remaining on the lead frame is peeled off after the second processing step. 22 321057
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Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5432045B2 (en) * 2010-04-13 2014-03-05 シチズン電子株式会社 Manufacturing method of semiconductor light emitting device
JP5701377B2 (en) * 2011-03-24 2015-04-15 三菱電機株式会社 Power semiconductor module and power unit device
JP2014099547A (en) 2012-11-15 2014-05-29 Mitsubishi Electric Corp Power semiconductor module and method of manufacturing the same
JP2016184596A (en) * 2013-08-19 2016-10-20 凸版印刷株式会社 Flexible wiring base material and wiring board, and solar cell module and ic card
JP6401444B2 (en) * 2013-10-07 2018-10-10 ローム株式会社 Power module and manufacturing method thereof
JP6391430B2 (en) * 2014-11-06 2018-09-19 三菱電機株式会社 Electronic control device and manufacturing method thereof
US10249558B2 (en) * 2014-11-20 2019-04-02 Nsk Ltd. Electronic part mounting heat-dissipating substrate
US10388596B2 (en) * 2014-11-20 2019-08-20 Nsk Ltd. Electronic part mounting heat-dissipating substrate
JP6179679B2 (en) * 2014-11-20 2017-08-16 日本精工株式会社 Heat dissipation board for mounting electronic components
JP6488940B2 (en) * 2015-08-07 2019-03-27 富士電機株式会社 Semiconductor device
JP6218876B2 (en) * 2016-04-14 2017-10-25 三菱電機株式会社 Module parts and manufacturing method thereof
WO2018012006A1 (en) * 2016-07-12 2018-01-18 日立化成株式会社 Circuit board manufacturing method and circuit board
JPWO2018189797A1 (en) 2017-04-10 2020-02-20 日立化成株式会社 Manufacturing method of circuit board, circuit sheet and circuit board
WO2019142282A1 (en) * 2018-01-17 2019-07-25 日立化成株式会社 Circuit sheet manufacturing method, circuit board manufacturing method, circuit sheet, and circuit board
CN114364141A (en) * 2022-01-04 2022-04-15 深圳中富电路股份有限公司 Thick copper ceramic substrate and manufacturing method thereof
JP7401037B1 (en) 2022-04-28 2023-12-19 住友ベークライト株式会社 Circuit board with heat sink and method for manufacturing the same, semiconductor device using the same and method for manufacturing the same

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06177188A (en) * 1992-12-04 1994-06-24 Hitachi Ltd Semiconductor device
JPH06318670A (en) * 1993-05-06 1994-11-15 Sony Corp Lead frame and its manufacture
JP3169578B2 (en) * 1998-03-23 2001-05-28 松下電器産業株式会社 Substrate for electronic components
JP2002033558A (en) * 2000-07-18 2002-01-31 Matsushita Electric Ind Co Ltd Circuit board and its manufacturing method
WO2003083940A1 (en) * 2002-03-29 2003-10-09 Matsushita Electric Industrial Co., Ltd. Method of manufacturing heat conductive substrate
JP4409849B2 (en) * 2003-04-24 2010-02-03 株式会社東芝 Method for forming semiconductor device
JP2004349400A (en) * 2003-05-21 2004-12-09 Matsushita Electric Ind Co Ltd Thermally conductive circuit board and power module using the same
JP4050200B2 (en) * 2003-07-08 2008-02-20 新日本無線株式会社 Semiconductor device manufacturing method and semiconductor device
JP2005303107A (en) * 2004-04-14 2005-10-27 New Japan Radio Co Ltd Lead frame, semiconductor device, and manufacturing method of them

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