TW200539279A - Backgated FinFET having different oxide thicknesses - Google Patents
Backgated FinFET having different oxide thicknesses Download PDFInfo
- Publication number
- TW200539279A TW200539279A TW094110756A TW94110756A TW200539279A TW 200539279 A TW200539279 A TW 200539279A TW 094110756 A TW094110756 A TW 094110756A TW 94110756 A TW94110756 A TW 94110756A TW 200539279 A TW200539279 A TW 200539279A
- Authority
- TW
- Taiwan
- Prior art keywords
- fin
- gate
- item
- scope
- patent application
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
- H10D30/6217—Fin field-effect transistors [FinFET] having non-uniform gate electrodes, e.g. gate conductors having varying doping
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
- H10D64/516—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform
Landscapes
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/709,323 US7056773B2 (en) | 2004-04-28 | 2004-04-28 | Backgated FinFET having different oxide thicknesses |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW200539279A true TW200539279A (en) | 2005-12-01 |
Family
ID=35187635
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW094110756A TW200539279A (en) | 2004-04-28 | 2005-04-04 | Backgated FinFET having different oxide thicknesses |
Country Status (4)
| Country | Link |
|---|---|
| US (3) | US7056773B2 (https=) |
| JP (1) | JP5039979B2 (https=) |
| CN (1) | CN100375252C (https=) |
| TW (1) | TW200539279A (https=) |
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| JP2006128494A (ja) * | 2004-10-29 | 2006-05-18 | Toshiba Corp | 半導体集積回路装置及びその製造方法 |
| NZ548087A (en) * | 2005-04-29 | 2010-10-29 | Tomizo Yamamoto | Rubber or resin foam containing zirconium or germanium |
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| US20070085576A1 (en) * | 2005-10-14 | 2007-04-19 | Hector Sanchez | Output driver circuit with multiple gate devices |
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| US20090206405A1 (en) * | 2008-02-15 | 2009-08-20 | Doyle Brian S | Fin field effect transistor structures having two dielectric thicknesses |
| CN102460660B (zh) * | 2009-06-26 | 2014-08-06 | 株式会社东芝 | 半导体装置的制造方法 |
| TWI650848B (zh) * | 2009-08-07 | 2019-02-11 | 日商半導體能源研究所股份有限公司 | 半導體裝置和其製造方法 |
| US8420476B2 (en) | 2010-05-27 | 2013-04-16 | International Business Machines Corporation | Integrated circuit with finFETs and MIM fin capacitor |
| CN102468381A (zh) * | 2010-11-23 | 2012-05-23 | 孙智江 | 一种形成p型重掺杂的方法 |
| US9082849B2 (en) | 2011-09-30 | 2015-07-14 | The Institute of Microelectronics Chinese Academy of Science | Semiconductor structure and method for manufacturing the same |
| CN103035711B (zh) * | 2011-09-30 | 2016-04-20 | 中国科学院微电子研究所 | 一种半导体结构及其制造方法 |
| CN104160511B (zh) * | 2011-12-30 | 2017-06-23 | 英特尔公司 | 环绕式沟槽接触部结构和制作方法 |
| FR2995720B1 (fr) * | 2012-09-18 | 2014-10-24 | Commissariat Energie Atomique | Procede de realisation d'un dispositif a effet de champ a double grille a grilles independantes |
| CN103985748B (zh) * | 2013-02-08 | 2016-12-28 | 中国科学院微电子研究所 | 半导体设置及其制造方法 |
| US8987793B2 (en) * | 2013-04-23 | 2015-03-24 | Broadcom Corporation | Fin-based field-effect transistor with split-gate structure |
| CN104134668B (zh) * | 2013-05-03 | 2017-02-22 | 中国科学院微电子研究所 | 存储器件及其制造方法和存取方法 |
| US9087869B2 (en) | 2013-05-23 | 2015-07-21 | International Business Machines Corporation | Bulk semiconductor fins with self-aligned shallow trench isolation structures |
| EP3050088A4 (en) * | 2013-09-25 | 2017-05-03 | Intel Corporation | Isolation well doping with solid-state diffusion sources for finfet architectures |
| TWI538108B (zh) * | 2014-05-08 | 2016-06-11 | 林崇榮 | 具電阻性元件之非揮發性記憶體與其製作方法 |
| US9515188B2 (en) * | 2014-12-22 | 2016-12-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fin field effect transistors having conformal oxide layers and methods of forming same |
| WO2016153716A1 (en) * | 2015-03-20 | 2016-09-29 | Applied Materials, Inc. | An atomic layer process chamber for 3d conformal processing |
| US9570388B2 (en) | 2015-06-26 | 2017-02-14 | International Business Machines Corporation | FinFET power supply decoupling |
| CN105609470B (zh) * | 2015-08-20 | 2019-01-18 | 中国科学院微电子研究所 | 具有均匀阈值电压分布的半导体器件及其制造方法 |
| CN105720970B (zh) * | 2016-01-22 | 2018-06-26 | 宁波大学 | 一种基于FinFET器件的异或/同或门电路 |
| CN107039522B (zh) * | 2016-02-04 | 2019-12-31 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构及其形成方法 |
| CN106057657A (zh) * | 2016-07-22 | 2016-10-26 | 上海华力微电子有限公司 | 多重图形化方法 |
| CN106356305B (zh) * | 2016-11-18 | 2019-05-31 | 上海华力微电子有限公司 | 优化鳍式场效晶体管结构的方法以及鳍式场效晶体管 |
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| CN109309005B (zh) * | 2017-07-27 | 2022-03-22 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构及其形成方法 |
| US10254244B1 (en) | 2017-10-11 | 2019-04-09 | International Business Machines Corporation | Biosensor having a sensing gate dielectric and a back gate dielectric |
| DE112017008328T5 (de) * | 2017-12-27 | 2020-10-08 | Intel Corporation | Reduziertes elektrisches Feld durch Verdickung des Dielektrikums auf der Drain-Seite |
| KR102535087B1 (ko) * | 2018-04-20 | 2023-05-19 | 삼성전자주식회사 | 반도체 장치 |
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| JP3607431B2 (ja) * | 1996-09-18 | 2005-01-05 | 株式会社東芝 | 半導体装置およびその製造方法 |
| US6448615B1 (en) * | 1998-02-26 | 2002-09-10 | Micron Technology, Inc. | Methods, structures, and circuits for transistors with gate-to-body capacitive coupling |
| JP2000164868A (ja) * | 1998-11-20 | 2000-06-16 | Nec Corp | ゲート膜形成方法及び半導体装置 |
| JP2000195968A (ja) * | 1998-12-25 | 2000-07-14 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
| JP2002118255A (ja) * | 2000-07-31 | 2002-04-19 | Toshiba Corp | 半導体装置およびその製造方法 |
| JP4044276B2 (ja) * | 2000-09-28 | 2008-02-06 | 株式会社東芝 | 半導体装置及びその製造方法 |
| US6686630B2 (en) * | 2001-02-07 | 2004-02-03 | International Business Machines Corporation | Damascene double-gate MOSFET structure and its fabrication method |
| US6593192B2 (en) * | 2001-04-27 | 2003-07-15 | Micron Technology, Inc. | Method of forming a dual-gated semiconductor-on-insulator device |
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| US6433609B1 (en) * | 2001-11-19 | 2002-08-13 | International Business Machines Corporation | Double-gate low power SOI active clamp network for single power supply and multiple power supply applications |
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| JP2005167163A (ja) * | 2003-12-05 | 2005-06-23 | National Institute Of Advanced Industrial & Technology | 二重ゲート電界効果トランジスタ |
-
2004
- 2004-04-28 US US10/709,323 patent/US7056773B2/en not_active Expired - Fee Related
-
2005
- 2005-03-17 CN CNB2005100554569A patent/CN100375252C/zh not_active Expired - Lifetime
- 2005-04-04 TW TW094110756A patent/TW200539279A/zh unknown
- 2005-04-28 JP JP2005131256A patent/JP5039979B2/ja not_active Expired - Fee Related
-
2006
- 2006-03-02 US US11/365,504 patent/US7187042B2/en not_active Expired - Fee Related
- 2006-06-28 US US11/427,222 patent/US7476946B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US7476946B2 (en) | 2009-01-13 |
| US20050245009A1 (en) | 2005-11-03 |
| CN1691294A (zh) | 2005-11-02 |
| JP5039979B2 (ja) | 2012-10-03 |
| US20060237774A1 (en) | 2006-10-26 |
| JP2005317978A (ja) | 2005-11-10 |
| CN100375252C (zh) | 2008-03-12 |
| US20060145195A1 (en) | 2006-07-06 |
| US7056773B2 (en) | 2006-06-06 |
| US7187042B2 (en) | 2007-03-06 |
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