TW200508425A - Method of manufacturing electronic device - Google Patents
Method of manufacturing electronic deviceInfo
- Publication number
- TW200508425A TW200508425A TW093112541A TW93112541A TW200508425A TW 200508425 A TW200508425 A TW 200508425A TW 093112541 A TW093112541 A TW 093112541A TW 93112541 A TW93112541 A TW 93112541A TW 200508425 A TW200508425 A TW 200508425A
- Authority
- TW
- Taiwan
- Prior art keywords
- base member
- electronic device
- concave portion
- manufacturing electronic
- forming
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 238000009713 electroplating Methods 0.000 abstract 2
- 239000000126 substance Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
- C25D5/022—Electroplating of selected surface areas using masking means
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/34—Pretreatment of metallic surfaces to be electroplated
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
- C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0392—Pretreatment of metal, e.g. before finish plating, etching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003136011A JP2004342750A (ja) | 2003-05-14 | 2003-05-14 | 電子デバイスの製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200508425A true TW200508425A (en) | 2005-03-01 |
TWI324191B TWI324191B (en) | 2010-05-01 |
Family
ID=33410728
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW093112541A TWI324191B (en) | 2003-05-14 | 2004-05-04 | Method of manufacturing electronic device |
Country Status (4)
Country | Link |
---|---|
US (1) | US7214305B2 (zh) |
JP (1) | JP2004342750A (zh) |
CN (1) | CN1327479C (zh) |
TW (1) | TWI324191B (zh) |
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US7531079B1 (en) | 1998-10-26 | 2009-05-12 | Novellus Systems, Inc. | Method and apparatus for uniform electropolishing of damascene IC structures by selective agitation |
US7449098B1 (en) | 1999-10-05 | 2008-11-11 | Novellus Systems, Inc. | Method for planar electroplating |
US7799200B1 (en) | 2002-07-29 | 2010-09-21 | Novellus Systems, Inc. | Selective electrochemical accelerator removal |
US7449099B1 (en) * | 2004-04-13 | 2008-11-11 | Novellus Systems, Inc. | Selectively accelerated plating of metal features |
US7405163B1 (en) * | 2003-12-17 | 2008-07-29 | Novellus Systems, Inc. | Selectively accelerated plating of metal features |
US8372757B2 (en) | 2003-10-20 | 2013-02-12 | Novellus Systems, Inc. | Wet etching methods for copper removal and planarization in semiconductor processing |
US8530359B2 (en) | 2003-10-20 | 2013-09-10 | Novellus Systems, Inc. | Modulated metal removal using localized wet etching |
US8158532B2 (en) | 2003-10-20 | 2012-04-17 | Novellus Systems, Inc. | Topography reduction and control by selective accelerator removal |
US7879218B1 (en) | 2003-12-18 | 2011-02-01 | Novellus Systems, Inc. | Deposit morphology of electroplated copper |
US20060234499A1 (en) * | 2005-03-29 | 2006-10-19 | Akira Kodera | Substrate processing method and substrate processing apparatus |
JP2007073797A (ja) * | 2005-09-08 | 2007-03-22 | Renesas Technology Corp | デバイス設計支援方法、デバイス設計支援システム及びデバイス設計支援プログラム |
KR100711912B1 (ko) * | 2005-12-28 | 2007-04-27 | 동부일렉트로닉스 주식회사 | 반도체 소자의 금속 배선 형성 방법 |
US7575666B2 (en) * | 2006-04-05 | 2009-08-18 | James Watkowski | Process for electrolytically plating copper |
JP4810306B2 (ja) * | 2006-05-16 | 2011-11-09 | 日本電気株式会社 | 銅ダマシン多層配線の形成方法 |
KR100800495B1 (ko) * | 2007-02-27 | 2008-02-04 | 삼성전자주식회사 | 반도체 장치의 제조방법 |
KR100897509B1 (ko) * | 2007-04-24 | 2009-05-15 | 박태흠 | 음각부, 양각부와 관통부를 갖는 금속박판체를 제조하기위한 미세금속몰드, 그 제조방법 및 위의 미세금속몰드로제조된 금속박판체 |
KR20100038576A (ko) * | 2008-10-06 | 2010-04-15 | 삼성전자주식회사 | 구리 도금용 조성물 및 이를 이용한 구리 배선의 형성 방법 |
KR101962587B1 (ko) | 2009-09-02 | 2019-07-18 | 노벨러스 시스템즈, 인코포레이티드 | 작업물 가공 장치 및 작업물 가공 방법 |
US8168540B1 (en) | 2009-12-29 | 2012-05-01 | Novellus Systems, Inc. | Methods and apparatus for depositing copper on tungsten |
KR101181048B1 (ko) * | 2010-12-27 | 2012-09-07 | 엘지이노텍 주식회사 | 인쇄회로기판의 제조 방법 |
JP2013178361A (ja) * | 2012-02-28 | 2013-09-09 | Canon Inc | 構造体の製造方法 |
JP2013191658A (ja) * | 2012-03-13 | 2013-09-26 | Micronics Japan Co Ltd | 配線基板及びその製造方法 |
JP5823359B2 (ja) * | 2012-08-23 | 2015-11-25 | 株式会社東芝 | 半導体装置の製造方法 |
US9865501B2 (en) | 2013-03-06 | 2018-01-09 | Lam Research Corporation | Method and apparatus for remote plasma treatment for reducing metal oxides on a metal seed layer |
US9070750B2 (en) | 2013-03-06 | 2015-06-30 | Novellus Systems, Inc. | Methods for reducing metal oxide surfaces to modified metal surfaces using a gaseous reducing environment |
US9598787B2 (en) * | 2013-03-14 | 2017-03-21 | Rohm And Haas Electronic Materials Llc | Method of filling through-holes |
JP5826952B2 (ja) | 2014-01-17 | 2015-12-02 | 株式会社荏原製作所 | めっき方法およびめっき装置 |
US9469912B2 (en) | 2014-04-21 | 2016-10-18 | Lam Research Corporation | Pretreatment method for photoresist wafer processing |
US9472377B2 (en) | 2014-10-17 | 2016-10-18 | Lam Research Corporation | Method and apparatus for characterizing metal oxide reduction |
CN104966709B (zh) | 2015-07-29 | 2017-11-03 | 恒劲科技股份有限公司 | 封装基板及其制作方法 |
US10508357B2 (en) | 2016-02-15 | 2019-12-17 | Rohm And Haas Electronic Materials Llc | Method of filling through-holes to reduce voids and other defects |
US10512174B2 (en) | 2016-02-15 | 2019-12-17 | Rohm And Haas Electronic Materials Llc | Method of filling through-holes to reduce voids and other defects |
JP6823392B2 (ja) * | 2016-07-05 | 2021-02-03 | 東京エレクトロン株式会社 | 絶縁膜を形成する方法 |
US10443146B2 (en) | 2017-03-30 | 2019-10-15 | Lam Research Corporation | Monitoring surface oxide on seed layers during electroplating |
KR102421980B1 (ko) * | 2017-07-26 | 2022-07-18 | 삼성전기주식회사 | 인쇄회로기판 |
US10366919B2 (en) * | 2017-09-20 | 2019-07-30 | Globalfoundries Inc. | Fully aligned via in ground rule region |
CN111326290B (zh) * | 2018-12-14 | 2021-12-10 | 海安科技株式会社 | 透明导电膜的制造方法 |
KR20220024438A (ko) * | 2019-06-18 | 2022-03-03 | 도쿄엘렉트론가부시키가이샤 | 기판 처리 방법 및 기판 처리 장치 |
CN113747664B (zh) * | 2020-05-29 | 2024-01-05 | 深南电路股份有限公司 | 一种印制线路板及其制作方法 |
CN114597193A (zh) * | 2020-12-07 | 2022-06-07 | 群创光电股份有限公司 | 电子装置的重布线层结构及其制作方法 |
CN113061881A (zh) * | 2021-03-18 | 2021-07-02 | 鑫巨(深圳)半导体科技有限公司 | 一种电解镀铜的铜处理装置及方法 |
CN115988757A (zh) * | 2021-10-15 | 2023-04-18 | 深南电路股份有限公司 | 一种电路板的电镀方法及电路板 |
CN114743931B (zh) * | 2022-06-14 | 2022-09-02 | 合肥晶合集成电路股份有限公司 | 一种半导体集成器件的制作方法 |
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US6024857A (en) * | 1997-10-08 | 2000-02-15 | Novellus Systems, Inc. | Electroplating additive for filling sub-micron features |
JPH11214838A (ja) | 1998-01-27 | 1999-08-06 | Matsushita Electric Works Ltd | 回路板の製造方法 |
US6176992B1 (en) * | 1998-11-03 | 2001-01-23 | Nutool, Inc. | Method and apparatus for electro-chemical mechanical deposition |
JP2000232078A (ja) | 1999-02-10 | 2000-08-22 | Toshiba Corp | メッキ方法及びメッキ装置 |
JP2000297395A (ja) | 1999-04-15 | 2000-10-24 | Japan Energy Corp | 電気銅めっき液 |
US6410442B1 (en) * | 1999-08-18 | 2002-06-25 | Advanced Micro Devices, Inc. | Mask-less differential etching and planarization of copper films |
JP3594894B2 (ja) | 2000-02-01 | 2004-12-02 | 新光電気工業株式会社 | ビアフィリングめっき方法 |
US6491806B1 (en) * | 2000-04-27 | 2002-12-10 | Intel Corporation | Electroplating bath composition |
JP2001316866A (ja) | 2000-05-08 | 2001-11-16 | Tokyo Electron Ltd | 半導体装置の製造方法および製造装置 |
US6605534B1 (en) * | 2000-06-28 | 2003-08-12 | International Business Machines Corporation | Selective deposition of a conductive material |
JP3967879B2 (ja) | 2000-11-16 | 2007-08-29 | 株式会社ルネサステクノロジ | 銅めっき液及びそれを用いた半導体集積回路装置の製造方法 |
US6946066B2 (en) * | 2001-07-20 | 2005-09-20 | Asm Nutool, Inc. | Multi step electrodeposition process for reducing defects and minimizing film thickness |
JP2002212779A (ja) | 2001-01-10 | 2002-07-31 | Hitachi Ltd | 表面処理方法およびそれを用いた薄膜磁気ヘッドの製造方法と薄膜磁気ヘッド |
JP2003129273A (ja) | 2001-10-29 | 2003-05-08 | Applied Materials Inc | 電解めっき方法 |
CN1190521C (zh) * | 2002-07-05 | 2005-02-23 | 旺宏电子股份有限公司 | 铜电镀溶液及铜电镀方法 |
US20040069651A1 (en) * | 2002-10-15 | 2004-04-15 | Applied Materials, Inc. | Oxide treatment and pressure control for electrodeposition |
US7105082B2 (en) * | 2003-02-27 | 2006-09-12 | Novellus Systems, Inc. | Composition and method for electrodeposition of metal on a work piece |
US7238610B2 (en) * | 2003-03-31 | 2007-07-03 | Intel Corporation | Method and apparatus for selective deposition |
-
2003
- 2003-05-14 JP JP2003136011A patent/JP2004342750A/ja active Pending
- 2003-08-08 US US10/636,614 patent/US7214305B2/en not_active Expired - Fee Related
-
2004
- 2004-05-04 TW TW093112541A patent/TWI324191B/zh not_active IP Right Cessation
- 2004-05-14 CN CNB2004100383202A patent/CN1327479C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN1327479C (zh) | 2007-07-18 |
US20040226827A1 (en) | 2004-11-18 |
US7214305B2 (en) | 2007-05-08 |
TWI324191B (en) | 2010-05-01 |
CN1551295A (zh) | 2004-12-01 |
JP2004342750A (ja) | 2004-12-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |