TW200414529A - Method for forming a dual gate oxide device using a metal oxide and resulting device - Google Patents

Method for forming a dual gate oxide device using a metal oxide and resulting device Download PDF

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Publication number
TW200414529A
TW200414529A TW092119272A TW92119272A TW200414529A TW 200414529 A TW200414529 A TW 200414529A TW 092119272 A TW092119272 A TW 092119272A TW 92119272 A TW92119272 A TW 92119272A TW 200414529 A TW200414529 A TW 200414529A
Authority
TW
Taiwan
Prior art keywords
metal oxide
gate
dielectric
dielectric layer
layer
Prior art date
Application number
TW092119272A
Other languages
English (en)
Chinese (zh)
Inventor
David C Gilmer
Christopher C Hobbs
Hsing-Huang M Tseng
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of TW200414529A publication Critical patent/TW200414529A/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0144—Manufacturing their gate insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
    • H10D1/684—Capacitors having no potential barriers having dielectrics comprising perovskite structures the dielectrics comprising multiple layers, e.g. comprising buffer layers, seed layers or gradient layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/981—Utilizing varying dielectric thickness

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
TW092119272A 2002-08-15 2003-07-15 Method for forming a dual gate oxide device using a metal oxide and resulting device TW200414529A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/219,522 US6787421B2 (en) 2002-08-15 2002-08-15 Method for forming a dual gate oxide device using a metal oxide and resulting device

Publications (1)

Publication Number Publication Date
TW200414529A true TW200414529A (en) 2004-08-01

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
TW092119272A TW200414529A (en) 2002-08-15 2003-07-15 Method for forming a dual gate oxide device using a metal oxide and resulting device

Country Status (7)

Country Link
US (1) US6787421B2 (enExample)
JP (1) JP2005536053A (enExample)
KR (1) KR20050054920A (enExample)
CN (1) CN1675759A (enExample)
AU (1) AU2003285819A1 (enExample)
TW (1) TW200414529A (enExample)
WO (1) WO2004017403A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI470734B (zh) * 2007-10-31 2015-01-21 Freescale Semiconductor Inc 不同電介質厚度之半導體裝置

Families Citing this family (51)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7041562B2 (en) * 2003-10-29 2006-05-09 Freescale Semiconductor, Inc. Method for forming multiple gate oxide thickness utilizing ashing and cleaning
US6979623B2 (en) * 2003-12-17 2005-12-27 Texas Instruments Incorporated Method for fabricating split gate transistor device having high-k dielectrics
KR20050070837A (ko) * 2003-12-31 2005-07-07 동부아남반도체 주식회사 금속 옥사이드 반도체 소자의 플라즈마 손상방지를 위한식각방법
US7115947B2 (en) * 2004-03-18 2006-10-03 International Business Machines Corporation Multiple dielectric finfet structure and method
US20050250258A1 (en) * 2004-05-04 2005-11-10 Metz Matthew V Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode
TWI463526B (zh) * 2004-06-24 2014-12-01 Ibm 改良具應力矽之ｃｍｏｓ元件的方法及以該方法製備而成的元件
US7227205B2 (en) * 2004-06-24 2007-06-05 International Business Machines Corporation Strained-silicon CMOS device and method
US7144784B2 (en) * 2004-07-29 2006-12-05 Freescale Semiconductor, Inc. Method of forming a semiconductor device and structure thereof
US6946349B1 (en) * 2004-08-09 2005-09-20 Chartered Semiconductor Manufacturing Ltd. Method for integrating a SONOS gate oxide transistor into a logic/analog integrated circuit having several gate oxide thicknesses
DE102004040943B4 (de) * 2004-08-24 2008-07-31 Qimonda Ag Verfahren zur selektiven Abscheidung einer Schicht mittels eines ALD-Verfahrens
US7494939B2 (en) 2004-08-31 2009-02-24 Micron Technology, Inc. Methods for forming a lanthanum-metal oxide dielectric layer
US7588988B2 (en) 2004-08-31 2009-09-15 Micron Technology, Inc. Method of forming apparatus having oxide films formed using atomic layer deposition
US7071038B2 (en) * 2004-09-22 2006-07-04 Freescale Semiconductor, Inc Method of forming a semiconductor device having a dielectric layer with high dielectric constant
US20060088962A1 (en) * 2004-10-22 2006-04-27 Herman Gregory S Method of forming a solution processed transistor having a multilayer dielectric
US7235501B2 (en) 2004-12-13 2007-06-26 Micron Technology, Inc. Lanthanum hafnium oxide dielectrics
DE102004063532A1 (de) * 2004-12-30 2006-07-27 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung von Gateisolationsschichten mit unterschiedlichen Eigenschaften
US7687409B2 (en) 2005-03-29 2010-03-30 Micron Technology, Inc. Atomic layer deposited titanium silicon oxide films
US7214590B2 (en) * 2005-04-05 2007-05-08 Freescale Semiconductor, Inc. Method of forming an electronic device
US8405165B2 (en) * 2005-06-07 2013-03-26 International Business Machines Corporation Field effect transistor having multiple conduction states
US7544596B2 (en) 2005-08-30 2009-06-09 Micron Technology, Inc. Atomic layer deposition of GdScO3 films as gate dielectrics
US7592251B2 (en) 2005-12-08 2009-09-22 Micron Technology, Inc. Hafnium tantalum titanium oxide films
US7972974B2 (en) 2006-01-10 2011-07-05 Micron Technology, Inc. Gallium lanthanide oxide films
KR100762239B1 (ko) * 2006-05-03 2007-10-01 주식회사 하이닉스반도체 반도체 소자의 ｐｍｏｓ 트랜지스터, 이를 포함하는 반도체소자와 그의 제조 방법
US7759747B2 (en) 2006-08-31 2010-07-20 Micron Technology, Inc. Tantalum aluminum oxynitride high-κ dielectric
US7518145B2 (en) * 2007-01-25 2009-04-14 International Business Machines Corporation Integrated multiple gate dielectric composition and thickness semiconductor chip and method of manufacturing the same
US7768080B2 (en) * 2007-07-30 2010-08-03 Hewlett-Packard Development Company, L.P. Multilayer dielectric
US7709331B2 (en) * 2007-09-07 2010-05-04 Freescale Semiconductor, Inc. Dual gate oxide device integration
US8017469B2 (en) 2009-01-21 2011-09-13 Freescale Semiconductor, Inc. Dual high-k oxides with sige channel
US7944004B2 (en) * 2009-03-26 2011-05-17 Kabushiki Kaisha Toshiba Multiple thickness and/or composition high-K gate dielectrics and methods of making thereof
US7943460B2 (en) * 2009-04-20 2011-05-17 International Business Machines Corporation High-K metal gate CMOS
JP5268792B2 (ja) * 2009-06-12 2013-08-21 パナソニック株式会社 半導体装置
JP2011009313A (ja) * 2009-06-24 2011-01-13 Panasonic Corp 半導体装置及びその製造方法
JP5444176B2 (ja) * 2010-09-14 2014-03-19 パナソニック株式会社 半導体装置
US8377807B2 (en) * 2010-09-30 2013-02-19 Suvolta, Inc. Method for minimizing defects in a semiconductor substrate due to ion implantation
CN102332398B (zh) * 2011-10-28 2012-12-12 上海华力微电子有限公司 一种双高k栅介质/金属栅结构的制作方法
US9637775B2 (en) 2012-02-13 2017-05-02 Neumodx Molecular, Inc. System and method for processing biological samples
US9101930B2 (en) 2012-02-13 2015-08-11 Neumodx Molecular, Inc. Microfluidic cartridge for processing and detecting nucleic acids
US11931740B2 (en) 2012-02-13 2024-03-19 Neumodx Molecular, Inc. System and method for processing and detecting nucleic acids
US11485968B2 (en) 2012-02-13 2022-11-01 Neumodx Molecular, Inc. Microfluidic cartridge for processing and detecting nucleic acids
KR101850409B1 (ko) 2012-03-15 2018-06-01 삼성전자주식회사 듀얼 게이트 절연막을 갖는 반도체 장치의 제조 방법
CN103824771A (zh) * 2012-11-16 2014-05-28 中芯国际集成电路制造(上海)有限公司 栅氧化层的形成方法
US9059022B2 (en) 2012-12-28 2015-06-16 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structures and methods of forming the same
US9048335B2 (en) * 2013-03-01 2015-06-02 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabricating multiple gate stack compositions
US9373501B2 (en) * 2013-04-16 2016-06-21 International Business Machines Corporation Hydroxyl group termination for nucleation of a dielectric metallic oxide
US8987793B2 (en) * 2013-04-23 2015-03-24 Broadcom Corporation Fin-based field-effect transistor with split-gate structure
CN104183470B (zh) * 2013-05-21 2017-09-01 中芯国际集成电路制造(上海)有限公司 一种半导体器件的制造方法
TW201528486A (zh) * 2014-01-15 2015-07-16 Silicon Optronics Inc 影像感測裝置及其製造方法
CN104952734B (zh) * 2015-07-16 2020-01-24 矽力杰半导体技术(杭州)有限公司 半导体结构及其制造方法
CN108122750B (zh) * 2016-11-29 2020-06-09 中芯国际集成电路制造(上海)有限公司 一种半导体器件及其制造方法
US10002939B1 (en) 2017-02-16 2018-06-19 International Business Machines Corporation Nanosheet transistors having thin and thick gate dielectric material
CN108630605B (zh) 2017-03-22 2020-12-18 中芯国际集成电路制造(上海)有限公司 半导体装置及其制造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6320238B1 (en) 1996-12-23 2001-11-20 Agere Systems Guardian Corp. Gate structure for integrated circuit fabrication
US6358819B1 (en) 1998-12-15 2002-03-19 Lsi Logic Corporation Dual gate oxide process for deep submicron ICS
US6297539B1 (en) 1999-07-19 2001-10-02 Sharp Laboratories Of America, Inc. Doped zirconia, or zirconia-like, dielectric film transistor structure and deposition method for same
JP2001060630A (ja) 1999-08-23 2001-03-06 Nec Corp 半導体装置の製造方法
US6448127B1 (en) * 2000-01-14 2002-09-10 Advanced Micro Devices, Inc. Process for formation of ultra-thin base oxide in high k/oxide stack gate dielectrics of mosfets
JP2001284463A (ja) 2000-03-30 2001-10-12 Nec Corp 半導体装置およびその製造方法
JP2001298095A (ja) 2000-04-13 2001-10-26 Nec Corp Ｍｏｓ型半導体装置の製造方法
TW466606B (en) 2000-04-20 2001-12-01 United Microelectronics Corp Manufacturing method for dual metal gate electrode
JP2002009168A (ja) * 2000-06-19 2002-01-11 Nec Corp 半導体装置及びその製造方法
JP2002009169A (ja) 2000-06-20 2002-01-11 Nec Corp 半導体装置とその製造方法
US6268251B1 (en) 2000-07-12 2001-07-31 Chartered Semiconductor Manufacturing Inc. Method of forming MOS/CMOS devices with dual or triple gate oxide
JP2002134739A (ja) 2000-10-19 2002-05-10 Mitsubishi Electric Corp 半導体装置及びその製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI470734B (zh) * 2007-10-31 2015-01-21 Freescale Semiconductor Inc 不同電介質厚度之半導體裝置
US9362280B2 (en) 2007-10-31 2016-06-07 Freescale Semiconductor, Inc. Semiconductor devices with different dielectric thicknesses

Also Published As

Publication number Publication date
AU2003285819A1 (en) 2004-03-03
WO2004017403A1 (en) 2004-02-26
JP2005536053A (ja) 2005-11-24
CN1675759A (zh) 2005-09-28
KR20050054920A (ko) 2005-06-10
US20040032001A1 (en) 2004-02-19
US6787421B2 (en) 2004-09-07

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