TW200405076A - Logic circuit, timing generating circuit, display, and portable terminal - Google Patents

Logic circuit, timing generating circuit, display, and portable terminal Download PDF

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Publication number
TW200405076A
TW200405076A TW092114790A TW92114790A TW200405076A TW 200405076 A TW200405076 A TW 200405076A TW 092114790 A TW092114790 A TW 092114790A TW 92114790 A TW92114790 A TW 92114790A TW 200405076 A TW200405076 A TW 200405076A
Authority
TW
Taiwan
Prior art keywords
clock
circuit
substrate
reset
display
Prior art date
Application number
TW092114790A
Other languages
English (en)
Chinese (zh)
Other versions
TWI301910B (https=
Inventor
Yoshitoshi Kida
Yoshiharu Nakajima
Toshikazu Maekawa
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of TW200405076A publication Critical patent/TW200405076A/zh
Application granted granted Critical
Publication of TWI301910B publication Critical patent/TWI301910B/zh

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/18—Timing circuits for raster scan displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0289—Details of voltage level shifters arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Thin Film Transistor (AREA)
TW092114790A 2002-05-31 2003-05-30 Logic circuit, timing generating circuit, display, and portable terminal TW200405076A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002159039A JP4110839B2 (ja) 2002-05-31 2002-05-31 表示装置および携帯端末

Publications (2)

Publication Number Publication Date
TW200405076A true TW200405076A (en) 2004-04-01
TWI301910B TWI301910B (https=) 2008-10-11

Family

ID=29706506

Family Applications (1)

Application Number Title Priority Date Filing Date
TW092114790A TW200405076A (en) 2002-05-31 2003-05-30 Logic circuit, timing generating circuit, display, and portable terminal

Country Status (6)

Country Link
US (2) US7126376B2 (https=)
JP (1) JP4110839B2 (https=)
KR (1) KR100964048B1 (https=)
CN (2) CN101414456A (https=)
TW (1) TW200405076A (https=)
WO (1) WO2003102909A1 (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0564342U (ja) * 1992-02-10 1993-08-27 ニチハ株式会社 外壁の目地構造
JP2003347926A (ja) * 2002-05-30 2003-12-05 Sony Corp レベルシフト回路、表示装置および携帯端末
JP2005234496A (ja) * 2004-02-23 2005-09-02 Toshiba Matsushita Display Technology Co Ltd フリッカ補償回路
JP4887799B2 (ja) * 2006-01-20 2012-02-29 ソニー株式会社 表示装置および携帯端末
KR100719670B1 (ko) * 2006-04-06 2007-05-18 삼성에스디아이 주식회사 데이터 구동부 및 이를 이용한 유기 전계발광 표시장치
KR101427591B1 (ko) * 2007-12-21 2014-08-08 삼성디스플레이 주식회사 데이터 구동회로, 이를 포함하는 디스플레이장치 및 그제어방법
CN105096790B (zh) * 2014-04-24 2018-10-09 敦泰电子有限公司 驱动电路、驱动方法、显示装置和电子设备
KR102623542B1 (ko) 2016-10-07 2024-01-10 삼성전자주식회사 멀티플 클럭 도메인 메모리 장치의 클럭 동기화 방법

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61260770A (ja) 1985-05-14 1986-11-18 Matsushita Electric Ind Co Ltd 同期制御回路
JPS623574A (ja) 1985-06-29 1987-01-09 Nec Home Electronics Ltd 同期信号発生回路
JP2605699B2 (ja) 1986-09-29 1997-04-30 セイコーエプソン株式会社 表示制御回路及びカラー画像表示装置
JPH01189284A (ja) 1988-01-22 1989-07-28 Fujitsu Ltd 同期分離回路
JPH04195192A (ja) 1990-11-28 1992-07-15 Seiko Epson Corp 同期信号発生装置
US5097147A (en) * 1991-02-01 1992-03-17 Tektronix, Inc. Limited amplitude signal trigger circuit
JP3756203B2 (ja) 1993-09-22 2006-03-15 セイコーエプソン株式会社 記憶回路およびフラットパネル駆動回路
JP3367808B2 (ja) * 1995-06-19 2003-01-20 シャープ株式会社 表示パネルの駆動方法および装置
JP2001100712A (ja) 1999-07-23 2001-04-13 Semiconductor Energy Lab Co Ltd 表示装置
JP3535067B2 (ja) 2000-03-16 2004-06-07 シャープ株式会社 液晶表示装置
US6633184B2 (en) * 2000-05-19 2003-10-14 Yazaki Corporation Phase comparator and synchronizing signal extracting device
JP2002246902A (ja) 2000-05-19 2002-08-30 Yazaki Corp 位相比較器および同期信号抽出装置
JP4112792B2 (ja) 2000-10-04 2008-07-02 東芝松下ディスプレイテクノロジー株式会社 液晶表示装置及びそれを用いた液晶応用装置
JP3984938B2 (ja) * 2002-09-02 2007-10-03 キヤノン株式会社 シフトレジスタ及び表示装置及び情報表示装置

Also Published As

Publication number Publication date
WO2003102909A1 (en) 2003-12-11
US20040174197A1 (en) 2004-09-09
KR20050008629A (ko) 2005-01-21
KR100964048B1 (ko) 2010-06-16
CN101414456A (zh) 2009-04-22
US7126376B2 (en) 2006-10-24
JP4110839B2 (ja) 2008-07-02
US20060214694A1 (en) 2006-09-28
TWI301910B (https=) 2008-10-11
JP2004004247A (ja) 2004-01-08
CN1552055A (zh) 2004-12-01
US7368945B2 (en) 2008-05-06

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees