SG44390A1 - Fault tolerant memory systems - Google Patents

Fault tolerant memory systems

Info

Publication number
SG44390A1
SG44390A1 SG1996000087A SG1996000087A SG44390A1 SG 44390 A1 SG44390 A1 SG 44390A1 SG 1996000087 A SG1996000087 A SG 1996000087A SG 1996000087 A SG1996000087 A SG 1996000087A SG 44390 A1 SG44390 A1 SG 44390A1
Authority
SG
Singapore
Prior art keywords
error correction
level error
memory
memory units
reliability
Prior art date
Application number
SG1996000087A
Other languages
English (en)
Inventor
Robert Martin Blake
Douglas Craig Bossen
Chin-Long Chen
John Atkinson Fifield
Howard Leo Kalter
Tin-Chee Lo
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of SG44390A1 publication Critical patent/SG44390A1/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/16Protection against loss of memory contents
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G06F11/1052Bypassing or disabling error detection or correction
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
SG1996000087A 1989-03-10 1990-02-02 Fault tolerant memory systems SG44390A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/322,255 US5058115A (en) 1989-03-10 1989-03-10 Fault tolerant computer memory systems and components employing dual level error correction and detection with lock-up feature

Publications (1)

Publication Number Publication Date
SG44390A1 true SG44390A1 (en) 1997-12-19

Family

ID=23254073

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1996000087A SG44390A1 (en) 1989-03-10 1990-02-02 Fault tolerant memory systems

Country Status (13)

Country Link
US (1) US5058115A (ko)
EP (1) EP0386462B1 (ko)
JP (1) JPH0743678B2 (ko)
KR (1) KR920005297B1 (ko)
CN (1) CN1016009B (ko)
AR (1) AR243288A1 (ko)
AU (1) AU623490B2 (ko)
BR (1) BR9001125A (ko)
CA (1) CA2002362C (ko)
DE (1) DE69026743T2 (ko)
MY (1) MY105251A (ko)
NZ (1) NZ232458A (ko)
SG (1) SG44390A1 (ko)

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US5881072A (en) * 1996-06-28 1999-03-09 International Business Machines Corporation Method of detecting error correction devices on plug-compatible memory modules
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US20030163769A1 (en) * 2002-02-27 2003-08-28 Sun Microsystems, Inc. Memory module including an error detection mechanism for address and control signals
US6941493B2 (en) * 2002-02-27 2005-09-06 Sun Microsystems, Inc. Memory subsystem including an error detection mechanism for address and control signals
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US6976194B2 (en) * 2002-06-28 2005-12-13 Sun Microsystems, Inc. Memory/Transmission medium failure handling controller and method
US6973613B2 (en) * 2002-06-28 2005-12-06 Sun Microsystems, Inc. Error detection/correction code which detects and corrects component failure and which provides single bit error correction subsequent to component failure
US6996766B2 (en) * 2002-06-28 2006-02-07 Sun Microsystems, Inc. Error detection/correction code which detects and corrects a first failing component and optionally a second failing component
US6996686B2 (en) * 2002-12-23 2006-02-07 Sun Microsystems, Inc. Memory subsystem including memory modules having multiple banks
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US7530008B2 (en) 2003-08-08 2009-05-05 Sun Microsystems, Inc. Scalable-chip-correct ECC scheme
US7188296B1 (en) 2003-10-30 2007-03-06 Sun Microsystems, Inc. ECC for component failures using Galois fields
US7116600B2 (en) * 2004-02-19 2006-10-03 Micron Technology, Inc. Memory device having terminals for transferring multiple types of data
US8464093B1 (en) * 2004-09-03 2013-06-11 Extreme Networks, Inc. Memory array error correction
US7451380B2 (en) * 2005-03-03 2008-11-11 International Business Machines Corporation Method for implementing enhanced vertical ECC storage in a dynamic random access memory
US7533303B2 (en) * 2005-04-15 2009-05-12 Hewlett-Packard Development Company, L.P. Method and system for performing system-level correction of memory errors
US7843927B1 (en) 2006-12-22 2010-11-30 Extreme Networks, Inc. Methods, systems, and computer program products for routing packets at a multi-mode layer 3 packet forwarding device
JP4918824B2 (ja) * 2006-08-18 2012-04-18 富士通株式会社 メモリコントローラおよびメモリ制御方法
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US8331373B2 (en) * 2010-03-15 2012-12-11 Extreme Networks, Inc. Methods, systems, and computer readable media for automatically selecting between internet protocol switching modes on a per-module basis in a packet forwarding device
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US9946658B2 (en) * 2013-11-22 2018-04-17 Nvidia Corporation Memory interface design having controllable internal and external interfaces for bypassing defective memory
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US9529672B2 (en) * 2014-09-25 2016-12-27 Everspin Technologies Inc. ECC word configuration for system-level ECC compatibility
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Also Published As

Publication number Publication date
KR900014997A (ko) 1990-10-25
CA2002362A1 (en) 1990-09-10
AU623490B2 (en) 1992-05-14
DE69026743D1 (de) 1996-06-05
CA2002362C (en) 1994-02-01
EP0386462A2 (en) 1990-09-12
EP0386462A3 (en) 1991-10-23
KR920005297B1 (ko) 1992-06-29
US5058115A (en) 1991-10-15
EP0386462B1 (en) 1996-05-01
AU4939390A (en) 1990-09-13
DE69026743T2 (de) 1996-11-07
NZ232458A (en) 1992-03-26
MY105251A (en) 1994-09-30
JPH0743678B2 (ja) 1995-05-15
BR9001125A (pt) 1991-03-05
CN1016009B (zh) 1992-03-25
JPH02278449A (ja) 1990-11-14
CN1045472A (zh) 1990-09-19
AR243288A1 (es) 1993-07-30

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