SG43395A1 - Resin sealing die resin-sealed-type semiconductor device and method of manufacturing the device - Google Patents

Resin sealing die resin-sealed-type semiconductor device and method of manufacturing the device

Info

Publication number
SG43395A1
SG43395A1 SG1996010416A SG1996010416A SG43395A1 SG 43395 A1 SG43395 A1 SG 43395A1 SG 1996010416 A SG1996010416 A SG 1996010416A SG 1996010416 A SG1996010416 A SG 1996010416A SG 43395 A1 SG43395 A1 SG 43395A1
Authority
SG
Singapore
Prior art keywords
resin
sealed
manufacturing
type semiconductor
semiconductor device
Prior art date
Application number
SG1996010416A
Other languages
English (en)
Inventor
Sachiyuki Nose
Minako Onoe
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Publication of SG43395A1 publication Critical patent/SG43395A1/en

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
    • B29C45/17—Component parts, details or accessories; Auxiliary operations
    • B29C45/26—Moulds
    • B29C45/37—Mould cavity walls, i.e. the inner surface forming the mould cavity, e.g. linings
    • B29C45/372—Mould cavity walls, i.e. the inner surface forming the mould cavity, e.g. linings provided with means for marking or patterning, e.g. numbering articles
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
SG1996010416A 1995-08-04 1996-08-02 Resin sealing die resin-sealed-type semiconductor device and method of manufacturing the device SG43395A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19977195 1995-08-04

Publications (1)

Publication Number Publication Date
SG43395A1 true SG43395A1 (en) 1997-10-17

Family

ID=16413347

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1996010416A SG43395A1 (en) 1995-08-04 1996-08-02 Resin sealing die resin-sealed-type semiconductor device and method of manufacturing the device

Country Status (7)

Country Link
US (1) US5817208A (de)
EP (1) EP0756925B1 (de)
KR (1) KR970013247A (de)
CN (1) CN1159754C (de)
DE (1) DE69616684T2 (de)
SG (1) SG43395A1 (de)
TW (1) TW367608B (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1079400A (ja) * 1996-09-05 1998-03-24 Oki Electric Ind Co Ltd 半導体装置の実装方法及び半導体装置の構造
US6294411B1 (en) * 1996-10-25 2001-09-25 Nippon Steel Semiconductor Corporation Method for molding a semiconductor device utilizing a satin finish
JP3742211B2 (ja) * 1998-02-09 2006-02-01 シャープ株式会社 半導体装置のモールド金型およびマーキング方法
JP3607655B2 (ja) * 2001-09-26 2005-01-05 株式会社東芝 マウント材、半導体装置及び半導体装置の製造方法
US20050054126A1 (en) * 2003-08-29 2005-03-10 Texas Instruments Incorporated System and method for marking the surface of a semiconductor package
US20060166381A1 (en) * 2005-01-26 2006-07-27 Lange Bernhard P Mold cavity identification markings for IC packages
US20070011883A1 (en) * 2005-07-06 2007-01-18 Chang Ming Y Mark having identifying device
JP2007080923A (ja) * 2005-09-12 2007-03-29 Oki Electric Ind Co Ltd 半導体パッケージの形成方法及び半導体パッケージを形成するための金型
ATE551668T1 (de) * 2006-11-17 2012-04-15 Oberthur Technologies Verfahren zur herstellung einer entität und entsprechende vorrichtung
WO2009008259A1 (ja) * 2007-07-09 2009-01-15 Konica Minolta Opto, Inc. 撮像装置の製造方法、撮像装置及び携帯端末
JP5076198B2 (ja) * 2008-02-15 2012-11-21 三菱電機株式会社 樹脂成形部品とその製造方法
JP5180722B2 (ja) * 2008-07-30 2013-04-10 オンセミコンダクター・トレーディング・リミテッド 半導体装置の製造方法
US8794952B2 (en) * 2010-03-01 2014-08-05 Asm Technology Singapore Pte Ltd Apparatus for molding electronic components
JP5655406B2 (ja) * 2010-07-20 2015-01-21 セントラル硝子株式会社 モール成形用金型および該金型を用いた装飾モール付きガラスの製造方法
DE102016107142A1 (de) * 2016-04-18 2017-10-19 Gerresheimer Regensburg Gmbh Vorrichtung zum Kennzeichnen von Spritzgussteilen, Verfahren hierfür und Spritzgusswerkzeug
CN105835312A (zh) * 2016-04-28 2016-08-10 芜湖市万华塑料制品有限公司 绝缘骨架螺旋印码注塑模具
CN106782038B (zh) * 2016-12-20 2022-12-13 深圳市华星祥科技有限公司 金属树脂立体商标及金属树脂立体商标的成型方法
JP7255415B2 (ja) * 2019-08-02 2023-04-11 コニカミノルタ株式会社 射出成形用金型および製造方法
CN110867535B (zh) * 2019-11-14 2022-10-21 宇龙计算机通信科技(深圳)有限公司 压合夹具及壳体的制作方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4384702A (en) * 1982-03-09 1983-05-24 Boris Boskovic Mold insert
JPS5928350A (ja) * 1982-08-09 1984-02-15 Nec Corp 樹脂封止型半導体装置用金型
JPS60193347A (ja) * 1984-03-15 1985-10-01 Toshiba Corp 半導体製造装置
JPS617635A (ja) * 1984-06-22 1986-01-14 Toshiba Corp 電子部品の樹脂封止用金型
NL8501556A (nl) * 1985-05-30 1986-12-16 Stork Pmt Ontkroppingsmachine.
JPS61284932A (ja) * 1985-06-11 1986-12-15 Nec Yamagata Ltd 半導体製造用樹脂封入金型
JPS62221138A (ja) * 1986-03-24 1987-09-29 Akita Denshi Kk 半導体装置およびその製造に用いるモ−ルド金型
WO1989002831A1 (en) * 1987-10-01 1989-04-06 Friedrich Medloby Indicator device
FR2644610A1 (fr) * 1989-03-14 1990-09-21 Renault Dispositif automatique de numerotation de pieces obtenues par moulage
CH679917A5 (en) * 1989-11-15 1992-05-15 Raichle Sportschuh Ag Data markings on e.g. injection mouldings - are produced by setting into mould tool e.g. flat plate with markings, each with sec. marking adjusted by screwdriver slot
JPH0422142A (ja) * 1990-05-16 1992-01-27 Sharp Corp モールド金型およびこれを利用した光結合装置の製造方法
JPH06120281A (ja) * 1992-10-08 1994-04-28 Hitachi Ltd モールド金型及びこれを用いたモールド装置
JP3339602B2 (ja) * 1994-06-03 2002-10-28 ローム株式会社 パワー用半導体装置の製造方法

Also Published As

Publication number Publication date
TW367608B (en) 1999-08-21
DE69616684D1 (de) 2001-12-13
DE69616684T2 (de) 2002-05-08
KR970013247A (de) 1997-03-29
EP0756925A1 (de) 1997-02-05
EP0756925B1 (de) 2001-11-07
CN1156330A (zh) 1997-08-06
CN1159754C (zh) 2004-07-28
US5817208A (en) 1998-10-06

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