SG125991A1 - Method of mounting an integrated circuit - Google Patents

Method of mounting an integrated circuit

Info

Publication number
SG125991A1
SG125991A1 SG200501722A SG200501722A SG125991A1 SG 125991 A1 SG125991 A1 SG 125991A1 SG 200501722 A SG200501722 A SG 200501722A SG 200501722 A SG200501722 A SG 200501722A SG 125991 A1 SG125991 A1 SG 125991A1
Authority
SG
Singapore
Prior art keywords
island
integrated circuit
receiving zone
mounting
defining
Prior art date
Application number
SG200501722A
Other languages
English (en)
Inventor
Kia Silverbrook
Original Assignee
Silverbrook Res Pty Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Silverbrook Res Pty Ltd filed Critical Silverbrook Res Pty Ltd
Publication of SG125991A1 publication Critical patent/SG125991A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/32—Holders for supporting the complete device in operation, i.e. detachable fixtures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/147—Semiconductor insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
SG200501722A 2000-10-20 2001-10-19 Method of mounting an integrated circuit SG125991A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/693,068 US6507099B1 (en) 2000-10-20 2000-10-20 Multi-chip integrated circuit carrier

Publications (1)

Publication Number Publication Date
SG125991A1 true SG125991A1 (en) 2006-10-30

Family

ID=24783181

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200501722A SG125991A1 (en) 2000-10-20 2001-10-19 Method of mounting an integrated circuit

Country Status (10)

Country Link
US (1) US6507099B1 (ja)
EP (1) EP1346615A4 (ja)
JP (2) JP3839404B2 (ja)
KR (1) KR100538160B1 (ja)
CN (1) CN1239057C (ja)
AU (2) AU1025302A (ja)
IL (2) IL155465A0 (ja)
SG (1) SG125991A1 (ja)
WO (1) WO2002034018A1 (ja)
ZA (1) ZA200303177B (ja)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6775906B1 (en) * 2000-10-20 2004-08-17 Silverbrook Research Pty Ltd Method of manufacturing an integrated circuit carrier
US6710457B1 (en) * 2000-10-20 2004-03-23 Silverbrook Research Pty Ltd Integrated circuit carrier
US7052117B2 (en) * 2002-07-03 2006-05-30 Dimatix, Inc. Printhead having a thin pre-fired piezoelectric layer
DE10361106A1 (de) * 2003-12-22 2005-05-04 Infineon Technologies Ag Halbleiterbauteil mit einem Halbleiterchip und einer steifen Umverdrahtungsplatte und Verfahren zur Herstellung derselben
US7281778B2 (en) * 2004-03-15 2007-10-16 Fujifilm Dimatix, Inc. High frequency droplet ejection device and method
US8491076B2 (en) 2004-03-15 2013-07-23 Fujifilm Dimatix, Inc. Fluid droplet ejection devices and methods
US8708441B2 (en) 2004-12-30 2014-04-29 Fujifilm Dimatix, Inc. Ink jet printing
US7988247B2 (en) * 2007-01-11 2011-08-02 Fujifilm Dimatix, Inc. Ejection of drops having variable drop size from an ink jet printer
DE102010042379A1 (de) * 2010-10-13 2012-04-19 Robert Bosch Gmbh Elektronisches Bauteil

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62257756A (ja) * 1986-04-30 1987-11-10 Nec Corp シリコン基板
JPH01258458A (ja) * 1988-04-08 1989-10-16 Nec Corp ウェーハ集積型集積回路
JPH0242739A (ja) * 1988-08-01 1990-02-13 Toagosei Chem Ind Co Ltd Ｃｏｂ実装プリント回路板
US4989063A (en) * 1988-12-09 1991-01-29 The United States Of America As Represented By The Secretary Of The Air Force Hybrid wafer scale microcircuit integration
JPH0685010A (ja) * 1992-09-02 1994-03-25 Toshiba Corp マルチチップモジュール
DE4342767A1 (de) * 1993-12-15 1995-06-22 Ant Nachrichtentech Verfahren zur Herstellung einer quaderförmigen Vertiefung zur Aufnahme eines Bauelementes in einer Trägerplatte
JP2755252B2 (ja) * 1996-05-30 1998-05-20 日本電気株式会社 半導体装置用パッケージ及び半導体装置
JP2940491B2 (ja) * 1996-10-17 1999-08-25 日本電気株式会社 マルチチップモジュールにおけるフリップチップ実装構造及び方法並びにマルチチップモジュールにおけるフリップチップ実装用基板
US6075711A (en) * 1996-10-21 2000-06-13 Alpine Microsystems, Inc. System and method for routing connections of integrated circuits
US6064576A (en) * 1997-01-02 2000-05-16 Texas Instruments Incorporated Interposer having a cantilevered ball connection and being electrically connected to a printed circuit board
JPH11135675A (ja) * 1997-10-30 1999-05-21 Kawasaki Steel Corp 半導体装置及びその製造方法
JP3398319B2 (ja) * 1997-12-16 2003-04-21 新光電気工業株式会社 半導体装置及びその製造方法
JP2002515651A (ja) * 1998-05-13 2002-05-28 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 半導体装置および半導体装置の製造方法
JP2997746B2 (ja) 1998-05-27 2000-01-11 亜南半導体株式会社 印刷回路基板
JP3020201B2 (ja) 1998-05-27 2000-03-15 亜南半導体株式会社 ボールグリッドアレイ半導体パッケージのモールディング方法
US6050832A (en) * 1998-08-07 2000-04-18 Fujitsu Limited Chip and board stress relief interposer
US6175158B1 (en) * 1998-09-08 2001-01-16 Lucent Technologies Inc. Interposer for recessed flip-chip package
JP2000174161A (ja) 1998-12-04 2000-06-23 Nec Home Electronics Ltd フレキシブル基板及びこれを用いた半導体装置の実装方法
JP2000228584A (ja) 1999-02-09 2000-08-15 Canon Inc 多層プリント配線基板
US6341071B1 (en) 1999-03-19 2002-01-22 International Business Machines Corporation Stress relieved ball grid array package
US6078505A (en) 1999-05-14 2000-06-20 Triquint Semiconductor, Inc. Circuit board assembly method
JP3494593B2 (ja) * 1999-06-29 2004-02-09 シャープ株式会社 半導体装置及び半導体装置用基板
JP2001094228A (ja) 1999-09-22 2001-04-06 Seiko Epson Corp 半導体装置の実装構造
JP3268300B2 (ja) * 1999-09-27 2002-03-25 独立行政法人通信総合研究所 多段ハーメチックシール

Also Published As

Publication number Publication date
US6507099B1 (en) 2003-01-14
WO2002034018A1 (en) 2002-04-25
KR20030074609A (ko) 2003-09-19
AU2002210253B2 (en) 2004-03-04
JP4528246B2 (ja) 2010-08-18
IL155465A0 (en) 2003-11-23
CN1471803A (zh) 2004-01-28
KR100538160B1 (ko) 2005-12-21
CN1239057C (zh) 2006-01-25
JP2004511919A (ja) 2004-04-15
JP2006054493A (ja) 2006-02-23
ZA200303177B (en) 2003-11-06
IL155465A (en) 2010-11-30
AU1025302A (en) 2002-04-29
EP1346615A1 (en) 2003-09-24
JP3839404B2 (ja) 2006-11-01
EP1346615A4 (en) 2006-02-01

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