SG11201810165WA - Method of mounting die - Google Patents

Method of mounting die

Info

Publication number
SG11201810165WA
SG11201810165WA SG11201810165WA SG11201810165WA SG11201810165WA SG 11201810165W A SG11201810165W A SG 11201810165WA SG 11201810165W A SG11201810165W A SG 11201810165WA SG 11201810165W A SG11201810165W A SG 11201810165WA SG 11201810165W A SG11201810165W A SG 11201810165WA
Authority
SG
Singapore
Prior art keywords
mounting die
die
mounting
Prior art date
Application number
SG11201810165WA
Other languages
English (en)
Inventor
Osamu Watanabe
Tomonori Nakamura
Yoshihito Hagiwara
Yuji Kanai
Original Assignee
Shinkawa Kk
Valqua Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinkawa Kk, Valqua Ltd filed Critical Shinkawa Kk
Publication of SG11201810165WA publication Critical patent/SG11201810165WA/en

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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/36—Material effects
    • H01L2924/364—Polymers
    • H01L2924/3641—Outgassing

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
SG11201810165WA 2016-05-31 2017-05-30 Method of mounting die SG11201810165WA (en)

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JP2016108918A JP6316873B2 (ja) 2016-05-31 2016-05-31 ダイの実装方法
PCT/JP2017/020054 WO2017209115A1 (fr) 2016-05-31 2017-05-30 Procédé de montage d'une puce

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KR (1) KR102228702B1 (fr)
CN (1) CN109314062B (fr)
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CN111712906B (zh) * 2017-11-30 2023-11-03 株式会社新川 聚四氟乙烯片以及晶粒封装方法
US11136202B2 (en) * 2020-01-06 2021-10-05 Asm Technology Singapore Pte Ltd Direct transfer apparatus for electronic components

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JPH05190665A (ja) * 1992-01-17 1993-07-30 Fujitsu Ltd バンプ付半導体チップ用ピックアップコレット及びバンプ付半導体チップのピックアップ方法
JPH0684978A (ja) * 1992-09-07 1994-03-25 Fujitsu Ltd ベアチップ半導体素子用吸着治具
JPH08181158A (ja) * 1994-12-22 1996-07-12 Nitto Denko Corp 真空吸引装置
JP3565319B2 (ja) * 1999-04-14 2004-09-15 シャープ株式会社 半導体装置及びその製造方法
JP4338834B2 (ja) * 1999-08-06 2009-10-07 日本テキサス・インスツルメンツ株式会社 超音波振動を用いた半導体チップの実装方法
JP2002134564A (ja) * 2000-10-27 2002-05-10 Optrex Corp 圧着ヘッド
JP2003218590A (ja) * 2002-01-18 2003-07-31 Nec Corp 部品吸着具、部品把持機構及び部品把持方法
JP4057875B2 (ja) * 2002-10-04 2008-03-05 株式会社ルネサステクノロジ 半導体装置の製造方法
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JP2006066625A (ja) 2004-08-26 2006-03-09 Nec Corp ベアチップ実装装置、ベアチップ実装方法及びシート
JP4229888B2 (ja) * 2004-08-30 2009-02-25 富士通マイクロエレクトロニクス株式会社 電子部品実装装置
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JP2010245412A (ja) * 2009-04-09 2010-10-28 Renesas Electronics Corp 半導体集積回路装置の製造方法
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JP5669137B2 (ja) 2011-03-01 2015-02-12 富士機械製造株式会社 ダイピックアップ装置
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CN107210239B (zh) 2015-02-03 2021-03-05 东丽工程株式会社 安装装置和安装方法

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WO2017209115A1 (fr) 2017-12-07
JP2017216349A (ja) 2017-12-07
CN109314062A (zh) 2019-02-05
TW201810447A (zh) 2018-03-16
JP6316873B2 (ja) 2018-04-25
TWI664682B (zh) 2019-07-01
CN109314062B (zh) 2022-04-29
KR102228702B1 (ko) 2021-03-16
US20200321311A1 (en) 2020-10-08
US11069651B2 (en) 2021-07-20
KR20190008371A (ko) 2019-01-23

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