SG11201601195PA - Accessing memory cells in parallel in a cross-point array - Google Patents

Accessing memory cells in parallel in a cross-point array

Info

Publication number
SG11201601195PA
SG11201601195PA SG11201601195PA SG11201601195PA SG11201601195PA SG 11201601195P A SG11201601195P A SG 11201601195PA SG 11201601195P A SG11201601195P A SG 11201601195PA SG 11201601195P A SG11201601195P A SG 11201601195PA SG 11201601195P A SG11201601195P A SG 11201601195PA
Authority
SG
Singapore
Prior art keywords
parallel
cross
memory cells
point array
accessing memory
Prior art date
Application number
SG11201601195PA
Other languages
English (en)
Inventor
Hernan Castro
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of SG11201601195PA publication Critical patent/SG11201601195PA/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/003Cell access
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658Controller construction arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0023Address circuits or decoders
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/004Reading or sensing circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0061Timing circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0069Writing or programming circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0097Erasing, e.g. resetting, circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0069Writing or programming circuits or methods
    • G11C2013/0088Write with the simultaneous writing of a plurality of cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/10Resistive cells; Technology aspects
    • G11C2213/15Current-voltage curve
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70Resistive array aspects
    • G11C2213/71Three dimensional array
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70Resistive array aspects
    • G11C2213/77Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Semiconductor Memories (AREA)
SG11201601195PA 2013-09-10 2014-08-26 Accessing memory cells in parallel in a cross-point array SG11201601195PA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/023,112 US9312005B2 (en) 2013-09-10 2013-09-10 Accessing memory cells in parallel in a cross-point array
PCT/US2014/052763 WO2015038328A1 (en) 2013-09-10 2014-08-26 Accessing memory cells in parallel in a cross-point array

Publications (1)

Publication Number Publication Date
SG11201601195PA true SG11201601195PA (en) 2016-03-30

Family

ID=52626687

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201601195PA SG11201601195PA (en) 2013-09-10 2014-08-26 Accessing memory cells in parallel in a cross-point array

Country Status (7)

Country Link
US (5) US9312005B2 (zh)
EP (1) EP3044795B1 (zh)
JP (1) JP6201056B2 (zh)
KR (3) KR102349354B1 (zh)
CN (2) CN105518789B (zh)
SG (1) SG11201601195PA (zh)
WO (1) WO2015038328A1 (zh)

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Also Published As

Publication number Publication date
US20180190349A1 (en) 2018-07-05
US20150074326A1 (en) 2015-03-12
US20190341102A1 (en) 2019-11-07
US9741432B2 (en) 2017-08-22
KR101890498B1 (ko) 2018-09-28
CN109147856A (zh) 2019-01-04
WO2015038328A1 (en) 2015-03-19
KR102349354B1 (ko) 2022-01-10
CN109147856B (zh) 2020-04-21
US20160240248A1 (en) 2016-08-18
EP3044795B1 (en) 2020-03-18
US9312005B2 (en) 2016-04-12
US10854287B2 (en) 2020-12-01
KR20190047137A (ko) 2019-05-07
US20170352410A1 (en) 2017-12-07
US10360975B2 (en) 2019-07-23
JP6201056B2 (ja) 2017-09-20
EP3044795A4 (en) 2017-05-10
KR20180093104A (ko) 2018-08-20
CN105518789B (zh) 2018-08-14
JP2016535384A (ja) 2016-11-10
CN105518789A (zh) 2016-04-20
EP3044795A1 (en) 2016-07-20
US9934850B2 (en) 2018-04-03
KR20160042040A (ko) 2016-04-18

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