SG10201705049VA - Photoresist design layout pattern proximity correction through fast edge placement error prediction via a physics-based etch profile modeling framework - Google Patents

Photoresist design layout pattern proximity correction through fast edge placement error prediction via a physics-based etch profile modeling framework

Info

Publication number
SG10201705049VA
SG10201705049VA SG10201705049VA SG10201705049VA SG10201705049VA SG 10201705049V A SG10201705049V A SG 10201705049VA SG 10201705049V A SG10201705049V A SG 10201705049VA SG 10201705049V A SG10201705049V A SG 10201705049VA SG 10201705049V A SG10201705049V A SG 10201705049VA
Authority
SG
Singapore
Prior art keywords
physics
layout pattern
design layout
proximity correction
edge placement
Prior art date
Application number
SG10201705049VA
Other languages
English (en)
Inventor
Saravanapriyan Sriraman
Richard Wise
Harmeet Singh
Alex Paterson
Iii Andrew D Bailey
Vahid Vahedi
Richard A Gottscho
Original Assignee
Lam Res Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Res Corp filed Critical Lam Res Corp
Publication of SG10201705049VA publication Critical patent/SG10201705049VA/en

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Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/70Adapting basic layout or design of masks to lithographic process requirements, e.g., second iteration correction of mask patterns for imaging
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/80Etching
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • G03F7/70441Optical proximity correction [OPC]
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70491Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
    • G03F7/70525Controlling normal operating mode, e.g. matching different apparatus, remote control or prediction of failure
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/20Design optimisation, verification or simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00Details relating to the type of the circuit
    • G06F2115/06Structured ASICs
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/392Floor-planning or layout, e.g. partitioning or placement

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Architecture (AREA)
  • Drying Of Semiconductors (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
SG10201705049VA 2016-06-21 2017-06-19 Photoresist design layout pattern proximity correction through fast edge placement error prediction via a physics-based etch profile modeling framework SG10201705049VA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US15/188,910 US10197908B2 (en) 2016-06-21 2016-06-21 Photoresist design layout pattern proximity correction through fast edge placement error prediction via a physics-based etch profile modeling framework

Publications (1)

Publication Number Publication Date
SG10201705049VA true SG10201705049VA (en) 2018-01-30

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SG10201705049VA SG10201705049VA (en) 2016-06-21 2017-06-19 Photoresist design layout pattern proximity correction through fast edge placement error prediction via a physics-based etch profile modeling framework

Country Status (6)

Country Link
US (2) US10197908B2 (ko)
JP (1) JP2017227892A (ko)
KR (1) KR102415463B1 (ko)
CN (2) CN113420523A (ko)
SG (1) SG10201705049VA (ko)
TW (1) TWI738796B (ko)

Families Citing this family (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102466464B1 (ko) * 2015-08-03 2022-11-14 삼성전자주식회사 광 근접 보정을 위해 초기 바이어스 값을 제공하는 방법, 및 그 초기 바이어스 값에 기초한 광 근접 보정을 수반하는 마스크 제작 방법
US10386828B2 (en) 2015-12-17 2019-08-20 Lam Research Corporation Methods and apparatuses for etch profile matching by surface kinetic model optimization
US9792393B2 (en) 2016-02-08 2017-10-17 Lam Research Corporation Methods and apparatuses for etch profile optimization by reflectance spectra matching and surface kinetic model optimization
US10032681B2 (en) 2016-03-02 2018-07-24 Lam Research Corporation Etch metric sensitivity for endpoint detection
US10197908B2 (en) 2016-06-21 2019-02-05 Lam Research Corporation Photoresist design layout pattern proximity correction through fast edge placement error prediction via a physics-based etch profile modeling framework
US10254641B2 (en) 2016-12-01 2019-04-09 Lam Research Corporation Layout pattern proximity correction through fast edge placement error prediction
EP3475760B1 (en) 2016-12-30 2020-02-12 Google LLC Compensating deposition non-uniformities in circuit elements
US10269663B2 (en) * 2017-01-06 2019-04-23 Varian Semiconductor Equipment Associates, Inc. Critical dimensions variance compensation
US10534257B2 (en) 2017-05-01 2020-01-14 Lam Research Corporation Layout pattern proximity correction through edge placement error prediction
JP6942555B2 (ja) * 2017-08-03 2021-09-29 東京エレクトロン株式会社 基板処理方法、コンピュータ記憶媒体及び基板処理システム
US11841391B1 (en) * 2017-09-15 2023-12-12 Eysight Technologies, Inc. Signal generator utilizing a neural network
DE102018125109B4 (de) * 2017-11-14 2022-10-13 Taiwan Semiconductor Manufacturing Co., Ltd. Optische Nahbereichskorrektur
CN110137097B (zh) * 2018-02-02 2020-06-19 北京北方华创微电子装备有限公司 获得刻蚀深度极限值的方法
US10692203B2 (en) 2018-02-19 2020-06-23 International Business Machines Corporation Measuring defectivity by equipping model-less scatterometry with cognitive machine learning
US10572697B2 (en) 2018-04-06 2020-02-25 Lam Research Corporation Method of etch model calibration using optical scatterometry
US11624981B2 (en) 2018-04-10 2023-04-11 Lam Research Corporation Resist and etch modeling
WO2019200015A1 (en) 2018-04-10 2019-10-17 Lam Research Corporation Optical metrology in machine learning to characterize features
CN110416111B (zh) * 2018-04-28 2022-05-27 北京北方华创微电子装备有限公司 实现多个腔室匹配的方法和实现多个腔室匹配的装置
WO2020020759A1 (en) 2018-07-26 2020-01-30 Asml Netherlands B.V. Method for determining an etch profile of a layer of a wafer for a simulation system
CN110931377B (zh) * 2018-09-20 2023-11-03 台湾积体电路制造股份有限公司 反射率测量系统与方法
US10657214B2 (en) * 2018-10-09 2020-05-19 Applied Materials, Inc. Predictive spatial digital design of experiment for advanced semiconductor process optimization and control
US10930531B2 (en) 2018-10-09 2021-02-23 Applied Materials, Inc. Adaptive control of wafer-to-wafer variability in device performance in advanced semiconductor processes
US10705514B2 (en) * 2018-10-09 2020-07-07 Applied Materials, Inc. Adaptive chamber matching in advanced semiconductor process control
CN112889140B (zh) * 2018-11-12 2023-06-02 株式会社日立高新技术 推定缺陷的发生的系统以及计算机可读介质
US10977405B2 (en) 2019-01-29 2021-04-13 Lam Research Corporation Fill process optimization using feature scale modeling
TWI776015B (zh) * 2019-01-30 2022-09-01 晶喬科技股份有限公司 半導體元件的製程開發方法以及系統
KR20210130784A (ko) * 2019-03-25 2021-11-01 에이에스엠엘 네델란즈 비.브이. 패터닝 공정에서 패턴을 결정하는 방법
CN118210204A (zh) 2019-05-21 2024-06-18 Asml荷兰有限公司 用于确定与期望图案相关联的随机变化的方法
CN114008533A (zh) 2019-06-20 2022-02-01 Asml荷兰有限公司 用于图案化过程建模的方法
US20210064977A1 (en) * 2019-08-29 2021-03-04 Synopsys, Inc. Neural network based mask synthesis for integrated circuits
US11106855B2 (en) * 2019-09-17 2021-08-31 Taiwan Semiconductor Manufacturing Company Limited Pre-characterization mixed-signal design, placement, and routing using machine learning
KR20210064445A (ko) 2019-11-25 2021-06-03 삼성전자주식회사 반도체 공정 시뮬레이션 시스템 및 그것의 시뮬레이션 방법
CN111308857B (zh) * 2020-02-25 2023-08-11 上海华力集成电路制造有限公司 一种转角opc检查方法
KR102416787B1 (ko) * 2020-03-25 2022-07-05 한국핵융합에너지연구원 플라즈마 시뮬레이션을 위한 데이터의 입력 장치 및 방법
KR20210133364A (ko) 2020-04-28 2021-11-08 삼성전자주식회사 반도체 장치의 제조를 위한 방법 및 컴퓨팅 장치
KR20220001262A (ko) 2020-06-29 2022-01-05 삼성전자주식회사 반도체 공정의 근접 보정 방법
US11194951B1 (en) * 2020-08-31 2021-12-07 Siemens Industry Software Inc. Optical proximity correction model verification
CN112485976B (zh) * 2020-12-11 2022-11-01 上海集成电路装备材料产业创新中心有限公司 基于逆向刻蚀模型确定光学临近修正光刻目标图案的方法
KR20230016112A (ko) 2021-07-23 2023-02-01 삼성전자주식회사 반도체 장치의 제조를 위한 전자 장치 및 전자 장치의 동작 방법
US20230092729A1 (en) * 2021-09-20 2023-03-23 Kla Corporation Semiconductor Profile Measurement Based On A Scanning Conditional Model
US20230222264A1 (en) * 2022-01-07 2023-07-13 Applied Materials, Inc. Processing chamber calibration
CN114898169B (zh) * 2022-03-10 2024-04-12 武汉大学 一种基于深度学习的光刻opc数据库建立方法
CN115408650B (zh) * 2022-08-03 2023-04-28 武汉宇微光学软件有限公司 光刻胶多级串连表征网络的建模、校准、仿真方法和系统
WO2024041831A1 (en) * 2022-08-25 2024-02-29 Asml Netherlands B.V. Modelling of multi-level etch processes

Family Cites Families (82)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5114233A (en) 1990-10-09 1992-05-19 At&T Bell Laboratories Method for inspecting etched workpieces
US5421934A (en) 1993-03-26 1995-06-06 Matsushita Electric Industrial Co., Ltd. Dry-etching process simulator
US6151532A (en) * 1998-03-03 2000-11-21 Lam Research Corporation Method and apparatus for predicting plasma-process surface profiles
US6268226B1 (en) 1999-06-30 2001-07-31 International Business Machines Corporation Reactive ion etch loading measurement technique
WO2001056072A1 (de) 2000-01-25 2001-08-02 Infineon Technologies Ag Verfahren zur überwachung eines herstellungsprozesses
US6410351B1 (en) 2000-07-13 2002-06-25 Advanced Micro Devices, Inc. Method and apparatus for modeling thickness profiles and controlling subsequent etch process
US20030113766A1 (en) 2000-10-30 2003-06-19 Sru Biosystems, Llc Amine activated colorimetric resonant biosensor
US6951823B2 (en) 2001-05-14 2005-10-04 Axcelis Technologies, Inc. Plasma ashing process
US6650423B1 (en) 2001-07-02 2003-11-18 Advanced Micro Devices Inc. Method and apparatus for determining column dimensions using scatterometry
US6684382B2 (en) 2001-08-31 2004-01-27 Numerical Technologies, Inc. Microloading effect correction
US6903826B2 (en) 2001-09-06 2005-06-07 Hitachi, Ltd. Method and apparatus for determining endpoint of semiconductor element fabricating process
US6753115B2 (en) 2001-12-20 2004-06-22 Numerical Technologies, Inc. Facilitating minimum spacing and/or width control optical proximity correction
US7363099B2 (en) 2002-06-07 2008-04-22 Cadence Design Systems, Inc. Integrated circuit metrology
US6973633B2 (en) 2002-07-24 2005-12-06 George Lippincott Caching of lithography and etch simulation results
US7402257B1 (en) 2002-07-30 2008-07-22 Advanced Micro Devices, Inc. Plasma state monitoring to control etching processes and across-wafer uniformity, and system for performing same
US7504182B2 (en) 2002-09-18 2009-03-17 Fei Company Photolithography mask repair
US20050074907A1 (en) 2003-10-06 2005-04-07 Adrian Kriz Semi-conductor wafer fabrication
US7523076B2 (en) 2004-03-01 2009-04-21 Tokyo Electron Limited Selecting a profile model for use in optical metrology using a machine learning system
JP5112624B2 (ja) * 2004-09-01 2013-01-09 ラム リサーチ コーポレーション プロセスチャンバ及びプラズマチャンバを操作する方法
US7171284B2 (en) 2004-09-21 2007-01-30 Timbre Technologies, Inc. Optical metrology model optimization based on goals
US7739651B2 (en) 2004-09-29 2010-06-15 Synopsys, Inc. Method and apparatus to determine if a pattern is robustly manufacturable
US7253008B2 (en) 2004-12-28 2007-08-07 Sandia Corporation Reactive ion etched substrates and methods of making and using
US7442649B2 (en) * 2005-03-29 2008-10-28 Lam Research Corporation Etch with photoresist mask
US7539969B2 (en) * 2005-05-10 2009-05-26 Lam Research Corporation Computer readable mask shrink control processor
US7588946B2 (en) 2005-07-25 2009-09-15 Taiwan Semiconductor Manufacturing Company, Ltd. Controlling system for gate formation of semiconductor devices
KR100958714B1 (ko) 2005-08-08 2010-05-18 브라이언 테크놀로지스, 인코포레이티드 리소그래피 공정의 포커스-노광 모델을 생성하는 시스템 및방법
US7695876B2 (en) 2005-08-31 2010-04-13 Brion Technologies, Inc. Method for identifying and using process window signature patterns for lithography process control
CN1940715A (zh) * 2005-09-27 2007-04-04 力晶半导体股份有限公司 光掩模图案的校正方法及其形成方法
US7600212B2 (en) 2005-10-03 2009-10-06 Cadence Design Systems, Inc. Method of compensating photomask data for the effects of etch and lithography processes
US7694267B1 (en) 2006-02-03 2010-04-06 Brion Technologies, Inc. Method for process window optimized optical proximity correction
US20070249071A1 (en) 2006-04-21 2007-10-25 Lei Lian Neural Network Methods and Apparatuses for Monitoring Substrate Processing
JP4914119B2 (ja) 2006-05-31 2012-04-11 株式会社日立ハイテクノロジーズ プラズマ処理方法およびプラズマ処理装置
US7829468B2 (en) * 2006-06-07 2010-11-09 Lam Research Corporation Method and apparatus to detect fault conditions of plasma processing reactor
US7525673B2 (en) 2006-07-10 2009-04-28 Tokyo Electron Limited Optimizing selected variables of an optical metrology system
US7849423B1 (en) 2006-07-21 2010-12-07 Cadence Design Systems, Inc. Method of verifying photomask data based on models of etch and lithography processes
GB0616131D0 (en) * 2006-08-14 2006-09-20 Oxford Instr Plasma Technology Surface processing apparatus
RU2410828C2 (ru) * 2006-09-15 2011-01-27 Абб Швайц Аг Способ эксплуатации преобразовательной схемы и устройство для осуществления способа
US7949618B2 (en) 2007-03-28 2011-05-24 Tokyo Electron Limited Training a machine learning system to determine photoresist parameters
US8001512B1 (en) 2007-06-26 2011-08-16 Cadence Design Systems, Inc. Method and system for implementing context simulation
JP5036450B2 (ja) 2007-08-16 2012-09-26 株式会社東芝 シミュレーション方法およびシミュレーションプログラム
US7812966B2 (en) 2007-08-30 2010-10-12 Infineon Technologies Ag Method of determining the depth profile of a surface structure and system for determining the depth profile of a surface structure
KR101374932B1 (ko) 2007-09-28 2014-03-17 재단법인서울대학교산학협력재단 확산 제한 식각과정에 의한 수평 변환 다공성 실리콘 광학필터의 제조방법 및 그에 의한 필터구조
EP2223245B1 (en) 2007-11-30 2011-07-20 Coventor, Inc. System and method for three-dimensional schematic capture and result visualization of multi-physics system models
JP5026326B2 (ja) 2008-04-04 2012-09-12 株式会社日立ハイテクノロジーズ エッチング処理状態の判定方法、システム
US8649016B2 (en) 2009-06-23 2014-02-11 Rudolph Technologies, Inc. System for directly measuring the depth of a high aspect ratio etched feature on a wafer
US8279409B1 (en) 2009-08-05 2012-10-02 Cadence Design Systems, Inc. System and method for calibrating a lithography model
WO2011158239A1 (en) 2010-06-17 2011-12-22 Nova Measuring Instruments Ltd. Method and system for optimizing optical inspection of patterned structures
US8494314B2 (en) 2010-07-05 2013-07-23 Infinera Corporation Fabrication tolerant polarization converter
US8666703B2 (en) 2010-07-22 2014-03-04 Tokyo Electron Limited Method for automated determination of an optimally parameterized scatterometry model
US8577820B2 (en) 2011-03-04 2013-11-05 Tokyo Electron Limited Accurate and fast neural network training for library-based critical dimension (CD) metrology
US20120280354A1 (en) 2011-05-05 2012-11-08 Synopsys, Inc. Methods for fabricating high-density integrated circuit devices
NL2009982A (en) * 2012-01-10 2013-07-15 Asml Netherlands Bv Source mask optimization to reduce stochastic effects.
KR101780874B1 (ko) 2012-10-17 2017-09-21 도쿄엘렉트론가부시키가이샤 다변량 분석을 이용한 플라즈마 에칭 종료점 검출
JP5974840B2 (ja) * 2012-11-07 2016-08-23 ソニー株式会社 シミュレーション方法、シミュレーションプログラム、シミュレータ、加工装置、半導体装置の製造方法
TWI512389B (zh) * 2013-02-22 2015-12-11 Globalfoundries Us Inc 定向自組裝製程/鄰近校正之方法
TWI621957B (zh) 2013-03-14 2018-04-21 新納普系統股份有限公司 使用點擊最佳化的次解析度輔助特徵實現方式
US9230819B2 (en) * 2013-04-05 2016-01-05 Lam Research Corporation Internal plasma grid applications for semiconductor fabrication in context of ion-ion plasma processing
US9412673B2 (en) 2013-08-23 2016-08-09 Kla-Tencor Corporation Multi-model metrology
US9274417B2 (en) 2013-09-18 2016-03-01 Taiwan Semiconductor Manufacturing Company, Ltd. Method for lithography patterning
TWI668725B (zh) 2013-10-01 2019-08-11 美商蘭姆研究公司 使用模型化、回授及阻抗匹配之蝕刻速率的控制
US10895810B2 (en) 2013-11-15 2021-01-19 Kla Corporation Automatic selection of sample values for optical metrology
JP6177671B2 (ja) * 2013-11-25 2017-08-09 ソニーセミコンダクタソリューションズ株式会社 シミュレーション方法、シミュレーションプログラムおよびシミュレータ
JP6318007B2 (ja) 2013-11-29 2018-04-25 株式会社日立ハイテクノロジーズ データ処理方法、データ処理装置および処理装置
CN105849643B (zh) 2013-12-17 2019-07-19 Asml荷兰有限公司 良品率估计和控制
US9659126B2 (en) 2014-01-26 2017-05-23 Coventor, Inc. Modeling pattern dependent effects for a 3-D virtual semiconductor fabrication environment
CN105225979A (zh) 2014-06-19 2016-01-06 中芯国际集成电路制造(上海)有限公司 一种半导体器件制程预测系统和方法
US10191366B2 (en) * 2014-06-25 2019-01-29 Asml Netherlands B.V. Etch variation tolerant optimization
US10191376B2 (en) * 2014-08-19 2019-01-29 Intel Corporation Cross scan proximity correction with ebeam universal cutter
CN104820787A (zh) * 2015-05-13 2015-08-05 西安电子科技大学 基于fpga芯片的电路系统功耗预测方法
KR20170047101A (ko) 2015-10-22 2017-05-04 삼성전자주식회사 Opc 이용한 마스크 제조방법 및 반도체 소자 제조방법
US10599789B2 (en) * 2015-11-25 2020-03-24 Synopsys, Inc. Topography simulation of etching and/or deposition on a physical structure
US10386828B2 (en) 2015-12-17 2019-08-20 Lam Research Corporation Methods and apparatuses for etch profile matching by surface kinetic model optimization
CN105516022B (zh) * 2016-01-27 2018-10-09 盛科网络(苏州)有限公司 在芯片中实现802.11 QoS优先级值灵活映射的方法
US9792393B2 (en) 2016-02-08 2017-10-17 Lam Research Corporation Methods and apparatuses for etch profile optimization by reflectance spectra matching and surface kinetic model optimization
US10032681B2 (en) * 2016-03-02 2018-07-24 Lam Research Corporation Etch metric sensitivity for endpoint detection
US10346740B2 (en) 2016-06-01 2019-07-09 Kla-Tencor Corp. Systems and methods incorporating a neural network and a forward physical model for semiconductor applications
US10197908B2 (en) 2016-06-21 2019-02-05 Lam Research Corporation Photoresist design layout pattern proximity correction through fast edge placement error prediction via a physics-based etch profile modeling framework
US10254641B2 (en) 2016-12-01 2019-04-09 Lam Research Corporation Layout pattern proximity correction through fast edge placement error prediction
US10262910B2 (en) 2016-12-23 2019-04-16 Lam Research Corporation Method of feature exaction from time-series of spectra to control endpoint of process
US20180239851A1 (en) 2017-02-21 2018-08-23 Asml Netherlands B.V. Apparatus and method for inferring parameters of a model of a measurement structure for a patterning process
US10534257B2 (en) 2017-05-01 2020-01-14 Lam Research Corporation Layout pattern proximity correction through edge placement error prediction
US20190049937A1 (en) 2017-08-09 2019-02-14 Lam Research Corporation Methods and apparatuses for etch profile optimization by reflectance spectra matching and surface kinetic model optimization

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US10585347B2 (en) 2020-03-10
US10197908B2 (en) 2019-02-05
US20170363950A1 (en) 2017-12-21
US20190250501A1 (en) 2019-08-15
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TWI738796B (zh) 2021-09-11
TW201809856A (zh) 2018-03-16

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