SE9802800D0 - Memory supervision - Google Patents

Memory supervision

Info

Publication number
SE9802800D0
SE9802800D0 SE9802800A SE9802800A SE9802800D0 SE 9802800 D0 SE9802800 D0 SE 9802800D0 SE 9802800 A SE9802800 A SE 9802800A SE 9802800 A SE9802800 A SE 9802800A SE 9802800 D0 SE9802800 D0 SE 9802800D0
Authority
SE
Sweden
Prior art keywords
memory
memory location
location
storage unit
written
Prior art date
Application number
SE9802800A
Other languages
English (en)
Inventor
Stefan Gustafsson
Mikael Lindberg
Mats Ernkell
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Priority to SE9802800A priority Critical patent/SE9802800D0/sv
Publication of SE9802800D0 publication Critical patent/SE9802800D0/sv
Priority to CA002340633A priority patent/CA2340633C/en
Priority to BR9913467-5A priority patent/BR9913467A/pt
Priority to PCT/SE1999/001207 priority patent/WO2000011678A1/en
Priority to DE69921150T priority patent/DE69921150T2/de
Priority to AU49488/99A priority patent/AU4948899A/en
Priority to EP99933431A priority patent/EP1104579B1/en
Priority to US09/378,457 priority patent/US6438719B1/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0409Online test

Landscapes

  • Monitoring And Testing Of Exchanges (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
SE9802800A 1998-08-21 1998-08-21 Memory supervision SE9802800D0 (sv)

Priority Applications (8)

Application Number Priority Date Filing Date Title
SE9802800A SE9802800D0 (sv) 1998-08-21 1998-08-21 Memory supervision
CA002340633A CA2340633C (en) 1998-08-21 1999-07-02 Memory supervision
BR9913467-5A BR9913467A (pt) 1998-08-21 1999-07-02 Processo e sistema para testar uma memória em operação
PCT/SE1999/001207 WO2000011678A1 (en) 1998-08-21 1999-07-02 Memory supervision
DE69921150T DE69921150T2 (de) 1998-08-21 1999-07-02 Speicherüberwachung
AU49488/99A AU4948899A (en) 1998-08-21 1999-07-02 Memory supervision
EP99933431A EP1104579B1 (en) 1998-08-21 1999-07-02 Memory supervision
US09/378,457 US6438719B1 (en) 1998-08-21 1999-08-20 Memory supervision

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9802800A SE9802800D0 (sv) 1998-08-21 1998-08-21 Memory supervision

Publications (1)

Publication Number Publication Date
SE9802800D0 true SE9802800D0 (sv) 1998-08-21

Family

ID=20412313

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9802800A SE9802800D0 (sv) 1998-08-21 1998-08-21 Memory supervision

Country Status (8)

Country Link
US (1) US6438719B1 (sv)
EP (1) EP1104579B1 (sv)
AU (1) AU4948899A (sv)
BR (1) BR9913467A (sv)
CA (1) CA2340633C (sv)
DE (1) DE69921150T2 (sv)
SE (1) SE9802800D0 (sv)
WO (1) WO2000011678A1 (sv)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6922801B2 (en) * 2001-06-01 2005-07-26 International Business Machines Corporation Storage media scanner apparatus and method providing media predictive failure analysis and proactive media surface defect management
US20040015761A1 (en) * 2002-07-22 2004-01-22 Finisar Corporation Scalable asynchronous I/O testing tool
US20040015762A1 (en) * 2002-07-22 2004-01-22 Finisar Corporation Scalable system testing tools
US7114106B2 (en) 2002-07-22 2006-09-26 Finisar Corporation Scalable network attached storage (NAS) testing tool
FR2910145A1 (fr) * 2006-12-18 2008-06-20 St Microelectronics Sa Procede et dispositif pour securiser la lecture d'une memoire.
US8843446B2 (en) 2011-07-04 2014-09-23 Zerto Ltd. Methods and apparatus for time-based dynamically adjusted journaling
DE102018006313A1 (de) * 2018-06-08 2019-12-12 Giesecke+Devrient Mobile Security Gmbh Verfahren mit Safe-Error-Abwehrmaßnahme

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4414665A (en) * 1979-11-21 1983-11-08 Nippon Telegraph & Telephone Public Corp. Semiconductor memory device test apparatus
AT367557B (de) * 1980-04-25 1982-07-12 Schrack Elektrizitaets Ag E Schaltungsanordnung zur ueberwachung der funktion von festwert- und/oder schreib-lesespeichern
JPS5856294A (ja) * 1981-09-30 1983-04-02 Hitachi Ltd ランダムアクセスメモリのリ−ドライトチエツク方法
JPS59112494A (ja) * 1982-12-17 1984-06-28 Fuji Electric Co Ltd メモリテスト方式
JPS63175300A (ja) 1987-01-16 1988-07-19 Hitachi Ltd 半導体集積回路装置
GB2222461B (en) * 1988-08-30 1993-05-19 Mitsubishi Electric Corp On chip testing of semiconductor memory devices
JP2779538B2 (ja) * 1989-04-13 1998-07-23 三菱電機株式会社 半導体集積回路メモリのためのテスト信号発生器およびテスト方法
JP2838425B2 (ja) * 1990-01-08 1998-12-16 三菱電機株式会社 半導体記憶装置
US5274648A (en) * 1990-01-24 1993-12-28 International Business Machines Corporation Memory card resident diagnostic testing
JPH04271445A (ja) * 1990-08-02 1992-09-28 Internatl Business Mach Corp <Ibm> メモリ・テスト装置
JP2673395B2 (ja) * 1990-08-29 1997-11-05 三菱電機株式会社 半導体記憶装置およびそのテスト方法
JPH04356799A (ja) * 1990-08-29 1992-12-10 Mitsubishi Electric Corp 半導体記憶装置
DE4028819A1 (de) 1990-09-11 1992-03-12 Siemens Ag Schaltungsanordnung zum testen eines halbleiterspeichers mittels paralleltests mit verschiedenen testbitmustern
US6105152A (en) * 1993-04-13 2000-08-15 Micron Technology, Inc. Devices and methods for testing cell margin of memory devices
US5479413A (en) * 1994-06-06 1995-12-26 Digital Equipment Corporation Method for testing large memory arrays during system initialization
KR0152914B1 (ko) * 1995-04-21 1998-12-01 문정환 반도체 메모리장치
JP3673027B2 (ja) * 1996-09-05 2005-07-20 沖電気工業株式会社 テスト対象の半導体記憶回路を備えた半導体記憶装置
JPH10134599A (ja) * 1996-10-31 1998-05-22 Kawasaki Steel Corp 半導体記憶装置

Also Published As

Publication number Publication date
CA2340633C (en) 2006-11-14
US6438719B1 (en) 2002-08-20
EP1104579A1 (en) 2001-06-06
CA2340633A1 (en) 2000-03-02
AU4948899A (en) 2000-03-14
BR9913467A (pt) 2001-06-05
WO2000011678A1 (en) 2000-03-02
EP1104579B1 (en) 2004-10-13
DE69921150T2 (de) 2005-03-17
DE69921150D1 (de) 2004-11-18

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