SE7712741L - Integrerat halvledararrangemang for logikkretsar med bipolertransistorer samt metod for tillverkning derav - Google Patents

Integrerat halvledararrangemang for logikkretsar med bipolertransistorer samt metod for tillverkning derav

Info

Publication number
SE7712741L
SE7712741L SE7712741A SE7712741A SE7712741L SE 7712741 L SE7712741 L SE 7712741L SE 7712741 A SE7712741 A SE 7712741A SE 7712741 A SE7712741 A SE 7712741A SE 7712741 L SE7712741 L SE 7712741L
Authority
SE
Sweden
Prior art keywords
disclosed
bipoler
transistors
manufacture
methods
Prior art date
Application number
SE7712741A
Other languages
English (en)
Swedish (sv)
Inventor
H H Berger
S K Wiedmann
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of SE7712741L publication Critical patent/SE7712741L/xx

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/63—Combinations of vertical and lateral BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65—Integrated injection logic
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/038—Diffusions-staged
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/167—Two diffusions in one hole

Landscapes

  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
SE7712741A 1976-11-16 1977-11-10 Integrerat halvledararrangemang for logikkretsar med bipolertransistorer samt metod for tillverkning derav SE7712741L (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2652103A DE2652103C2 (de) 1976-11-16 1976-11-16 Integrierte Halbleiteranordnung für ein logisches Schaltungskonzept und Verfahren zu ihrer Herstellung

Publications (1)

Publication Number Publication Date
SE7712741L true SE7712741L (sv) 1978-05-17

Family

ID=5993241

Family Applications (1)

Application Number Title Priority Date Filing Date
SE7712741A SE7712741L (sv) 1976-11-16 1977-11-10 Integrerat halvledararrangemang for logikkretsar med bipolertransistorer samt metod for tillverkning derav

Country Status (15)

Country Link
US (1) US4158783A (de)
JP (1) JPS5363874A (de)
AT (1) AT382261B (de)
BE (1) BE859759A (de)
BR (1) BR7707519A (de)
CA (1) CA1092722A (de)
DD (1) DD137771A5 (de)
DE (1) DE2652103C2 (de)
ES (1) ES464138A1 (de)
FR (1) FR2371063A1 (de)
GB (1) GB1592334A (de)
IT (1) IT1115741B (de)
NL (1) NL7711778A (de)
SE (1) SE7712741L (de)
SU (1) SU912065A3 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4199776A (en) * 1978-08-24 1980-04-22 Rca Corporation Integrated injection logic with floating reinjectors
JPS55170895U (de) * 1979-05-26 1980-12-08
US4338622A (en) * 1979-06-29 1982-07-06 International Business Machines Corporation Self-aligned semiconductor circuits and process therefor
US4794277A (en) * 1986-01-13 1988-12-27 Unitrode Corporation Integrated circuit under-voltage lockout
US5177029A (en) * 1989-03-28 1993-01-05 Matsushita Electric Works, Ltd. Method for manufacturing static induction type semiconductor device enhancement mode power

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7107040A (de) * 1971-05-22 1972-11-24
NL7200294A (de) * 1972-01-08 1973-07-10
US3919005A (en) * 1973-05-07 1975-11-11 Fairchild Camera Instr Co Method for fabricating double-diffused, lateral transistor
US3959809A (en) * 1974-05-10 1976-05-25 Signetics Corporation High inverse gain transistor
DE2446649A1 (de) * 1974-09-30 1976-04-15 Siemens Ag Bipolare logikschaltung
US3993513A (en) * 1974-10-29 1976-11-23 Fairchild Camera And Instrument Corporation Combined method for fabricating oxide-isolated vertical bipolar transistors and complementary oxide-isolated lateral bipolar transistors and the resulting structures
US4058419A (en) * 1974-12-27 1977-11-15 Tokyo Shibaura Electric, Co., Ltd. Method of manufacturing integrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques
DE2509530C2 (de) * 1975-03-05 1985-05-23 Ibm Deutschland Gmbh, 7000 Stuttgart Halbleiteranordnung für die Grundbausteine eines hochintegrierbaren logischen Halbleiterschaltungskonzepts basierend auf Mehrfachkollektor-Umkehrtransistoren

Also Published As

Publication number Publication date
NL7711778A (nl) 1978-05-18
GB1592334A (en) 1981-07-08
CA1092722A (en) 1980-12-30
BR7707519A (pt) 1978-08-01
FR2371063A1 (fr) 1978-06-09
FR2371063B1 (de) 1980-08-01
DD137771A5 (de) 1979-09-19
DE2652103A1 (de) 1978-05-24
ATA470677A (de) 1986-06-15
BE859759A (fr) 1978-02-01
ES464138A1 (es) 1978-12-16
IT1115741B (it) 1986-02-03
SU912065A3 (ru) 1982-03-07
US4158783A (en) 1979-06-19
JPS5363874A (en) 1978-06-07
DE2652103C2 (de) 1982-10-28
AT382261B (de) 1987-02-10
JPS5615589B2 (de) 1981-04-10

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Legal Events

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NAV Patent application has lapsed

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