FR2337426A1 - Procede de fabrication de circuits integres a semi-conducteur a forte densite et circuits integres ainsi obtenus - Google Patents
Procede de fabrication de circuits integres a semi-conducteur a forte densite et circuits integres ainsi obtenusInfo
- Publication number
- FR2337426A1 FR2337426A1 FR7635301A FR7635301A FR2337426A1 FR 2337426 A1 FR2337426 A1 FR 2337426A1 FR 7635301 A FR7635301 A FR 7635301A FR 7635301 A FR7635301 A FR 7635301A FR 2337426 A1 FR2337426 A1 FR 2337426A1
- Authority
- FR
- France
- Prior art keywords
- integrated circuits
- high density
- manufacturing high
- density semiconductor
- semiconductor integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/118—Masterslice integrated circuits
- H01L27/11801—Masterslice integrated circuits using bipolar technology
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/084—Diode-transistor logic
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/088—Transistor-transistor logic
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/091—Integrated injection logic or merged transistor logic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Geometry (AREA)
- Bipolar Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/644,775 US4032962A (en) | 1975-12-29 | 1975-12-29 | High density semiconductor integrated circuit layout |
Publications (1)
Publication Number | Publication Date |
---|---|
FR2337426A1 true FR2337426A1 (fr) | 1977-07-29 |
Family
ID=24586282
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7635301A Withdrawn FR2337426A1 (fr) | 1975-12-29 | 1976-11-19 | Procede de fabrication de circuits integres a semi-conducteur a forte densite et circuits integres ainsi obtenus |
Country Status (6)
Country | Link |
---|---|
US (2) | US4032962A (fr) |
JP (1) | JPS6011470B2 (fr) |
CA (1) | CA1064624A (fr) |
DE (1) | DE2655575A1 (fr) |
FR (1) | FR2337426A1 (fr) |
GB (1) | GB1557790A (fr) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52137279A (en) * | 1976-05-12 | 1977-11-16 | Hitachi Ltd | Semiconductor device for optical coupling |
JPS52156580A (en) * | 1976-06-23 | 1977-12-27 | Hitachi Ltd | Semiconductor integrated circuit device and its production |
DE2639799C2 (de) * | 1976-09-03 | 1984-04-12 | Siemens AG, 1000 Berlin und 8000 München | Halbleiterverbundanordnung |
US4087900A (en) * | 1976-10-18 | 1978-05-09 | Bell Telephone Laboratories, Incorporated | Fabrication of semiconductor integrated circuit structure including injection logic configuration compatible with complementary bipolar transistors utilizing simultaneous formation of device regions |
JPS5846863B2 (ja) * | 1977-08-25 | 1983-10-19 | 松下電器産業株式会社 | 半導体集積回路装置 |
US4159915A (en) * | 1977-10-25 | 1979-07-03 | International Business Machines Corporation | Method for fabrication vertical NPN and PNP structures utilizing ion-implantation |
NL7712649A (nl) * | 1977-11-17 | 1979-05-21 | Philips Nv | Geientegreerde schakeling. |
US4249193A (en) * | 1978-05-25 | 1981-02-03 | International Business Machines Corporation | LSI Semiconductor device and fabrication thereof |
JPS5546548A (en) * | 1978-09-28 | 1980-04-01 | Semiconductor Res Found | Electrostatic induction integrated circuit |
JPS55103756A (en) * | 1979-01-31 | 1980-08-08 | Semiconductor Res Found | Electrostatic induction transistor integrated circuit |
US4412376A (en) * | 1979-03-30 | 1983-11-01 | Ibm Corporation | Fabrication method for vertical PNP structure with Schottky barrier diode emitter utilizing ion implantation |
US4281448A (en) * | 1980-04-14 | 1981-08-04 | Gte Laboratories Incorporated | Method of fabricating a diode bridge rectifier in monolithic integrated circuit structure utilizing isolation diffusions and metal semiconductor rectifying barrier diode formation |
US4402044A (en) * | 1980-11-24 | 1983-08-30 | Texas Instruments Incorporated | Microprocessor with strip layout of busses, ALU and registers |
JPS58157151A (ja) * | 1982-03-15 | 1983-09-19 | Mitsubishi Electric Corp | 半導体集積回路装置 |
US4501976A (en) * | 1982-09-07 | 1985-02-26 | Signetics Corporation | Transistor-transistor logic circuit with hysteresis |
JPH0758761B2 (ja) * | 1983-12-30 | 1995-06-21 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 半導体集積回路チップ |
US4808552A (en) * | 1985-09-11 | 1989-02-28 | Texas Instruments Incorporated | Process for making vertically-oriented interconnections for VLSI devices |
US5155570A (en) * | 1988-06-21 | 1992-10-13 | Sanyo Electric Co., Ltd. | Semiconductor integrated circuit having a pattern layout applicable to various custom ICs |
JPH0334570A (ja) * | 1989-06-30 | 1991-02-14 | Nec Corp | マスタースライス方式集積回路装置 |
US6201267B1 (en) | 1999-03-01 | 2001-03-13 | Rensselaer Polytechnic Institute | Compact low power complement FETs |
US6462977B2 (en) | 2000-08-17 | 2002-10-08 | David Earl Butz | Data storage device having virtual columns and addressing layers |
US7283381B2 (en) | 2000-08-17 | 2007-10-16 | David Earl Butz | System and methods for addressing a matrix incorporating virtual columns and addressing layers |
JP4346322B2 (ja) * | 2003-02-07 | 2009-10-21 | 株式会社ルネサステクノロジ | 半導体装置 |
KR101115657B1 (ko) * | 2009-07-01 | 2012-02-15 | 한국야금 주식회사 | 홈 가공용 인서트 |
US8739100B2 (en) * | 2011-06-29 | 2014-05-27 | The Regents Of The University Of California | Distributed LC resonant tanks clock tree synthesis |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3702025A (en) * | 1969-05-12 | 1972-11-07 | Honeywell Inc | Discretionary interconnection process |
US3833842A (en) * | 1970-03-09 | 1974-09-03 | Texas Instruments Inc | Modified tungsten metallization for semiconductor devices |
US3771217A (en) * | 1971-04-16 | 1973-11-13 | Texas Instruments Inc | Integrated circuit arrays utilizing discretionary wiring and method of fabricating same |
JPS492871A (fr) * | 1972-04-22 | 1974-01-11 | ||
US3896482A (en) * | 1972-06-30 | 1975-07-22 | Ibm | Dynamic mosfet layout technique |
US3911289A (en) * | 1972-08-18 | 1975-10-07 | Matsushita Electric Ind Co Ltd | MOS type semiconductor IC device |
CA997481A (en) * | 1972-12-29 | 1976-09-21 | International Business Machines Corporation | Dc testing of integrated circuits and a novel integrated circuit structure to facilitate such testing |
GB1440512A (en) * | 1973-04-30 | 1976-06-23 | Rca Corp | Universal array using complementary transistors |
US3902188A (en) * | 1973-08-15 | 1975-08-26 | Rca Corp | High frequency transistor |
-
1975
- 1975-12-29 US US05/644,775 patent/US4032962A/en not_active Expired - Lifetime
-
1976
- 1976-11-11 GB GB47055/76A patent/GB1557790A/en not_active Expired
- 1976-11-19 FR FR7635301A patent/FR2337426A1/fr not_active Withdrawn
- 1976-12-08 DE DE19762655575 patent/DE2655575A1/de not_active Withdrawn
- 1976-12-16 JP JP51150413A patent/JPS6011470B2/ja not_active Expired
- 1976-12-17 CA CA268,098A patent/CA1064624A/fr not_active Expired
- 1976-12-27 US US05/754,704 patent/US4080720A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPS5282191A (en) | 1977-07-09 |
US4080720A (en) | 1978-03-28 |
US4032962A (en) | 1977-06-28 |
CA1064624A (fr) | 1979-10-16 |
JPS6011470B2 (ja) | 1985-03-26 |
DE2655575A1 (de) | 1977-07-07 |
GB1557790A (en) | 1979-12-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |