JPS57160145A - Manufacture of semiconductor integrated circuit - Google Patents

Manufacture of semiconductor integrated circuit

Info

Publication number
JPS57160145A
JPS57160145A JP4514181A JP4514181A JPS57160145A JP S57160145 A JPS57160145 A JP S57160145A JP 4514181 A JP4514181 A JP 4514181A JP 4514181 A JP4514181 A JP 4514181A JP S57160145 A JPS57160145 A JP S57160145A
Authority
JP
Japan
Prior art keywords
diffusion
region
masks
patterns
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4514181A
Other languages
Japanese (ja)
Inventor
Eiji Sugiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4514181A priority Critical patent/JPS57160145A/en
Publication of JPS57160145A publication Critical patent/JPS57160145A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H01L27/11801—Masterslice integrated circuits using bipolar technology

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To permit a change to various basic elements by changing two masks only during each existing process by a method wherein the patterns of masks for diffusion are properly and selectively changed. CONSTITUTION:An NPN transistor forms a base region 3 by a mask B for diffusion in an insular region 2 and an emitter region 4 and a collector contact region 5 are formed by a mask E for diffusion. And then wiring patterns C1- C3 are formed to make a semiconductor integrated circuit. Based on the transistor structure composed of such basic elements, the insular region 2, wiring patterns, and contact windows W1-W6 are fixed so that the transistor may be changed to different kinds of elements with possible small change and only the patterns of the masks B and E for diffusion are suitably and selectively changed.
JP4514181A 1981-03-27 1981-03-27 Manufacture of semiconductor integrated circuit Pending JPS57160145A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4514181A JPS57160145A (en) 1981-03-27 1981-03-27 Manufacture of semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4514181A JPS57160145A (en) 1981-03-27 1981-03-27 Manufacture of semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS57160145A true JPS57160145A (en) 1982-10-02

Family

ID=12710996

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4514181A Pending JPS57160145A (en) 1981-03-27 1981-03-27 Manufacture of semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS57160145A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995027311A1 (en) * 1994-04-01 1995-10-12 United Technologies Corporation ARRAY ARCHITECTURE WITH ENHANCED ROUTING FOR LINEAR ASICs

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995027311A1 (en) * 1994-04-01 1995-10-12 United Technologies Corporation ARRAY ARCHITECTURE WITH ENHANCED ROUTING FOR LINEAR ASICs

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