JPS5766632A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS5766632A
JPS5766632A JP55141740A JP14174080A JPS5766632A JP S5766632 A JPS5766632 A JP S5766632A JP 55141740 A JP55141740 A JP 55141740A JP 14174080 A JP14174080 A JP 14174080A JP S5766632 A JPS5766632 A JP S5766632A
Authority
JP
Japan
Prior art keywords
marks
mask alignment
integrated circuit
semiconductor integrated
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55141740A
Other languages
Japanese (ja)
Inventor
Norishige Tanaka
Yasoji Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55141740A priority Critical patent/JPS5766632A/en
Publication of JPS5766632A publication Critical patent/JPS5766632A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To facilitate mask alignment and to shorten the processing time of mask alignment by using two reference marks in a semiconductor integrated circuit device forming a pellet by one wafer. CONSTITUTION:First of all, reference marks 17, 18 forming at least two aligned marks are arranged on the element pattern 15 of a mask 13. And two reference marks 19, 20 are formed on a wafer 12 etching at the initial mask alignment. Furthermore, the marks 19, 20 at the wafer 12 side are coincided with the marks 17, 18 at the mask 13 side on and after the next mask alignment and mask alignment is performed under this state.
JP55141740A 1980-10-09 1980-10-09 Semiconductor integrated circuit device Pending JPS5766632A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55141740A JPS5766632A (en) 1980-10-09 1980-10-09 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55141740A JPS5766632A (en) 1980-10-09 1980-10-09 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS5766632A true JPS5766632A (en) 1982-04-22

Family

ID=15299094

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55141740A Pending JPS5766632A (en) 1980-10-09 1980-10-09 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5766632A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101250786B1 (en) 2006-06-30 2013-04-04 엘지디스플레이 주식회사 Method of scan operating in semiconductor equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101250786B1 (en) 2006-06-30 2013-04-04 엘지디스플레이 주식회사 Method of scan operating in semiconductor equipment

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