JPS5571060A - Manufacture of i2l semiconductor device - Google Patents
Manufacture of i2l semiconductor deviceInfo
- Publication number
- JPS5571060A JPS5571060A JP14416478A JP14416478A JPS5571060A JP S5571060 A JPS5571060 A JP S5571060A JP 14416478 A JP14416478 A JP 14416478A JP 14416478 A JP14416478 A JP 14416478A JP S5571060 A JPS5571060 A JP S5571060A
- Authority
- JP
- Japan
- Prior art keywords
- domain
- block
- circuit
- optimal
- constitute
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
- H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
- H01L27/0233—Integrated injection logic structures [I2L]
Abstract
PURPOSE:To facilitate a layout change by forming a block with a domain having such pattern as is optimal to constitute an FF circuit and with a domain having such patern as is optimal to constitute a logical gate around said domain. CONSTITUTION:A single unit of gate circuit is provided in plural to each upper and lower domain of an FF circuit, and one block is obtained through providing a wiring channel 14 with which to wire the gate circuit on both upper and lower parts and a ground wiring part 15 beneath the lower wiring channel 14. An I<2>L semiconductor domain is formed by arranging the block in plural vertically and horizontally.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14416478A JPS5571060A (en) | 1978-11-24 | 1978-11-24 | Manufacture of i2l semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14416478A JPS5571060A (en) | 1978-11-24 | 1978-11-24 | Manufacture of i2l semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5571060A true JPS5571060A (en) | 1980-05-28 |
Family
ID=15355681
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14416478A Pending JPS5571060A (en) | 1978-11-24 | 1978-11-24 | Manufacture of i2l semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5571060A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5882533A (en) * | 1981-07-10 | 1983-05-18 | Hitachi Ltd | Semiconductor integrated circuit device |
JPS6054334U (en) * | 1983-09-22 | 1985-04-16 | 日本電気株式会社 | integrated circuit device |
JPS6144444A (en) * | 1984-08-09 | 1986-03-04 | Nec Corp | Semiconductor ic |
-
1978
- 1978-11-24 JP JP14416478A patent/JPS5571060A/en active Pending
Non-Patent Citations (1)
Title |
---|
IEEE JOURNAL OF SOLID-STATE CIRCUTTS=1977US * |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5882533A (en) * | 1981-07-10 | 1983-05-18 | Hitachi Ltd | Semiconductor integrated circuit device |
JPS6054334U (en) * | 1983-09-22 | 1985-04-16 | 日本電気株式会社 | integrated circuit device |
JPS6144444A (en) * | 1984-08-09 | 1986-03-04 | Nec Corp | Semiconductor ic |
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