JPS57111044A - Master-slice type lsi device - Google Patents

Master-slice type lsi device

Info

Publication number
JPS57111044A
JPS57111044A JP18824180A JP18824180A JPS57111044A JP S57111044 A JPS57111044 A JP S57111044A JP 18824180 A JP18824180 A JP 18824180A JP 18824180 A JP18824180 A JP 18824180A JP S57111044 A JPS57111044 A JP S57111044A
Authority
JP
Japan
Prior art keywords
circuit
wiring layer
stationary
layer
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18824180A
Other languages
Japanese (ja)
Inventor
Atsushi Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18824180A priority Critical patent/JPS57111044A/en
Publication of JPS57111044A publication Critical patent/JPS57111044A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118Masterslice integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To form an arbitrary logic circuit by forming a basic circuit constructing each block of a stationary layer of only a single gate circuit and leading the output/input terminals to a wiring layer. CONSTITUTION:A stationary layer on a chip is formed of a block B of a single gate circuit G and an additional circuit 3. The input/output terminals 5, 6 of the circuit G in each block B are lead to a wiring layer via a through hole at the position corresponding to the grid of the wiring layer, and is connected via a wiring pattern 7. A stationary wiring pattern 9 is arranged in the free channel without circuit G, a through hole 8 is formed at the position corresponding to the grid of the wiring layer, and is connected to the wiring pattern of the wiring layer perpendicularly crossing the stationary wire and the terminal lead pattern, thereby obtaining an arbitrary logic circuit.
JP18824180A 1980-12-27 1980-12-27 Master-slice type lsi device Pending JPS57111044A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18824180A JPS57111044A (en) 1980-12-27 1980-12-27 Master-slice type lsi device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18824180A JPS57111044A (en) 1980-12-27 1980-12-27 Master-slice type lsi device

Publications (1)

Publication Number Publication Date
JPS57111044A true JPS57111044A (en) 1982-07-10

Family

ID=16220254

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18824180A Pending JPS57111044A (en) 1980-12-27 1980-12-27 Master-slice type lsi device

Country Status (1)

Country Link
JP (1) JPS57111044A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4689654A (en) * 1985-04-19 1987-08-25 Nixdorf Computer Ag Logic array chip
JPH0230164A (en) * 1988-07-20 1990-01-31 Fujitsu Ltd Master slice type semiconductor integrated circuit device and its manufacture
US5172014A (en) * 1986-09-19 1992-12-15 Actel Corporation Programmable interconnect architecture
US5477165A (en) * 1986-09-19 1995-12-19 Actel Corporation Programmable logic module and architecture for field programmable gate array device
US5570041A (en) * 1986-09-19 1996-10-29 Actel Corporation Programmable logic module and architecture for field programmable gate array device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5493344A (en) * 1977-12-30 1979-07-24 Fujitsu Ltd Semiconductor integrated circuit
JPS5538015A (en) * 1978-09-08 1980-03-17 Fujitsu Ltd Semiconductor integrated circuit
JPS55163859A (en) * 1979-06-07 1980-12-20 Fujitsu Ltd Manufacture of semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5493344A (en) * 1977-12-30 1979-07-24 Fujitsu Ltd Semiconductor integrated circuit
JPS5538015A (en) * 1978-09-08 1980-03-17 Fujitsu Ltd Semiconductor integrated circuit
JPS55163859A (en) * 1979-06-07 1980-12-20 Fujitsu Ltd Manufacture of semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4689654A (en) * 1985-04-19 1987-08-25 Nixdorf Computer Ag Logic array chip
US5172014A (en) * 1986-09-19 1992-12-15 Actel Corporation Programmable interconnect architecture
US5477165A (en) * 1986-09-19 1995-12-19 Actel Corporation Programmable logic module and architecture for field programmable gate array device
US5570041A (en) * 1986-09-19 1996-10-29 Actel Corporation Programmable logic module and architecture for field programmable gate array device
US5606267A (en) * 1986-09-19 1997-02-25 Actel Corporation Programmable logic module and architecture for field programmable gate array device
JPH0230164A (en) * 1988-07-20 1990-01-31 Fujitsu Ltd Master slice type semiconductor integrated circuit device and its manufacture

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