SU912065A3 - Способ изготовлени интегральных полупроводниковых схем - Google Patents
Способ изготовлени интегральных полупроводниковых схем Download PDFInfo
- Publication number
- SU912065A3 SU912065A3 SU772542550A SU2542550A SU912065A3 SU 912065 A3 SU912065 A3 SU 912065A3 SU 772542550 A SU772542550 A SU 772542550A SU 2542550 A SU2542550 A SU 2542550A SU 912065 A3 SU912065 A3 SU 912065A3
- Authority
- SU
- USSR - Soviet Union
- Prior art keywords
- disclosed
- integrated circuits
- semiconductor integrated
- making semiconductor
- logic
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract description 4
- 239000004065 semiconductor Substances 0.000 title abstract description 3
- 238000002347 injection Methods 0.000 abstract description 3
- 239000007924 injection Substances 0.000 abstract description 3
- 238000004519 manufacturing process Methods 0.000 abstract 2
- 238000005530 etching Methods 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
- H01L27/0821—Combination of lateral and vertical transistors only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
- H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
- H01L27/0233—Integrated injection logic structures [I2L]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/038—Diffusions-staged
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/106—Masks, special
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/167—Two diffusions in one hole
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Bipolar Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
Description
ионного легировани , создава области PI, Р2 и РЗ. Последующим окислением выращивают OKHccjr 6 в окнах толщиной пор дка 0,1 мкм вновь нанос т изолирующее нокрытие 7 (фиг.4 п котором вскрьтают фотолитографией окно 8,-некритичное по своим размерам (так называема чернова маска). Через эту маску улщл ют тонкий окисел над областью РЗ путем жидкостного травлени . Затем маску 7 удал ют, провод т легирование примесью
/г-гипа, например диффузией фосфора и повторным травлением удал ют тонкий окисел над област ми Р1 и Р2 (фиг. 5).
Предлагаемый способ позвол ет упростить известный за счет одновреметюго создани областей первого тина проводимости и С1шжени требований к совмещению, имеющем место при многократных фотолитографических операци х. В свою очередь, едина маска позвол ет максимально приблизить элементы интегралькых схем, позвол существенно повысить плотность компановки, а следовательно, и степень интеграции.
Некрити1ша по размерам маска дл вскрыти эмиттерных или коллекторных областей позвол ет осуществл ть фотолитографию без точного совмещени , что даже упрощаёт способ, а следовательно, снижает затраты на из готов ле1ше интегральных полупроводниковых схем с инжекционным питанием.
Claims (2)
1.Патент ФРГ № 1789055, кл. 21 q 11/02, опублик. 1978.
2.За вка ФРГ N 2419817, кл. 21 q 11/02, опублик. 1974 (прототип).
Фг/f. /
Фиг. г
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2652103A DE2652103C2 (de) | 1976-11-16 | 1976-11-16 | Integrierte Halbleiteranordnung für ein logisches Schaltungskonzept und Verfahren zu ihrer Herstellung |
Publications (1)
Publication Number | Publication Date |
---|---|
SU912065A3 true SU912065A3 (ru) | 1982-03-07 |
Family
ID=5993241
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SU772542550A SU912065A3 (ru) | 1976-11-16 | 1977-11-15 | Способ изготовлени интегральных полупроводниковых схем |
Country Status (15)
Country | Link |
---|---|
US (1) | US4158783A (ru) |
JP (1) | JPS5363874A (ru) |
AT (1) | AT382261B (ru) |
BE (1) | BE859759A (ru) |
BR (1) | BR7707519A (ru) |
CA (1) | CA1092722A (ru) |
DD (1) | DD137771A5 (ru) |
DE (1) | DE2652103C2 (ru) |
ES (1) | ES464138A1 (ru) |
FR (1) | FR2371063A1 (ru) |
GB (1) | GB1592334A (ru) |
IT (1) | IT1115741B (ru) |
NL (1) | NL7711778A (ru) |
SE (1) | SE7712741L (ru) |
SU (1) | SU912065A3 (ru) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4199776A (en) * | 1978-08-24 | 1980-04-22 | Rca Corporation | Integrated injection logic with floating reinjectors |
JPS55170895U (ru) * | 1979-05-26 | 1980-12-08 | ||
US4338622A (en) * | 1979-06-29 | 1982-07-06 | International Business Machines Corporation | Self-aligned semiconductor circuits and process therefor |
US4794277A (en) * | 1986-01-13 | 1988-12-27 | Unitrode Corporation | Integrated circuit under-voltage lockout |
US5177029A (en) * | 1989-03-28 | 1993-01-05 | Matsushita Electric Works, Ltd. | Method for manufacturing static induction type semiconductor device enhancement mode power |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL7107040A (ru) * | 1971-05-22 | 1972-11-24 | ||
NL7200294A (ru) * | 1972-01-08 | 1973-07-10 | ||
US3919005A (en) * | 1973-05-07 | 1975-11-11 | Fairchild Camera Instr Co | Method for fabricating double-diffused, lateral transistor |
US3959809A (en) * | 1974-05-10 | 1976-05-25 | Signetics Corporation | High inverse gain transistor |
DE2446649A1 (de) * | 1974-09-30 | 1976-04-15 | Siemens Ag | Bipolare logikschaltung |
US3993513A (en) * | 1974-10-29 | 1976-11-23 | Fairchild Camera And Instrument Corporation | Combined method for fabricating oxide-isolated vertical bipolar transistors and complementary oxide-isolated lateral bipolar transistors and the resulting structures |
US4058419A (en) * | 1974-12-27 | 1977-11-15 | Tokyo Shibaura Electric, Co., Ltd. | Method of manufacturing integrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques |
DE2509530C2 (de) * | 1975-03-05 | 1985-05-23 | Ibm Deutschland Gmbh, 7000 Stuttgart | Halbleiteranordnung für die Grundbausteine eines hochintegrierbaren logischen Halbleiterschaltungskonzepts basierend auf Mehrfachkollektor-Umkehrtransistoren |
-
1976
- 1976-11-16 DE DE2652103A patent/DE2652103C2/de not_active Expired
-
1977
- 1977-07-01 AT AT0470677A patent/AT382261B/de not_active IP Right Cessation
- 1977-08-10 US US05/823,314 patent/US4158783A/en not_active Expired - Lifetime
- 1977-09-29 CA CA287,816A patent/CA1092722A/en not_active Expired
- 1977-09-29 FR FR7729891A patent/FR2371063A1/fr active Granted
- 1977-10-14 BE BE181772A patent/BE859759A/xx not_active IP Right Cessation
- 1977-10-19 JP JP12464977A patent/JPS5363874A/ja active Granted
- 1977-10-25 IT IT28930/77A patent/IT1115741B/it active
- 1977-10-27 NL NL7711778A patent/NL7711778A/xx not_active Application Discontinuation
- 1977-11-02 GB GB45634/77A patent/GB1592334A/en not_active Expired
- 1977-11-09 BR BR7707519A patent/BR7707519A/pt unknown
- 1977-11-10 SE SE7712741A patent/SE7712741L/xx not_active Application Discontinuation
- 1977-11-14 DD DD77206078A patent/DD137771A5/xx unknown
- 1977-11-15 SU SU772542550A patent/SU912065A3/ru active
- 1977-11-15 ES ES464138A patent/ES464138A1/es not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE2652103A1 (de) | 1978-05-24 |
BR7707519A (pt) | 1978-08-01 |
DD137771A5 (de) | 1979-09-19 |
BE859759A (fr) | 1978-02-01 |
IT1115741B (it) | 1986-02-03 |
ES464138A1 (es) | 1978-12-16 |
FR2371063A1 (fr) | 1978-06-09 |
FR2371063B1 (ru) | 1980-08-01 |
US4158783A (en) | 1979-06-19 |
CA1092722A (en) | 1980-12-30 |
AT382261B (de) | 1987-02-10 |
NL7711778A (nl) | 1978-05-18 |
JPS5615589B2 (ru) | 1981-04-10 |
ATA470677A (de) | 1986-06-15 |
JPS5363874A (en) | 1978-06-07 |
DE2652103C2 (de) | 1982-10-28 |
SE7712741L (sv) | 1978-05-17 |
GB1592334A (en) | 1981-07-08 |
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