SE0301133L - Keramiskt flerskiktssubstrat och förfarande för tillverkning av detsamma - Google Patents

Keramiskt flerskiktssubstrat och förfarande för tillverkning av detsamma

Info

Publication number
SE0301133L
SE0301133L SE0301133A SE0301133A SE0301133L SE 0301133 L SE0301133 L SE 0301133L SE 0301133 A SE0301133 A SE 0301133A SE 0301133 A SE0301133 A SE 0301133A SE 0301133 L SE0301133 L SE 0301133L
Authority
SE
Sweden
Prior art keywords
manufacture
multilayer substrate
ceramic multilayer
ceramic
substrate
Prior art date
Application number
SE0301133A
Other languages
English (en)
Other versions
SE0301133D0 (sv
SE525830C2 (sv
Inventor
Seok Jun Taek
Duk Woo Lee
Myoung Lib Moon
Original Assignee
Samsung Electro Mech
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electro Mech filed Critical Samsung Electro Mech
Publication of SE0301133D0 publication Critical patent/SE0301133D0/sv
Publication of SE0301133L publication Critical patent/SE0301133L/sv
Publication of SE525830C2 publication Critical patent/SE525830C2/sv

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09145—Edge details
    • H05K2201/09181—Notches in edge pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09145—Edge details
    • H05K2201/0919—Exposing inner circuit layers or metal planes at the side edge of the printed circuit board [PCB] or at the walls of large holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09454—Inner lands, i.e. lands around via or plated through-hole in internal layer of multilayer PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
SE0301133A 2002-11-25 2003-04-16 Keramiskt flerskiktssubstrat och förfarande för tillverkning av detsamma SE525830C2 (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR10-2002-0073623A KR100495211B1 (ko) 2002-11-25 2002-11-25 세라믹 다층기판 및 그 제조방법

Publications (3)

Publication Number Publication Date
SE0301133D0 SE0301133D0 (sv) 2003-04-16
SE0301133L true SE0301133L (sv) 2004-05-26
SE525830C2 SE525830C2 (sv) 2005-05-10

Family

ID=19720693

Family Applications (1)

Application Number Title Priority Date Filing Date
SE0301133A SE525830C2 (sv) 2002-11-25 2003-04-16 Keramiskt flerskiktssubstrat och förfarande för tillverkning av detsamma

Country Status (9)

Country Link
US (2) US6987315B2 (sv)
JP (1) JP2004179602A (sv)
KR (1) KR100495211B1 (sv)
CN (1) CN1503616A (sv)
DE (1) DE10318297A1 (sv)
FI (1) FI20030579A (sv)
FR (1) FR2847716B1 (sv)
GB (1) GB2395605B (sv)
SE (1) SE525830C2 (sv)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6806559B2 (en) * 2002-04-22 2004-10-19 Irvine Sensors Corporation Method and apparatus for connecting vertically stacked integrated circuit chips
US7777321B2 (en) * 2002-04-22 2010-08-17 Gann Keith D Stacked microelectronic layer and module with three-axis channel T-connects
KR100495211B1 (ko) * 2002-11-25 2005-06-14 삼성전기주식회사 세라믹 다층기판 및 그 제조방법
KR101134897B1 (ko) * 2005-02-14 2012-04-13 엘지전자 주식회사 측면패드가 제공되는 회로기판 및 그 회로기판의 제조방법
JP5279488B2 (ja) 2005-05-30 2013-09-04 オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング ケーシング本体およびケーシング本体の製造方法
US7919717B2 (en) 2005-08-19 2011-04-05 Honeywell International Inc. Three-dimensional printed circuit board
KR100992233B1 (ko) * 2008-09-26 2010-11-05 삼성전기주식회사 세라믹/폴리머 복합재를 이용한 칩 캐패시터 제조방법
TWI512918B (zh) * 2010-01-14 2015-12-11 Xintec Inc 晶片封裝體及其形成方法
CN102300384A (zh) * 2010-06-23 2011-12-28 环旭电子股份有限公司 多层式印刷电路板
USD680119S1 (en) * 2011-11-15 2013-04-16 Connectblue Ab Module
USD692896S1 (en) * 2011-11-15 2013-11-05 Connectblue Ab Module
USD689053S1 (en) * 2011-11-15 2013-09-03 Connectblue Ab Module
USD680545S1 (en) * 2011-11-15 2013-04-23 Connectblue Ab Module
CN103426844B (zh) * 2012-05-22 2017-02-15 广州程星通信科技有限公司 宽带全密封微波器件封装
KR20150004118A (ko) * 2013-07-02 2015-01-12 삼성디스플레이 주식회사 표시 장치용 기판, 상기 표시 장치용 기판의 제조 방법, 및 상기 표시 장치용 기판을 포함하는 표시 장치
WO2017013938A1 (ja) * 2015-07-22 2017-01-26 アルプス電気株式会社 高周波モジュール
CN109496066B (zh) * 2018-10-31 2021-08-13 上海安费诺永亿通讯电子有限公司 一种设计于片式陶瓷基体特定区域的金属线路及其制备方法

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4963843A (en) 1988-10-31 1990-10-16 Motorola, Inc. Stripline filter with combline resonators
JPH02166792A (ja) * 1988-12-21 1990-06-27 Nippon Chemicon Corp 多層スルーホールおよびその形成方法
JP2600477B2 (ja) 1990-10-31 1997-04-16 株式会社村田製作所 積層セラミック電子部品
JPH05218653A (ja) 1992-01-31 1993-08-27 Sumitomo Metal Ind Ltd セラミック多層回路基板
JP2873645B2 (ja) 1992-05-25 1999-03-24 国際電気 株式会社 セラミック多層配線基板の製造方法
SG48955A1 (en) 1992-07-27 1998-05-18 Murata Manufacturing Co Multilayer electronic component method of manufacturing the same and method of measuring characteristics thereof
US5635669A (en) * 1992-07-27 1997-06-03 Murata Manufacturing Co., Ltd. Multilayer electronic component
US5625528A (en) * 1992-10-21 1997-04-29 Devoe; Daniel F. Monolithic, buried-substrate, ceramic multiple capacitors isolated, one to the next, by dual-dielectric-constant, three-layer-laminate isolation layers
JP3070364B2 (ja) 1992-11-25 2000-07-31 松下電器産業株式会社 セラミック電子部品の製造方法
US5455385A (en) * 1993-06-28 1995-10-03 Harris Corporation Multilayer LTCC tub architecture for hermetically sealing semiconductor die, external electrical access for which is provided by way of sidewall recesses
US5736681A (en) 1993-09-03 1998-04-07 Kabushiki Kaisha Toshiba Printed wiring board having an interconnection penetrating an insulating layer
JP3223708B2 (ja) 1994-07-21 2001-10-29 株式会社村田製作所 積層電子部品およびその製造方法
JPH1041626A (ja) * 1996-07-26 1998-02-13 Sumitomo Kinzoku Electro Device:Kk フリップチップ用セラミック多層基板及びその製造方法
JP3236782B2 (ja) * 1996-08-28 2001-12-10 京セラ株式会社 セラミック基板及びその製造方法並びに分割回路基板
US5855995A (en) 1997-02-21 1999-01-05 Medtronic, Inc. Ceramic substrate for implantable medical devices
JPH10247766A (ja) * 1997-03-03 1998-09-14 Alps Electric Co Ltd 回路基板
JPH10275979A (ja) * 1997-03-28 1998-10-13 Kyocera Corp セラミック基板および分割回路基板
JP3521699B2 (ja) 1997-08-19 2004-04-19 株式会社村田製作所 積層セラミック複合部品の製造方法
JP3402226B2 (ja) 1998-11-19 2003-05-06 株式会社村田製作所 チップサーミスタの製造方法
JP3362727B2 (ja) * 2000-03-17 2003-01-07 沖電気工業株式会社 弾性表面波フィルタ装置
JP3531573B2 (ja) * 2000-03-17 2004-05-31 株式会社村田製作所 積層型セラミック電子部品およびその製造方法ならびに電子装置
JP2002084064A (ja) * 2000-09-08 2002-03-22 Ibiden Co Ltd プリント基板の製造方法
JP2002141248A (ja) * 2000-11-02 2002-05-17 Murata Mfg Co Ltd セラミック電子部品およびその製造方法
US6462950B1 (en) 2000-11-29 2002-10-08 Nokia Mobile Phones Ltd. Stacked power amplifier module
JP2002270465A (ja) * 2001-03-08 2002-09-20 Soshin Electric Co Ltd 積層電子部品の端子電極
US6528875B1 (en) * 2001-04-20 2003-03-04 Amkor Technology, Inc. Vacuum sealed package for semiconductor chip
US6759940B2 (en) 2002-01-10 2004-07-06 Lamina Ceramics, Inc. Temperature compensating device with integral sheet thermistors
KR100489820B1 (ko) * 2002-11-19 2005-05-16 삼성전기주식회사 세라믹 다층기판 및 그 제조방법
KR100495211B1 (ko) * 2002-11-25 2005-06-14 삼성전기주식회사 세라믹 다층기판 및 그 제조방법

Also Published As

Publication number Publication date
GB2395605B (en) 2005-11-16
KR20040045768A (ko) 2004-06-02
DE10318297A1 (de) 2004-06-17
JP2004179602A (ja) 2004-06-24
US6987315B2 (en) 2006-01-17
CN1503616A (zh) 2004-06-09
FI20030579A0 (sv) 2003-04-16
FR2847716B1 (fr) 2006-02-17
FI20030579A (sv) 2004-05-26
KR100495211B1 (ko) 2005-06-14
US20040099942A1 (en) 2004-05-27
GB2395605A (en) 2004-05-26
SE0301133D0 (sv) 2003-04-16
US20050168917A1 (en) 2005-08-04
SE525830C2 (sv) 2005-05-10
FR2847716A1 (fr) 2004-05-28

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