NO20053151L - Fremgangsmate for a produsere mikrosystemer. - Google Patents
Fremgangsmate for a produsere mikrosystemer.Info
- Publication number
- NO20053151L NO20053151L NO20053151A NO20053151A NO20053151L NO 20053151 L NO20053151 L NO 20053151L NO 20053151 A NO20053151 A NO 20053151A NO 20053151 A NO20053151 A NO 20053151A NO 20053151 L NO20053151 L NO 20053151L
- Authority
- NO
- Norway
- Prior art keywords
- electronic building
- conductive material
- building elements
- ascending
- direct connection
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 2
- 239000004020 conductor Substances 0.000 abstract 4
- 230000001174 ascending effect Effects 0.000 abstract 2
- 238000003780 insertion Methods 0.000 abstract 1
- 230000037431 insertion Effects 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
- 238000004377 microelectronic Methods 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4867—Applying pastes or inks, e.g. screen printing
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
- H01L2224/16148—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked the bump connector connecting to a bonding area protruding from the surface
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/76—Apparatus for connecting with build-up interconnects
- H01L2224/7665—Means for transporting the components to be connected
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0101—Neon [Ne]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01024—Chromium [Cr]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49158—Manufacturing circuit on or in base with molding of insulated base
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Laminated Bodies (AREA)
- Printing Methods (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Heating, Cooling, Or Curing Plastics Or The Like In General (AREA)
- Wire Bonding (AREA)
- Application Of Or Painting With Fluid Materials (AREA)
- Casting Or Compression Moulding Of Plastics Or The Like (AREA)
Abstract
Oppfinnelsen gjelder en fremgangsmåte for fremstilling av mikrosystemer med flere plan ved siden av og/eller under hverandre som sjikt av et grunnlegeme oppbygget av lysherdbart materiale, hvor det i utsparrede hulrom i denne oppbygging er lagt inn mikroelektroniske byggeelementer, som er elektrisk eller termisk ledende forbundet med hverandre, og som videre er kjennetegnet ved at etter innsetting av vedkommende elektroniske byggeelement fortsettes den sjiktvise oppbygging av grunnlegemet, hvorved kontaktområder på det elektroniske byggeelement henholdsvis er påført et oppstigende struktur av et elektrisk/termisk ledende materiale, hvor da dette ledende materialet danner en direkte forbindelse med et ytterligere elektronisk byggeelement som er anordnet i direkte forbindelse med vedkommende elektroniske element, eller ved hjelp av en horisontalt forløpende lederbane i et oppstigende ledende materialet fra kontaktflaten til ett eller flere elektroniske byggeelementer som ligger sideveis i avstand fra de anordnede ytterligere elektroniske byggeelementer.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10301612 | 2003-01-17 | ||
PCT/DE2003/000419 WO2004070835A1 (de) | 2003-01-17 | 2003-02-13 | Verfahren zur herstellung von mikrosystemen |
Publications (2)
Publication Number | Publication Date |
---|---|
NO20053151D0 NO20053151D0 (no) | 2005-06-28 |
NO20053151L true NO20053151L (no) | 2005-10-14 |
Family
ID=32841572
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NO20053151A NO20053151L (no) | 2003-01-17 | 2005-06-28 | Fremgangsmate for a produsere mikrosystemer. |
Country Status (13)
Country | Link |
---|---|
US (1) | US8042267B2 (no) |
EP (1) | EP1586117B1 (no) |
JP (1) | JP4567466B2 (no) |
KR (1) | KR100756104B1 (no) |
CN (1) | CN100435331C (no) |
AU (1) | AU2003214001B2 (no) |
CA (1) | CA2513127C (no) |
DE (1) | DE10394193D2 (no) |
IS (1) | IS7981A (no) |
NO (1) | NO20053151L (no) |
RU (1) | RU2323504C2 (no) |
TW (1) | TWI221827B (no) |
WO (1) | WO2004070835A1 (no) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102006008332B4 (de) * | 2005-07-11 | 2009-06-04 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Verfahren zur Herstellung einer funktionellen Baueinheit und funktionelle Baueinheit |
WO2008153674A1 (en) | 2007-06-09 | 2008-12-18 | Boris Kobrin | Method and apparatus for anisotropic etching |
TWI518027B (zh) * | 2008-01-22 | 2016-01-21 | 羅利斯公司 | 大面積奈米圖案化之方法與設備 |
US8518633B2 (en) | 2008-01-22 | 2013-08-27 | Rolith Inc. | Large area nanopatterning method and apparatus |
US8182982B2 (en) | 2008-04-19 | 2012-05-22 | Rolith Inc | Method and device for patterning a disk |
US8192920B2 (en) * | 2008-04-26 | 2012-06-05 | Rolith Inc. | Lithography method |
US20110210480A1 (en) * | 2008-11-18 | 2011-09-01 | Rolith, Inc | Nanostructures with anti-counterefeiting features and methods of fabricating the same |
WO2012027050A2 (en) | 2010-08-23 | 2012-03-01 | Rolith, Inc. | Mask for near-field lithography and fabrication the same |
US9398694B2 (en) | 2011-01-18 | 2016-07-19 | Sony Corporation | Method of manufacturing a package for embedding one or more electronic components |
US9763370B2 (en) * | 2013-03-15 | 2017-09-12 | National Technology & Engineering Solutions Of Sandia, Llc | Apparatus for assembly of microelectronic devices |
RU2602835C9 (ru) * | 2015-05-13 | 2017-02-02 | Акционерное общество "Концерн радиостроения "Вега" | Способ экранирования в электронном модуле |
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US3712735A (en) * | 1970-09-25 | 1973-01-23 | Amp Inc | Apparatus for photo etching |
US4069916A (en) * | 1976-06-01 | 1978-01-24 | Western Electric Co., Inc. | Tape for holding electronic articles |
US4383363A (en) * | 1977-09-01 | 1983-05-17 | Sharp Kabushiki Kaisha | Method of making a through-hole connector |
DE3925455A1 (de) * | 1989-08-01 | 1991-02-14 | Robert Hanus | Belichtungsvorrichtung zum belichten eines metallkaschierten basismaterials |
DE4223371A1 (de) | 1992-07-16 | 1994-01-20 | Thomson Brandt Gmbh | Verfahren und Platine zur Montage von Bauelementen |
JPH06140461A (ja) * | 1992-10-29 | 1994-05-20 | Fujitsu Ltd | 半導体チップの実装方法および実装構造体 |
DE4420996C2 (de) | 1994-06-16 | 1998-04-09 | Reiner Dipl Ing Goetzen | Verfahren und Vorrichtung zur Herstellung von mikromechanischen und mikrooptischen Bauelementen |
JP3726985B2 (ja) * | 1996-12-09 | 2005-12-14 | ソニー株式会社 | 電子部品の製造方法 |
US5869395A (en) * | 1997-01-22 | 1999-02-09 | Lsi Logic Corporation | Simplified hole interconnect process |
DE19721170A1 (de) | 1997-05-21 | 1998-11-26 | Emtec Magnetics Gmbh | Verfahren und Vorrichtung zum Herstellen eines Films oder einer Schicht mit beidseitiger Oberflächenstruktur |
US6833613B1 (en) * | 1997-12-18 | 2004-12-21 | Micron Technology, Inc. | Stacked semiconductor package having laser machined contacts |
US6160714A (en) * | 1997-12-31 | 2000-12-12 | Elpac (Usa), Inc. | Molded electronic package and method of preparation |
DE19826971C2 (de) * | 1998-06-18 | 2002-03-14 | Reiner Goetzen | Verfahren zum mechanischen und elektrischen Verbinden von Systembauteilen |
DE19847088A1 (de) * | 1998-10-13 | 2000-05-18 | Ksw Microtec Ges Fuer Angewand | Flächig ausgebildeter Träger für Halbleiter-Chips und Verfahren zu seiner Herstellung |
FI990862A (fi) * | 1999-04-16 | 2000-10-17 | Jorma Kalevi Kivilahti | Uusi elektroniikan juotteeton valmistusmenetelmä |
JP2001237512A (ja) * | 1999-12-14 | 2001-08-31 | Nitto Denko Corp | 両面回路基板およびこれを用いた多層配線基板ならびに両面回路基板の製造方法 |
JP3553043B2 (ja) * | 2001-01-19 | 2004-08-11 | 松下電器産業株式会社 | 部品内蔵モジュールとその製造方法 |
DE10144579C2 (de) | 2001-08-07 | 2003-12-04 | Reiner Goetzen | Verfahren und Vorrichtung zur Herstellung von Fein- bis Mikrostrukturen und/oder komplexen Mikrosystemen |
WO2010144579A2 (en) | 2009-06-10 | 2010-12-16 | Baker Hughes Incorporated | Source compensated formation density measurement method by using a pulsed neutron generator |
-
2003
- 2003-02-13 JP JP2004567691A patent/JP4567466B2/ja not_active Expired - Fee Related
- 2003-02-13 CN CNB038258293A patent/CN100435331C/zh not_active Expired - Fee Related
- 2003-02-13 WO PCT/DE2003/000419 patent/WO2004070835A1/de active IP Right Grant
- 2003-02-13 RU RU2005126055/28A patent/RU2323504C2/ru not_active IP Right Cessation
- 2003-02-13 KR KR1020057013225A patent/KR100756104B1/ko not_active IP Right Cessation
- 2003-02-13 DE DE10394193T patent/DE10394193D2/de not_active Expired - Fee Related
- 2003-02-13 EP EP03709608.8A patent/EP1586117B1/de not_active Expired - Lifetime
- 2003-02-13 CA CA2513127A patent/CA2513127C/en not_active Expired - Fee Related
- 2003-02-13 US US10/542,237 patent/US8042267B2/en not_active Expired - Fee Related
- 2003-02-13 AU AU2003214001A patent/AU2003214001B2/en not_active Ceased
- 2003-04-22 TW TW092109309A patent/TWI221827B/zh not_active IP Right Cessation
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2005
- 2005-06-28 NO NO20053151A patent/NO20053151L/no not_active Application Discontinuation
- 2005-08-15 IS IS7981A patent/IS7981A/is unknown
Also Published As
Publication number | Publication date |
---|---|
CA2513127C (en) | 2010-03-30 |
CN100435331C (zh) | 2008-11-19 |
AU2003214001A1 (en) | 2004-08-30 |
US20060072295A1 (en) | 2006-04-06 |
JP4567466B2 (ja) | 2010-10-20 |
US8042267B2 (en) | 2011-10-25 |
KR100756104B1 (ko) | 2007-09-05 |
CN1735965A (zh) | 2006-02-15 |
CA2513127A1 (en) | 2004-08-19 |
AU2003214001B2 (en) | 2007-08-02 |
TW200413245A (en) | 2004-08-01 |
DE10394193D2 (de) | 2005-12-01 |
EP1586117A1 (de) | 2005-10-19 |
TWI221827B (en) | 2004-10-11 |
EP1586117B1 (de) | 2014-06-18 |
RU2005126055A (ru) | 2006-01-10 |
WO2004070835A1 (de) | 2004-08-19 |
KR20050091785A (ko) | 2005-09-15 |
JP2006513581A (ja) | 2006-04-20 |
RU2323504C2 (ru) | 2008-04-27 |
IS7981A (is) | 2005-08-15 |
NO20053151D0 (no) | 2005-06-28 |
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