NL194854B - Klokgenererende schakeling voor klokgestuurde logische schakelingen. - Google Patents

Klokgenererende schakeling voor klokgestuurde logische schakelingen.

Info

Publication number
NL194854B
NL194854B NL9401042A NL9401042A NL194854B NL 194854 B NL194854 B NL 194854B NL 9401042 A NL9401042 A NL 9401042A NL 9401042 A NL9401042 A NL 9401042A NL 194854 B NL194854 B NL 194854B
Authority
NL
Netherlands
Prior art keywords
clock
generating circuit
logic circuits
driven logic
driven
Prior art date
Application number
NL9401042A
Other languages
English (en)
Other versions
NL9401042A (nl
NL194854C (nl
Inventor
Michael Albert
Original Assignee
Micronas Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micronas Gmbh filed Critical Micronas Gmbh
Publication of NL9401042A publication Critical patent/NL9401042A/nl
Publication of NL194854B publication Critical patent/NL194854B/nl
Application granted granted Critical
Publication of NL194854C publication Critical patent/NL194854C/nl

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Logic Circuits (AREA)
  • Dram (AREA)
NL9401042A 1993-06-26 1994-06-23 Klokgenererende schakeling voor klokgestuurde logische schakelingen. NL194854C (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE4321315 1993-06-26
DE4321315A DE4321315C1 (de) 1993-06-26 1993-06-26 Takterzeugungsschaltung für taktgesteuerte Logikschaltungen

Publications (3)

Publication Number Publication Date
NL9401042A NL9401042A (nl) 1995-01-16
NL194854B true NL194854B (nl) 2002-12-02
NL194854C NL194854C (nl) 2003-04-03

Family

ID=6491317

Family Applications (1)

Application Number Title Priority Date Filing Date
NL9401042A NL194854C (nl) 1993-06-26 1994-06-23 Klokgenererende schakeling voor klokgestuurde logische schakelingen.

Country Status (5)

Country Link
US (1) US5440250A (nl)
JP (1) JP3568987B2 (nl)
DE (1) DE4321315C1 (nl)
FR (1) FR2707059B1 (nl)
NL (1) NL194854C (nl)

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* Cited by examiner, † Cited by third party
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JP3441780B2 (ja) * 1994-02-21 2003-09-02 日本テキサス・インスツルメンツ株式会社 クロック信号生成回路
JPH08148982A (ja) * 1994-11-21 1996-06-07 Yamaha Corp 半導体集積回路
US5670899A (en) * 1994-11-21 1997-09-23 Yamaha Corporation Logic circuit controlled by a plurality of clock signals
US5550503A (en) * 1995-04-28 1996-08-27 Motorola, Inc. Circuits and method for reducing voltage error when charging and discharging a capacitor through a transmission gate
DE59607452D1 (de) * 1995-05-11 2001-09-13 Infineon Technologies Ag Vorrichtung zur takterzeugung für cmos-schaltungen mit dynamischen registern
US5568100A (en) * 1995-09-22 1996-10-22 Lucent Technologies Inc. Synchronous power down clock oscillator device
US5867453A (en) * 1998-02-06 1999-02-02 Taiwan Semiconductor Manufacturing Co., Ltd. Self-setup non-overlap clock generator
US6445644B2 (en) 1998-05-20 2002-09-03 Micron Technology, Inc. Apparatus and method for generating a clock within a semiconductor device and devices and systems including same
US6169704B1 (en) 1998-05-20 2001-01-02 Micron Technology, Inc. Apparatus and method for generating a clock within a semiconductor device and devices and systems including same
DE19825216A1 (de) * 1998-06-05 1999-12-09 Siemens Ag Inverterschaltung
US6912139B2 (en) * 2002-11-14 2005-06-28 Fyre Storm, Inc. Multi-channel control methods for switched power converters
WO2004082142A1 (ja) * 2003-03-13 2004-09-23 Fujitsu Limited 論理回路
US7205805B1 (en) 2004-11-02 2007-04-17 Western Digital Technologies, Inc. Adjusting power consumption of digital circuitry relative to critical path circuit having the largest propagation delay error
US7129763B1 (en) 2004-11-08 2006-10-31 Western Digital Technologies, Inc. Adjusting power consumption of digital circuitry by generating frequency error representing error in propagation delay
US7378876B2 (en) * 2006-03-14 2008-05-27 Integrated Device Technology, Inc. Complementary output inverter
US7486060B1 (en) 2006-03-30 2009-02-03 Western Digital Technologies, Inc. Switching voltage regulator comprising a cycle comparator for dynamic voltage scaling
US8067970B2 (en) * 2006-03-31 2011-11-29 Masleid Robert P Multi-write memory circuit with a data input and a clock input
US7551383B1 (en) 2006-06-28 2009-06-23 Western Digital Technologies, Inc. Adjusting voltage delivered to disk drive circuitry based on a selected zone
US7330019B1 (en) 2006-10-31 2008-02-12 Western Digital Technologies, Inc. Adjusting on-time for a discontinuous switching voltage regulator
US7733189B1 (en) 2007-09-14 2010-06-08 Western Digital Technologies, Inc. Oscillator comprising foldover detection
US8085020B1 (en) 2008-06-13 2011-12-27 Western Digital Technologies, Inc. Switching voltage regulator employing dynamic voltage scaling with hysteretic comparator
US8937404B1 (en) 2010-08-23 2015-01-20 Western Digital Technologies, Inc. Data storage device comprising dual mode independent/parallel voltage regulators

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5020421B1 (nl) * 1968-06-03 1975-07-15
WO1982000930A1 (en) * 1980-09-10 1982-03-18 Plachno R Delay stage for a clock generator
JPS5787620A (en) * 1980-11-20 1982-06-01 Fujitsu Ltd Clock generating circuit
JPS5881334A (ja) * 1981-11-11 1983-05-16 Hitachi Ltd 情報処理装置
WO1983004149A1 (en) * 1982-05-10 1983-11-24 Western Electric Company, Inc. Cmos integrated circuit
JPS59121697A (ja) * 1982-12-27 1984-07-13 Toshiba Corp シフトレジスタ
JPS60154709A (ja) * 1984-01-25 1985-08-14 Toshiba Corp クロツク信号発生回路
JPS61296821A (ja) * 1985-06-26 1986-12-27 Hitachi Micro Comput Eng Ltd 半導体集積回路装置
US4654599A (en) * 1985-07-05 1987-03-31 Sperry Corporation Four phase clock signal generator
JPH0691431B2 (ja) * 1987-03-02 1994-11-14 沖電気工業株式会社 フリツプフロツプ回路用クロツク制御回路
US4815041A (en) * 1987-03-19 1989-03-21 American Telephone And Telegraph Company Current surge elimination for CMOS devices
JPS641200A (en) * 1987-06-23 1989-01-05 Toshiba Corp Semiconductor integrated circuit
JPH07120225B2 (ja) * 1988-04-15 1995-12-20 富士通株式会社 半導体回路装置
DE58908782D1 (de) * 1989-09-22 1995-01-26 Itt Ind Gmbh Deutsche Zweiphasentaktgenerator.
IT1244205B (it) * 1990-12-19 1994-07-08 Sgs Thomson Microelectronics Circuito di generazione di un clock di scansione in un dispositivo di analisi operativa di tipo seriale per circuito integrato
US5140174A (en) * 1991-01-25 1992-08-18 Hewlett-Packard Co. Symmetric edge true/complement buffer/inverter and method therefor
US5280203A (en) * 1992-05-15 1994-01-18 Altera Corporation Look-ahead asynchronous register set/reset in programmable logic device
US5315181A (en) * 1993-07-07 1994-05-24 Maxtor Corporation Circuit for synchronous, glitch-free clock switching

Also Published As

Publication number Publication date
JPH07154211A (ja) 1995-06-16
NL9401042A (nl) 1995-01-16
FR2707059A1 (nl) 1994-12-30
JP3568987B2 (ja) 2004-09-22
NL194854C (nl) 2003-04-03
US5440250A (en) 1995-08-08
DE4321315C1 (de) 1995-01-05
FR2707059B1 (fr) 1997-02-28

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Legal Events

Date Code Title Description
BA A request for search or an international-type search has been filed
BB A search report has been drawn up
BC A request for examination has been filed
DNT Communications of changes of names of applicants whose applications have been laid open to public inspection

Free format text: MICRONAS INTERMETALL GMBH

DNT Communications of changes of names of applicants whose applications have been laid open to public inspection

Free format text: MICRONAS GMBH

V1 Lapsed because of non-payment of the annual fee

Effective date: 20090101