NL194182C - Randloze moederschijf-halfgeleiderinrichting. - Google Patents
Randloze moederschijf-halfgeleiderinrichting. Download PDFInfo
- Publication number
- NL194182C NL194182C NL8901301A NL8901301A NL194182C NL 194182 C NL194182 C NL 194182C NL 8901301 A NL8901301 A NL 8901301A NL 8901301 A NL8901301 A NL 8901301A NL 194182 C NL194182 C NL 194182C
- Authority
- NL
- Netherlands
- Prior art keywords
- conduction type
- type
- transistor groups
- master
- regions
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims description 36
- 238000009792 diffusion process Methods 0.000 claims description 14
- 238000004519 manufacturing process Methods 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 7
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims description 4
- 239000011159 matrix material Substances 0.000 claims description 3
- 230000002093 peripheral effect Effects 0.000 claims description 2
- 239000002184 metal Substances 0.000 claims 3
- 230000001681 protective effect Effects 0.000 claims 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 238000003491 array Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000010276 construction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/118—Masterslice integrated circuits
- H01L27/11803—Masterslice integrated circuits using field effect technology
- H01L27/11807—CMOS gate arrays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR880009291 | 1988-07-23 | ||
| KR880009291 | 1988-07-23 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| NL8901301A NL8901301A (nl) | 1990-02-16 |
| NL194182B NL194182B (nl) | 2001-04-02 |
| NL194182C true NL194182C (nl) | 2001-08-03 |
Family
ID=19276371
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL8901301A NL194182C (nl) | 1988-07-23 | 1989-05-24 | Randloze moederschijf-halfgeleiderinrichting. |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4942447A (fr) |
| JP (1) | JPH0258871A (fr) |
| DE (1) | DE3917303A1 (fr) |
| FR (1) | FR2635412B1 (fr) |
| GB (1) | GB2221090B (fr) |
| NL (1) | NL194182C (fr) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5459340A (en) * | 1989-10-03 | 1995-10-17 | Trw Inc. | Adaptive configurable gate array |
| US5217916A (en) * | 1989-10-03 | 1993-06-08 | Trw Inc. | Method of making an adaptive configurable gate array |
| US5306942A (en) * | 1989-10-11 | 1994-04-26 | Nippondenso Co., Ltd. | Semiconductor device having a shield which is maintained at a reference potential |
| US5015600A (en) * | 1990-01-25 | 1991-05-14 | Northern Telecom Limited | Method for making integrated circuits |
| US6861337B2 (en) * | 2002-05-10 | 2005-03-01 | General Semiconductor, Inc. | Method for using a surface geometry for a MOS-gated device in the manufacture of dice having different sizes |
| US7337425B2 (en) | 2004-06-04 | 2008-02-26 | Ami Semiconductor, Inc. | Structured ASIC device with configurable die size and selectable embedded functions |
| US11663391B2 (en) | 2021-08-25 | 2023-05-30 | International Business Machines Corporation | Latch-up avoidance for sea-of-gates |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5925381B2 (ja) * | 1977-12-30 | 1984-06-16 | 富士通株式会社 | 半導体集積回路装置 |
| FR2524206B1 (fr) * | 1982-03-26 | 1985-12-13 | Thomson Csf Mat Tel | Circuit integre prediffuse, et procede d'interconnexion des cellules de ce circuit |
| JPS593950A (ja) * | 1982-06-30 | 1984-01-10 | Fujitsu Ltd | ゲ−トアレイチツプ |
| JPS59163837A (ja) * | 1983-03-09 | 1984-09-14 | Toshiba Corp | 半導体集積回路 |
| JPS6027145A (ja) * | 1983-07-25 | 1985-02-12 | Hitachi Ltd | 半導体集積回路装置 |
| JPS6035532A (ja) * | 1983-07-29 | 1985-02-23 | Fujitsu Ltd | マスタスライス集積回路装置 |
| JPH0828480B2 (ja) * | 1983-09-30 | 1996-03-21 | 富士通株式会社 | 半導体集積回路装置 |
| US4724531A (en) * | 1984-07-18 | 1988-02-09 | Hughes Aircraft Company | Gate array with bidirectional symmetry |
| GB2168840A (en) * | 1984-08-22 | 1986-06-25 | Plessey Co Plc | Customerisation of integrated logic devices |
| JPS61218143A (ja) * | 1985-03-25 | 1986-09-27 | Hitachi Ltd | 半導体集積回路装置 |
| JPS6273760A (ja) * | 1985-09-27 | 1987-04-04 | Toshiba Corp | 半導体装置 |
| JPS6276735A (ja) * | 1985-09-30 | 1987-04-08 | Toshiba Corp | 半導体集積回路装置 |
| ATE73580T1 (de) * | 1985-12-06 | 1992-03-15 | Siemens Ag | Gate array anordnung in cmos-technik. |
| JPS62229857A (ja) * | 1986-03-29 | 1987-10-08 | Toshiba Corp | マスタスライス半導体装置 |
| JPS62299857A (ja) * | 1986-06-19 | 1987-12-26 | Canon Inc | 電子写真感光体 |
| JPH0831578B2 (ja) * | 1986-06-19 | 1996-03-27 | 日本電気株式会社 | マスタ−スライス方式のゲ−トアレ−半導体集積回路装置 |
-
1989
- 1989-05-24 NL NL8901301A patent/NL194182C/nl not_active IP Right Cessation
- 1989-05-25 US US07/357,038 patent/US4942447A/en not_active Expired - Lifetime
- 1989-05-25 FR FR898906854A patent/FR2635412B1/fr not_active Expired - Lifetime
- 1989-05-25 JP JP1130282A patent/JPH0258871A/ja active Pending
- 1989-05-27 DE DE3917303A patent/DE3917303A1/de active Granted
- 1989-06-15 GB GB8913760A patent/GB2221090B/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0258871A (ja) | 1990-02-28 |
| GB2221090A (en) | 1990-01-24 |
| GB2221090B (en) | 1992-02-05 |
| FR2635412B1 (fr) | 1994-09-02 |
| NL8901301A (nl) | 1990-02-16 |
| NL194182B (nl) | 2001-04-02 |
| GB8913760D0 (en) | 1989-08-02 |
| DE3917303C2 (fr) | 1993-09-02 |
| DE3917303A1 (de) | 1990-01-25 |
| US4942447A (en) | 1990-07-17 |
| FR2635412A1 (fr) | 1990-02-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A1A | A request for search or an international-type search has been filed | ||
| BB | A search report has been drawn up | ||
| BC | A request for examination has been filed | ||
| V4 | Discontinued because of reaching the maximum lifetime of a patent |
Effective date: 20090524 |