JPH0480538B2 - - Google Patents
Info
- Publication number
- JPH0480538B2 JPH0480538B2 JP58038484A JP3848483A JPH0480538B2 JP H0480538 B2 JPH0480538 B2 JP H0480538B2 JP 58038484 A JP58038484 A JP 58038484A JP 3848483 A JP3848483 A JP 3848483A JP H0480538 B2 JPH0480538 B2 JP H0480538B2
- Authority
- JP
- Japan
- Prior art keywords
- cell
- wiring
- metal wiring
- layer metal
- cells
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000002184 metal Substances 0.000 claims description 43
- 239000004065 semiconductor Substances 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 3
- 238000000034 method Methods 0.000 description 23
- 230000008569 process Effects 0.000 description 10
- 238000010586 diagram Methods 0.000 description 9
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 7
- 229920005591 polysilicon Polymers 0.000 description 5
- 238000003491 array Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 230000010354 integration Effects 0.000 description 4
- 239000000047 product Substances 0.000 description 4
- 230000008901 benefit Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000011265 semifinished product Substances 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/118—Masterslice integrated circuits
- H01L27/11803—Masterslice integrated circuits using field effect technology
- H01L27/11807—CMOS gate arrays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58038484A JPS59163837A (ja) | 1983-03-09 | 1983-03-09 | 半導体集積回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58038484A JPS59163837A (ja) | 1983-03-09 | 1983-03-09 | 半導体集積回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59163837A JPS59163837A (ja) | 1984-09-14 |
JPH0480538B2 true JPH0480538B2 (fr) | 1992-12-18 |
Family
ID=12526528
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58038484A Granted JPS59163837A (ja) | 1983-03-09 | 1983-03-09 | 半導体集積回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59163837A (fr) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6022338A (ja) * | 1983-07-19 | 1985-02-04 | Nec Ic Microcomput Syst Ltd | 半導体集積回路装置 |
JPS6184030A (ja) * | 1984-10-02 | 1986-04-28 | Fujitsu Ltd | ゲ−トアレイマスタスライス集積回路装置 |
EP0177336B1 (fr) * | 1984-10-03 | 1992-07-22 | Fujitsu Limited | Structure intégrée de matrice de portes |
JPH07120709B2 (ja) * | 1985-03-22 | 1995-12-20 | 日本電気株式会社 | 半導体集積回路の配線方式 |
JPS61232633A (ja) * | 1985-04-09 | 1986-10-16 | Nec Corp | 半導体集積回路装置 |
JPS62119936A (ja) * | 1985-11-19 | 1987-06-01 | Fujitsu Ltd | コンプリメンタリ−lsiチツプ |
US4884115A (en) * | 1987-02-27 | 1989-11-28 | Siemens Aktiengesellschaft | Basic cell for a gate array arrangement in CMOS Technology |
NL194182C (nl) * | 1988-07-23 | 2001-08-03 | Samsung Electronics Co Ltd | Randloze moederschijf-halfgeleiderinrichting. |
JPH0770689B2 (ja) * | 1989-02-03 | 1995-07-31 | 株式会社東芝 | 半導体回路 |
JPH04216668A (ja) * | 1990-12-15 | 1992-08-06 | Sharp Corp | 半導体集積回路 |
EP0523967B1 (fr) * | 1991-07-18 | 1999-09-22 | Fujitsu Limited | Arrangement de transistors pour former une cellule de base dans un dispositif de circuit intégré à semi-conducteur du type pré-diffusé et dispositif de circuit intégré à semi-conducteur du type pré-diffusé |
JPH05136380A (ja) * | 1991-11-13 | 1993-06-01 | Nec Ic Microcomput Syst Ltd | 半導体集積回路装置 |
EP0598895A4 (fr) * | 1992-06-10 | 1994-11-09 | Aspec Tech Inc | Matrice logique symetrique en metal multicouche a bandes de connexion continues au niveau du substrat. |
US5384472A (en) * | 1992-06-10 | 1995-01-24 | Aspec Technology, Inc. | Symmetrical multi-layer metal logic array with continuous substrate taps and extension portions for increased gate density |
DE4313053C1 (de) * | 1993-04-21 | 1994-10-06 | Siemens Ag | Integrierte Halbleiteranordnung mit Verbindungsleitungen, die durch Dotierungsgebiete gegenüber parasitären Effekten unempfindlich sind |
JPH08172175A (ja) * | 1994-12-19 | 1996-07-02 | Fujitsu Ten Ltd | 半導体集積回路 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5929440A (ja) * | 1982-08-11 | 1984-02-16 | Hitachi Ltd | 半導体集積回路装置 |
-
1983
- 1983-03-09 JP JP58038484A patent/JPS59163837A/ja active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5929440A (ja) * | 1982-08-11 | 1984-02-16 | Hitachi Ltd | 半導体集積回路装置 |
Also Published As
Publication number | Publication date |
---|---|
JPS59163837A (ja) | 1984-09-14 |
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