MX9305885A - Vias magneticas dentro de estructuras/substratos tridimensionales de multiples capas. - Google Patents

Vias magneticas dentro de estructuras/substratos tridimensionales de multiples capas.

Info

Publication number
MX9305885A
MX9305885A MX9305885A MX9305885A MX9305885A MX 9305885 A MX9305885 A MX 9305885A MX 9305885 A MX9305885 A MX 9305885A MX 9305885 A MX9305885 A MX 9305885A MX 9305885 A MX9305885 A MX 9305885A
Authority
MX
Mexico
Prior art keywords
roads
substrates
magnetic
multiple layer
layer structures
Prior art date
Application number
MX9305885A
Other languages
English (en)
Inventor
Andrew Shapiro
Robert F Mcclanahan
Robert D Washburn
Hal D Smith
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Publication of MX9305885A publication Critical patent/MX9305885A/es

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/645—Inductive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/165—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed inductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6605—High-frequency electrical connections
    • H01L2223/6616—Vertical connections, e.g. vias
    • H01L2223/6622—Coaxial feed-throughs in active or passive substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6605—High-frequency electrical connections
    • H01L2223/6627—Waveguides, e.g. microstrip line, strip line, coplanar line
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1903—Structure including wave guides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0187—Dielectric layers with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/08—Magnetic details
    • H05K2201/083—Magnetic materials
    • H05K2201/086—Magnetic materials for inductive purposes, e.g. printed inductor with ferrite core
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/096—Vertically aligned vias, holes or stacked vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Coils Or Transformers For Communication (AREA)
  • Thin Magnetic Films (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Magnetic Heads (AREA)

Abstract

Estructuras ferromagnéticas formadas de rellenos de vías ferromagnéticas, en una estructura de microcircuito unificada de múltiples capas que se forma de una pluralidad de capas de cinta aislante.
MX9305885A 1992-09-24 1993-09-24 Vias magneticas dentro de estructuras/substratos tridimensionales de multiples capas. MX9305885A (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US95107292A 1992-09-24 1992-09-24

Publications (1)

Publication Number Publication Date
MX9305885A true MX9305885A (es) 1994-07-29

Family

ID=25491223

Family Applications (1)

Application Number Title Priority Date Filing Date
MX9305885A MX9305885A (es) 1992-09-24 1993-09-24 Vias magneticas dentro de estructuras/substratos tridimensionales de multiples capas.

Country Status (11)

Country Link
US (1) US5438167A (es)
EP (1) EP0613610B1 (es)
JP (1) JP2509807B2 (es)
KR (1) KR0158475B1 (es)
CA (1) CA2124196C (es)
DE (1) DE69312466T2 (es)
DK (1) DK0613610T3 (es)
ES (1) ES2105326T3 (es)
GR (1) GR3024693T3 (es)
MX (1) MX9305885A (es)
WO (1) WO1994007349A1 (es)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6184736B1 (en) * 1992-04-03 2001-02-06 Compaq Computer Corporation Sinusoidal radio-frequency clock distribution system for synchronization of a computer system
DE59702929D1 (de) * 1996-07-31 2001-02-22 Dyconex Patente Zug Verfahren zur herstellung von verbindungsleitern
JP4234205B2 (ja) * 1996-11-08 2009-03-04 ダブリュ．エル．ゴア アンド アソシエイツ，インコーポレイティド 電子アセンブリおよび電子物品内でのヴァイアのインダクタンスを低減する方法
US5828271A (en) * 1997-03-06 1998-10-27 Northrop Grumman Corporation Planar ferrite toroid microwave phase shifter
JP3366552B2 (ja) * 1997-04-22 2003-01-14 京セラ株式会社 誘電体導波管線路およびそれを具備する多層配線基板
US6169801B1 (en) 1998-03-16 2001-01-02 Midcom, Inc. Digital isolation apparatus and method
JP3784244B2 (ja) * 2000-06-30 2006-06-07 京セラ株式会社 多層配線基板
US6975189B1 (en) * 2000-11-02 2005-12-13 Telasic Communications, Inc. On-chip multilayer metal shielded transmission line
IL141118A0 (en) * 2001-01-25 2002-02-10 Cerel Ceramics Technologies Lt A method for the implementation of electronic components in via-holes of a multi-layer multi-chip module
EP2315510A3 (en) 2001-06-05 2012-05-02 Dai Nippon Printing Co., Ltd. Wiring board provided with passive element
US6778043B2 (en) * 2001-12-19 2004-08-17 Maxxan Systems, Inc. Method and apparatus for adding inductance to printed circuits
US6867664B2 (en) * 2003-05-05 2005-03-15 Joey Bray Ferrite-filled, antisymmetrically-biased rectangular waveguide phase shifter
US7829135B2 (en) * 2005-06-22 2010-11-09 Canon Kabushiki Kaisha Method and apparatus for forming multi-layered circuit pattern
US7947908B2 (en) * 2007-10-19 2011-05-24 Advantest Corporation Electronic device
US8440917B2 (en) * 2007-11-19 2013-05-14 International Business Machines Corporation Method and apparatus to reduce impedance discontinuity in packages
US20090153281A1 (en) * 2007-12-13 2009-06-18 Ahmadreza Rofougaran Method and system for an integrated circuit package with ferri/ferromagnetic layers
US20100307798A1 (en) * 2009-06-03 2010-12-09 Izadian Jamal S Unified scalable high speed interconnects technologies
KR101692434B1 (ko) * 2010-06-28 2017-01-18 삼성전자주식회사 반도체 소자 및 그 제조 방법
US9362606B2 (en) * 2013-08-23 2016-06-07 International Business Machines Corporation On-chip vertical three dimensional microstrip line with characteristic impedance tuning technique and design structures
WO2019147189A1 (en) 2018-01-29 2019-08-01 Agency For Science, Technology And Research Semiconductor package and method of forming the same
JP2020010148A (ja) * 2018-07-06 2020-01-16 株式会社フジクラ 高周波受動部品およびその製造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3456215A (en) * 1964-09-02 1969-07-15 Peter A Denes High frequency low pass filter
JPS5524446A (en) * 1978-08-09 1980-02-21 Ngk Insulators Ltd Ceramic circuit board
JPS6048291B2 (ja) * 1979-10-11 1985-10-26 ファナック株式会社 ワイヤカット放電加工装置
JPS5854661A (ja) * 1981-09-29 1983-03-31 Fujitsu Ltd 多層セラミツク半導体パツケ−ジ
US4647878A (en) * 1984-11-14 1987-03-03 Itt Corporation Coaxial shielded directional microwave coupler
JPS61265890A (ja) * 1985-05-20 1986-11-25 日本シイエムケイ株式会社 プリント配線板とシ−ルド用トナ−
JPS62219691A (ja) * 1986-03-20 1987-09-26 富士通株式会社 厚膜混成集積回路
JPH0728133B2 (ja) * 1986-05-02 1995-03-29 株式会社東芝 回路基板
JPH0724334B2 (ja) * 1987-01-19 1995-03-15 株式会社日立製作所 回路板
US4894114A (en) * 1987-02-11 1990-01-16 Westinghouse Electric Corp. Process for producing vias in semiconductor
JPH0196991A (ja) * 1987-10-09 1989-04-14 Tdk Corp 厚膜複合部品の製造方法
US5312674A (en) * 1992-07-31 1994-05-17 Hughes Aircraft Company Low-temperature-cofired-ceramic (LTCC) tape structures including cofired ferromagnetic elements, drop-in components and multi-layer transformer

Also Published As

Publication number Publication date
DE69312466T2 (de) 1998-02-26
DK0613610T3 (da) 1997-08-25
JP2509807B2 (ja) 1996-06-26
ES2105326T3 (es) 1997-10-16
US5438167A (en) 1995-08-01
DE69312466D1 (de) 1997-09-04
EP0613610B1 (en) 1997-07-23
CA2124196C (en) 1997-04-29
GR3024693T3 (en) 1997-12-31
JPH07501910A (ja) 1995-02-23
WO1994007349A1 (en) 1994-03-31
EP0613610A1 (en) 1994-09-07
KR0158475B1 (en) 1998-12-15

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