LU101546B1 - Baugruppensubstrat auf Siliziumbasis mit hoher Wärmeabgabe, Herstellungsverfahren und Struktur der Baugruppe mit hoher Wärmeabgabe - Google Patents
Baugruppensubstrat auf Siliziumbasis mit hoher Wärmeabgabe, Herstellungsverfahren und Struktur der Baugruppe mit hoher Wärmeabgabe Download PDFInfo
- Publication number
- LU101546B1 LU101546B1 LU101546A LU101546A LU101546B1 LU 101546 B1 LU101546 B1 LU 101546B1 LU 101546 A LU101546 A LU 101546A LU 101546 A LU101546 A LU 101546A LU 101546 B1 LU101546 B1 LU 101546B1
- Authority
- LU
- Luxembourg
- Prior art keywords
- silicon
- substrate
- vertical
- heat dissipation
- high heat
- Prior art date
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 132
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 129
- 239000010703 silicon Substances 0.000 title claims abstract description 129
- 239000000758 substrate Substances 0.000 title claims abstract description 106
- 230000017525 heat dissipation Effects 0.000 title claims abstract description 67
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 31
- 238000010292 electrical insulation Methods 0.000 claims abstract description 11
- 238000000034 method Methods 0.000 claims description 25
- 238000005530 etching Methods 0.000 claims description 15
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 9
- 229910052760 oxygen Inorganic materials 0.000 claims description 9
- 239000001301 oxygen Substances 0.000 claims description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 8
- 229910052802 copper Inorganic materials 0.000 claims description 8
- 239000010949 copper Substances 0.000 claims description 8
- 229910000679 solder Inorganic materials 0.000 claims description 7
- 238000005476 soldering Methods 0.000 claims description 5
- 238000009713 electroplating Methods 0.000 claims description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 238000001465 metallisation Methods 0.000 claims description 3
- 230000003647 oxidation Effects 0.000 claims description 3
- 238000007254 oxidation reaction Methods 0.000 claims description 3
- 238000001020 plasma etching Methods 0.000 claims description 3
- 238000007517 polishing process Methods 0.000 claims description 2
- HJELPJZFDFLHEY-UHFFFAOYSA-N silicide(1-) Chemical compound [Si-] HJELPJZFDFLHEY-UHFFFAOYSA-N 0.000 claims 6
- 230000002093 peripheral effect Effects 0.000 claims 1
- 230000010354 integration Effects 0.000 abstract description 7
- 238000012856 packing Methods 0.000 abstract description 2
- 239000002184 metal Substances 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 9
- 238000004088 simulation Methods 0.000 description 9
- 230000000694 effects Effects 0.000 description 6
- 238000004806 packaging method and process Methods 0.000 description 6
- 238000007747 plating Methods 0.000 description 6
- 238000013461 design Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000000708 deep reactive-ion etching Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 230000007774 longterm Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012536 packaging technology Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 235000012431 wafers Nutrition 0.000 description 2
- 238000010276 construction Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- CEOCDNVZRAIOQZ-UHFFFAOYSA-N pentachlorobenzene Chemical compound ClC1=CC(Cl)=C(Cl)C(Cl)=C1Cl CEOCDNVZRAIOQZ-UHFFFAOYSA-N 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0006—Interconnects
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4871—Bases, plates or heatsinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/147—Semiconductor insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2207/00—Microstructural systems or auxiliary parts thereof
- B81B2207/09—Packages
- B81B2207/091—Arrangements for connecting external electrical signals to mechanical structures inside the package
- B81B2207/094—Feed-through, via
- B81B2207/096—Feed-through, via through the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05553—Shape in top view being rectangular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910079369.9A CN109686707B (zh) | 2019-01-28 | 2019-01-28 | 高散热硅基封装基板的制作方法及高散热封装结构 |
Publications (2)
Publication Number | Publication Date |
---|---|
LU101546A1 LU101546A1 (de) | 2020-08-03 |
LU101546B1 true LU101546B1 (de) | 2020-12-01 |
Family
ID=66194904
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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LU101546A LU101546B1 (de) | 2019-01-28 | 2019-11-04 | Baugruppensubstrat auf Siliziumbasis mit hoher Wärmeabgabe, Herstellungsverfahren und Struktur der Baugruppe mit hoher Wärmeabgabe |
Country Status (3)
Country | Link |
---|---|
CN (1) | CN109686707B (zh) |
LU (1) | LU101546B1 (zh) |
WO (1) | WO2020155719A1 (zh) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
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CN109686707B (zh) * | 2019-01-28 | 2024-06-14 | 苏州锐杰微科技集团有限公司 | 高散热硅基封装基板的制作方法及高散热封装结构 |
CN112802809B (zh) * | 2021-01-15 | 2022-05-27 | 上海航天电子通讯设备研究所 | 一种硅铝合金封装基板及其制备方法 |
CN117747444B (zh) * | 2024-02-07 | 2024-05-14 | 中国科学院长春光学精密机械与物理研究所 | 一种半导体功率器件的封装方法及封装结构 |
Family Cites Families (14)
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JP2863678B2 (ja) * | 1992-09-28 | 1999-03-03 | 三菱電機株式会社 | 半導体レーザ装置及びその製造方法 |
US20090273002A1 (en) * | 2008-05-05 | 2009-11-05 | Wen-Chih Chiou | LED Package Structure and Fabrication Method |
CN101540295B (zh) * | 2009-04-21 | 2011-01-26 | 北京大学 | 一种tsv通孔的绝缘层的制备方法 |
US8507940B2 (en) * | 2010-04-05 | 2013-08-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Heat dissipation by through silicon plugs |
US8431431B2 (en) * | 2011-07-12 | 2013-04-30 | Invensas Corporation | Structures with through vias passing through a substrate comprising a planar insulating layer between semiconductor layers |
CN103123951A (zh) * | 2011-11-21 | 2013-05-29 | 富士迈半导体精密工业(上海)有限公司 | 发光元件 |
CN202736972U (zh) * | 2012-07-16 | 2013-02-13 | 桂林电子科技大学 | 基于硅通孔技术的晶圆级大功率led封装结构 |
CN102769092B (zh) * | 2012-07-16 | 2015-02-18 | 桂林电子科技大学 | 基于硅通孔技术的晶圆级大功率led封装结构及其封装方法 |
JP2014033077A (ja) * | 2012-08-03 | 2014-02-20 | Canon Inc | 貫通孔の形成方法 |
US9257337B2 (en) * | 2013-04-17 | 2016-02-09 | Industrial Technology Research Institute | Semiconductor structure and manufacturing method thereof |
CN104600059B (zh) * | 2015-02-03 | 2017-06-30 | 华进半导体封装先导技术研发中心有限公司 | 一种带有ipd的tsv孔结构及其加工方法 |
CN105895579B (zh) * | 2016-06-08 | 2017-12-05 | 无锡微奥科技有限公司 | 一种基于soi衬底的tsv圆片的加工方法 |
CN109686707B (zh) * | 2019-01-28 | 2024-06-14 | 苏州锐杰微科技集团有限公司 | 高散热硅基封装基板的制作方法及高散热封装结构 |
CN209199919U (zh) * | 2019-01-28 | 2019-08-02 | 南通大学 | 高散热硅基封装基板及高散热封装结构 |
-
2019
- 2019-01-28 CN CN201910079369.9A patent/CN109686707B/zh active Active
- 2019-11-04 WO PCT/CN2019/115256 patent/WO2020155719A1/zh active Application Filing
- 2019-11-04 LU LU101546A patent/LU101546B1/de active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
WO2020155719A1 (zh) | 2020-08-06 |
CN109686707B (zh) | 2024-06-14 |
LU101546A1 (de) | 2020-08-03 |
CN109686707A (zh) | 2019-04-26 |
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Effective date: 20201201 |