LU101546B1 - Baugruppensubstrat auf Siliziumbasis mit hoher Wärmeabgabe, Herstellungsverfahren und Struktur der Baugruppe mit hoher Wärmeabgabe - Google Patents

Baugruppensubstrat auf Siliziumbasis mit hoher Wärmeabgabe, Herstellungsverfahren und Struktur der Baugruppe mit hoher Wärmeabgabe Download PDF

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Publication number
LU101546B1
LU101546B1 LU101546A LU101546A LU101546B1 LU 101546 B1 LU101546 B1 LU 101546B1 LU 101546 A LU101546 A LU 101546A LU 101546 A LU101546 A LU 101546A LU 101546 B1 LU101546 B1 LU 101546B1
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LU
Luxembourg
Prior art keywords
silicon
substrate
vertical
heat dissipation
high heat
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Application number
LU101546A
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German (de)
English (en)
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LU101546A1 (de
Inventor
Haiyan Sun
Jicong Zhao
Ling Sun
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Univ Nantong
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Publication of LU101546A1 publication Critical patent/LU101546A1/de
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Publication of LU101546B1 publication Critical patent/LU101546B1/de

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0006Interconnects
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4871Bases, plates or heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/147Semiconductor insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3677Wire-like or pin-like cooling fins or heat sinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481Internal lead connections, e.g. via connections, feedthrough structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2207/00Microstructural systems or auxiliary parts thereof
    • B81B2207/09Packages
    • B81B2207/091Arrangements for connecting external electrical signals to mechanical structures inside the package
    • B81B2207/094Feed-through, via
    • B81B2207/096Feed-through, via through the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05553Shape in top view being rectangular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
LU101546A 2019-01-28 2019-11-04 Baugruppensubstrat auf Siliziumbasis mit hoher Wärmeabgabe, Herstellungsverfahren und Struktur der Baugruppe mit hoher Wärmeabgabe LU101546B1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910079369.9A CN109686707B (zh) 2019-01-28 2019-01-28 高散热硅基封装基板的制作方法及高散热封装结构

Publications (2)

Publication Number Publication Date
LU101546A1 LU101546A1 (de) 2020-08-03
LU101546B1 true LU101546B1 (de) 2020-12-01

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LU101546A LU101546B1 (de) 2019-01-28 2019-11-04 Baugruppensubstrat auf Siliziumbasis mit hoher Wärmeabgabe, Herstellungsverfahren und Struktur der Baugruppe mit hoher Wärmeabgabe

Country Status (3)

Country Link
CN (1) CN109686707B (zh)
LU (1) LU101546B1 (zh)
WO (1) WO2020155719A1 (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109686707B (zh) * 2019-01-28 2024-06-14 苏州锐杰微科技集团有限公司 高散热硅基封装基板的制作方法及高散热封装结构
CN112802809B (zh) * 2021-01-15 2022-05-27 上海航天电子通讯设备研究所 一种硅铝合金封装基板及其制备方法
CN117747444B (zh) * 2024-02-07 2024-05-14 中国科学院长春光学精密机械与物理研究所 一种半导体功率器件的封装方法及封装结构

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JP2863678B2 (ja) * 1992-09-28 1999-03-03 三菱電機株式会社 半導体レーザ装置及びその製造方法
US20090273002A1 (en) * 2008-05-05 2009-11-05 Wen-Chih Chiou LED Package Structure and Fabrication Method
CN101540295B (zh) * 2009-04-21 2011-01-26 北京大学 一种tsv通孔的绝缘层的制备方法
US8507940B2 (en) * 2010-04-05 2013-08-13 Taiwan Semiconductor Manufacturing Company, Ltd. Heat dissipation by through silicon plugs
US8431431B2 (en) * 2011-07-12 2013-04-30 Invensas Corporation Structures with through vias passing through a substrate comprising a planar insulating layer between semiconductor layers
CN103123951A (zh) * 2011-11-21 2013-05-29 富士迈半导体精密工业(上海)有限公司 发光元件
CN202736972U (zh) * 2012-07-16 2013-02-13 桂林电子科技大学 基于硅通孔技术的晶圆级大功率led封装结构
CN102769092B (zh) * 2012-07-16 2015-02-18 桂林电子科技大学 基于硅通孔技术的晶圆级大功率led封装结构及其封装方法
JP2014033077A (ja) * 2012-08-03 2014-02-20 Canon Inc 貫通孔の形成方法
US9257337B2 (en) * 2013-04-17 2016-02-09 Industrial Technology Research Institute Semiconductor structure and manufacturing method thereof
CN104600059B (zh) * 2015-02-03 2017-06-30 华进半导体封装先导技术研发中心有限公司 一种带有ipd的tsv孔结构及其加工方法
CN105895579B (zh) * 2016-06-08 2017-12-05 无锡微奥科技有限公司 一种基于soi衬底的tsv圆片的加工方法
CN109686707B (zh) * 2019-01-28 2024-06-14 苏州锐杰微科技集团有限公司 高散热硅基封装基板的制作方法及高散热封装结构
CN209199919U (zh) * 2019-01-28 2019-08-02 南通大学 高散热硅基封装基板及高散热封装结构

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Publication number Publication date
WO2020155719A1 (zh) 2020-08-06
CN109686707B (zh) 2024-06-14
LU101546A1 (de) 2020-08-03
CN109686707A (zh) 2019-04-26

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Effective date: 20201201