KR980006172A - 컬럼형 패키지의 제조방법 - Google Patents

컬럼형 패키지의 제조방법 Download PDF

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Publication number
KR980006172A
KR980006172A KR1019960021864A KR19960021864A KR980006172A KR 980006172 A KR980006172 A KR 980006172A KR 1019960021864 A KR1019960021864 A KR 1019960021864A KR 19960021864 A KR19960021864 A KR 19960021864A KR 980006172 A KR980006172 A KR 980006172A
Authority
KR
South Korea
Prior art keywords
manufacturing
package
leads
grinding process
columnar
Prior art date
Application number
KR1019960021864A
Other languages
English (en)
Other versions
KR100201393B1 (ko
Inventor
김용찬
Original Assignee
문정환
엘지반도체주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, 엘지반도체주식회사 filed Critical 문정환
Priority to KR1019960021864A priority Critical patent/KR100201393B1/ko
Publication of KR980006172A publication Critical patent/KR980006172A/ko
Application granted granted Critical
Publication of KR100201393B1 publication Critical patent/KR100201393B1/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

본 발명은 컬럼형 패키지(COLUMN TYPE PACKAGE)의 제조방법에 관한 것으로, 종래에는 몸체의 상면에 소정깊이의 안착부를 형성하기 위하여 그 라인딩 공정을 필수적으로 수행함으로서, 생산성향상에 한계가 있는 등의 문제점이 있었다. 본 발명 컬럼형 패키지의 제조방법은 종래 컬럼형 패키지의 제조시 필수적으로 수행하던 그라인딩 공정을 배제하여 공수절감에 따른 생산성이 향상되는 효과가 있고, 그리인딩 공정시 발생하는 이물질제거를 위한 세정공정을 절감하는 효과가 있다.

Description

컬럼형 패키지의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명 컬럼형 패키지의 제조방법을 설명하기 위한 도면.
제3(a)도는 리드정렬한 상태의 사시도.
제3(b)도는 몸체형성공정, 제3(c)도는 절단공정, 제3(d)도는 완성상태.

Claims (1)

  1. 안착부가 상, 하방향의 등간격으로 형성된 소정길이의 리드를 다수개 설치하고, 그 다수개의 리드가 변부에 위치하도록 소정형상의 틀속에서 수지를 주입하여 몸체를 형성하는 몸체형성공정을 수행하는 단계와, 상기 몸체를 소정길이로 절단하여 낱개로 분리하는 절단공정을 수행하는 단계와, 상기 안착부에 접착부재를 매개로 반도체 칩을 부착하는 다이본딩공정을 수행하는 단계와, 상기 반도체 칩과 다수개의 리드를 금속와이어로 연결하는 와이어본딩공정을 수행하는 단계와, 상기 반도체 칩의 상, 하면에 수지를 봉지하여 봉지부를 형성하는 봉지공정을 수행하는 단계의 순서로 제조되는 것을 특징으로 하는 컬럼형 패키지의 제조방법.
KR1019960021864A 1996-06-17 1996-06-17 컬럼형 패키지의 제조방법 KR100201393B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960021864A KR100201393B1 (ko) 1996-06-17 1996-06-17 컬럼형 패키지의 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960021864A KR100201393B1 (ko) 1996-06-17 1996-06-17 컬럼형 패키지의 제조방법

Publications (2)

Publication Number Publication Date
KR980006172A true KR980006172A (ko) 1998-03-30
KR100201393B1 KR100201393B1 (ko) 1999-06-15

Family

ID=19462170

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960021864A KR100201393B1 (ko) 1996-06-17 1996-06-17 컬럼형 패키지의 제조방법

Country Status (1)

Country Link
KR (1) KR100201393B1 (ko)

Also Published As

Publication number Publication date
KR100201393B1 (ko) 1999-06-15

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