KR970053749A - 반도체 패키지 - Google Patents

반도체 패키지 Download PDF

Info

Publication number
KR970053749A
KR970053749A KR1019950046419A KR19950046419A KR970053749A KR 970053749 A KR970053749 A KR 970053749A KR 1019950046419 A KR1019950046419 A KR 1019950046419A KR 19950046419 A KR19950046419 A KR 19950046419A KR 970053749 A KR970053749 A KR 970053749A
Authority
KR
South Korea
Prior art keywords
chip
lead
lead frame
semiconductor package
semiconductor
Prior art date
Application number
KR1019950046419A
Other languages
English (en)
Other versions
KR0184061B1 (ko
Inventor
조윤성
Original Assignee
문정환
Lg 반도체 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, Lg 반도체 주식회사 filed Critical 문정환
Priority to KR1019950046419A priority Critical patent/KR0184061B1/ko
Publication of KR970053749A publication Critical patent/KR970053749A/ko
Application granted granted Critical
Publication of KR0184061B1 publication Critical patent/KR0184061B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

본 발명은 패키지 사이즈(Size) 축소 및 제작공정 단축이 구현되고 여러 방법의 실장이 가능한 반도체 패키지에 관한 것으로써, 반도체 칩과, 반도체 칩의 리드접속대프에 대응하는 리드가 리드 접속패드에 전기적 접속되고 칩의 측면 쪽을 거쳐 하부 쪽의 일부로 연장 형성되며 전기적인 절연물질에 의해 근접한 리드간 부착 형성된 리드프레임과, 칩의 노출 부분을 둘러싸고 리드프레임과 칩 사이의 틈을 메워서 칩과 리드프레임의 부착 및 적기적인 절연을 수행하는 밀봉재를 포함하여 이루어진다.

Description

반도체 패키지
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명의 반도체 패키지의 일실시예를 도시한 도면,
제3도는 본 발명의 반도체 패키지의 다른 실시예를 도시한 도면.

Claims (3)

  1. 반도체 패키지(package)에 있어서, 반도체 칩과, 상기 반도체 칩의 접속패드에 전기적으로 접속되거 상기 칩의 일측면 쪽을 거쳐 아래 쪽의 일부로 연장 형성된 리드와 근접한 리드간을 부착시키는 전기적인 절연물질로 이루어진 리드프레임과, 상기 칩의 노출 부분을 둘러싸고 상기 리드프레임과 상기 칩 사이의 틈을 메워서, 상기 칩과 리드프레임의 부착 및 전기적인 절연을 수행하는 밀봉재를 포함하여 이루어진 반도체 패키지.
  2. 제1항에 있어서, 상기 칩의 리드 접속패드와 리드의 전기적 접속 및 부착을 위해 리드와 리드 접속패드사이에 전도성 테이프(Tape)를 개재하여 형성된 것이 특징인 반도체 패키지.
  3. 제1항에 있어서, 상기 칩 상면과 리드프레임의 부착 및 상기 리드와 칩의 리드 접속패드의 전기적인 접속을 위해, 상기 리드프레임의 리드와 절연물질의 배열 상태와 동일하게 전도성물질과 절연물질로 배열된 접착 테이프(Tape)를 개재하여 형성된 것이 특징인 반도체 패키지.
    ※ 참고사항: 최초출원 내용에 의하여 공개하는 것임.
KR1019950046419A 1995-12-04 1995-12-04 반도체 패키지 KR0184061B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950046419A KR0184061B1 (ko) 1995-12-04 1995-12-04 반도체 패키지

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950046419A KR0184061B1 (ko) 1995-12-04 1995-12-04 반도체 패키지

Publications (2)

Publication Number Publication Date
KR970053749A true KR970053749A (ko) 1997-07-31
KR0184061B1 KR0184061B1 (ko) 1999-03-20

Family

ID=19437581

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950046419A KR0184061B1 (ko) 1995-12-04 1995-12-04 반도체 패키지

Country Status (1)

Country Link
KR (1) KR0184061B1 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102471211B1 (ko) * 2021-04-21 2022-11-28 엘지이노텍 주식회사 카메라 모듈

Also Published As

Publication number Publication date
KR0184061B1 (ko) 1999-03-20

Similar Documents

Publication Publication Date Title
KR900005587A (ko) 반도체 디바이스 및 그 제작방법
KR970060463A (ko) 수지밀봉형 반도체장치 및 그 제조방법
KR950030323A (ko) 반도체 장치와 반도체 장치의 생산방법 및 반도체 모듈
KR960706194A (ko) 계층화된 도전 평면을 갖는 리드 프레임(a lead frame having layered conductive planes)
KR970067781A (ko) 반도체 장치와 그의 제조방법 및 집합형 반도체 장치
KR920015496A (ko) 반도체장치
KR970053703A (ko) 클립형 리드프레임과 이를 사용한 패키지의 제조방법
KR920001696A (ko) 반도체 다이를 절연시키기 위한 히트 싱크 및 다중 장착 패드 리드 프레임 패키지 및 그 방법
KR920010853A (ko) 수지봉지형 반도체장치
KR890015399A (ko) 반도체장치의 제조방법
KR950004467A (ko) 반도체장치 및 그 제조방법
KR970013236A (ko) 금속 회로 기판을 갖는 칩 스케일 패키지
KR880011910A (ko) 수지봉합형 집적회로장치
KR900017153A (ko) 반도체 장치 및 그 제조방법
KR960005972A (ko) 수지 밀폐형 반도체 장치 및 그 제조 방법
KR960043132A (ko) 엘오씨(loc) 반도체 패키지 및 반도체 장치를 패키징하는 방법
KR970003877A (ko) 테이프 캐리어 패키지
SG77704A1 (en) Semiconductor device and method of fabricating the same
KR910007094A (ko) 수지밀봉형 반도체장치
KR970053749A (ko) 반도체 패키지
KR960002775A (ko) 수지-봉합(resin-sealed) 반도체 소자
KR910017598A (ko) 반도체 장치의 실장 구조
JPH03129840A (ja) 樹脂封止型半導体装置
JPH0366150A (ja) 半導体集積回路装置
KR950007011Y1 (ko) 수지밀봉형 반도체장치

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20101125

Year of fee payment: 13

LAPS Lapse due to unpaid annual fee