KR890015399A - 반도체장치의 제조방법 - Google Patents

반도체장치의 제조방법 Download PDF

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Publication number
KR890015399A
KR890015399A KR1019890002852A KR890002852A KR890015399A KR 890015399 A KR890015399 A KR 890015399A KR 1019890002852 A KR1019890002852 A KR 1019890002852A KR 890002852 A KR890002852 A KR 890002852A KR 890015399 A KR890015399 A KR 890015399A
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South Korea
Prior art keywords
inner lead
semiconductor chip
lead
insulating material
lead frame
Prior art date
Application number
KR1019890002852A
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English (en)
Other versions
KR970011649B1 (ko
Inventor
다까히로 나이또
겐 무라까미
히로미찌 스즈끼
하지메 사또
와헤이 가따무라
마사찌까 마스다
Original Assignee
미다 가쓰시게
가부시끼가이샤 히다찌세이사꾸쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Priority claimed from JP63057902A external-priority patent/JP2564596B2/ja
Priority claimed from JP63057520A external-priority patent/JP2564595B2/ja
Application filed by 미다 가쓰시게, 가부시끼가이샤 히다찌세이사꾸쇼 filed Critical 미다 가쓰시게
Publication of KR890015399A publication Critical patent/KR890015399A/ko
Application granted granted Critical
Publication of KR970011649B1 publication Critical patent/KR970011649B1/ko

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Abstract

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Description

반도체장치의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도는 본 발명에 따른 반도체장치의 제조방법의 제 1 실시예에 사용된 리이드 프레임의 일부를 도시한 평면도. 제 2 도는 본 발명에 따른 반도체장치의 제조방법에 사용된 반도체칩의 평면도.

Claims (18)

  1. 각각 일정한 간격을 갖고 연결부에 의하여 함께 연결된 내부 리이드를 갖는 리이드프레임을 마련하며, 상기 연결부와 내부리이드의 둘러싼 부분에 절연물질을 접착하는 공정, 상기 절연물질층의 남은 부분에 의하여 일정한 간격으로 유지되고 서로 분리되는 내부리이드의 끝부분을 형성하도록 상기 연결부와 절연 물질층의 부분을 제거하는 공정, 상기 내부 리이드의 끝부분에 본딩 패드를 갖는 반도체 칩을 연결하는 공정, 와이어수단에 의해 상기 반도체 칩상의 본딩패드와 상기 내부리이드를 연결하는 공정, 상기 반도체 칩, 절연물질층의남은 부분, 상기 내부리이드, 상기 와이어, 상기 끝부분의 면이 부분적으로 겹치는 상기 반도체 칩의 한쪽면의 주변부를 수지물질로 봉지하는 공정을 포함하는 반도체장치의 제조방법.
  2. 특허청구의 범위 제 1 항에 있어서, 상기 내부리이드의 끝부분의 두께와 상기 연결부의 두께는 상기 리이드 프레임의 다른부분의 두께보다 작은 반도체장치의 제조방법.
  3. 특허청구의 범위 제 1 항에 있어서, 반도체 칩은 절연물질층의 나머지부분과 접합재를 거쳐 내부리이드의 상기 끝부분상에 탑재되어지는 반도체장치의 제조방법.
  4. 연결부에 연결된 내부리이드를 갖는 리이드프레임을 형성하는 공정, 상기 연결부의 윗면과 상기 연결부에 인접한 내부리이드의 부분의 윗면에 절연물질을 접착하는 공정, 상기 연결부와 절연물질이 상기 내부리이드의 인접한 부분의 윗면에 접착된 절연물질의 부분에 의하여 각각으로 부터 일정한 간격을 유지하는 상기 내부리이드의 끝부분을 형성하도록 윗면에 접착된 절연물질을 제거하는 공정, 상기 끝부분에 반도체 칩을 고착시키는 공정, 반도체 칩의 주면위에 형성된 본딩패드와 내부리이드는 와이어의 수단에 의하여 연결되는 공정, 상기 반도체 칩, 상기 내부리이드에 접착된 절연물질의 부분, 상기 와이어를 봉지하는 공정을 포함하며, 상기 주면의 반대면이 상기 절연물질을 거쳐서 상기 인접한 부분의 윗면위에 부분적으로 겹쳐지는 반도체 장치의 제조방법.
  5. 리이드 프레임의 연결부에 연결되는 내부리이드를 갖는 리이드 프레임을 형성하는 공정, 상기 연결부와 상기 내부리이드의 인접한 부분의 아랫면에 중합체의절연물질을 접착하는 공정, 각각으로 부터 일정한 간격을 갖는 상기 내부리이드의 끝부분을 형성하도록 상기 연결부를 제거하는 공정, 상기 끝부분위에 반도체 칩을 탑재하는 공정, 상기 반도체 칩의 주면상에 형성된 본딩패드와 내부 리이드를 와이어의 수단에 의하여 연결하는 공정, 상기 반도체 칩, 중합체의 절연물질, 상기 내부리이드 및 와이어를 수지로 봉지하는 공정을 포함하며, 상기 주면의 반대면이 절연물질을 거쳐서 상기 끝부분의 윗면에 부분적으로 겹쳐지는 반도체장치의제조방법.
  6. 특허청구의 범위 제 5 항에 있어서, 상기 내부리이드의 끝부분의 두께와 상기 연결부의 두께는 상기 리이드프레임의 다른 부분의 두께보다 작은 반도체장치의 제조방법.
  7. 특허청구의 범위 제 5 항에 있어서, 상기 내부리이드의 끝부분이 상기 리이드프레임의 다른 부분에 비해서 아래쪽으로 휘어지는 반도체장치의 제조방법.
  8. 반도체 칩을 리이드 프레임에 접합하고, 상기 반도체 칩의 본딩패드와 상기 리이드프레임의 내부리이드를 각각 전기적으로 연결하고, 그후 상기 반도체 칩과 상기 반도체 칩을 둘러싼 부분을 수지로 봉지하는 반도체장치의 제조방법에 있어서, 리이드프레임의 중심부분위에 위치한 리이드프레임의 연결부에 일체로 연결되고 서로 일정한 간격을 갖는 내부리이드를 갖도록 리이드 프레임을 마련하고, 상기 연결부와 끝부분이 형성되도록 상기 리이드 프레임의 상기 내부리이드의 아래면 부분에 중합체의 절연 테이프를 접착하고, 상기 내부리이드 사이의 일정한 간격이 상기 절연 테이프의 부분에 의해 유지되도록 상기 연결부를 제거하여 상기 내부리이드의 끝부분을 형성하며, 반도체 칩의 주면이 상기 내부리이드의 끝부분의 아래면에 부분적으로 겹쳐지고, 상기 절연테이프의 상기 부분을 거쳐서 상기 끝부분에 접합된 후, 상기 반도체 칩의 본딩패드와 상기 내부 리이드가 겹쳐진 부분에서 와이어 수단에 의해 서로 연결되는 반도체장치의 제조방법.
  9. 특허청구의 범위 제 8 항에 있어서, 상기 반도체 칩은 상기 내부리이드와 상기 반도체 칩 사이의 겹쳐진 위치에서 상기 내부리이드를 접합재로 접합하는 반도체장치의 제조방법.
  10. 특허청구의 범위 제 8 항에 있어서, 탭만이 형성된 다른 리이드 프레임을 마련하고, 상기 반도체 칩의 반대면이 상기 탭에 접합된 후 상기 내부 리이드의 끝부분이 상기 반도체 칩의 주면의 부분위에 겹쳐지는 반도체장치의 제조방법.
  11. 반도체 칩을 리이드프레임에 접합하고, 상기 반도체 칩의 본딩패드와 상기 리이드프레임의 내부 리이드를 각각 전기적으로 연결하는 반도체장치의 제조방법에 있어서, 상기 내부리이드의 끝부분에 형성되도록 그 부분에서 일정한 간격을 갖는 여러개의 내부리이드에 연결된 연결부를 갖는 리이드 프레임을 마련하고, 상기 연결부와 상기 리이드프레임의 상기 내부리이드의 아래면 부분에 중합체의 절연테이프를 접착하고, 상기 내부리이드사이의 일정한 간격이 상기 중합체의 절연테이프의 부분에 의해 유지되도록 상기 리이드프레임의 연결부를 제거하여 상기 내부리이드의 끝부분을 형성하며, 반도체 칩이 상기 내부리이드의 끝부분의 윗면에 접합된 후 상기 반도체 칩의 본딩패드와 상기 내부리이드가 와이어 수단에 의해 서로 연결되는 반도체장치의 제조방법.
  12. 특허청구의 범위 제11항에 있어서, 상기 절연 테이프를 상기 내부리이드의 상기 부분에 접착하여, 상기 절연테이프가 상기 내부리이드의 상기 부분의 아래면에 접착되는 반도체장치의 제조방법.
  13. 특허청구의 범위 제 11항에 있어서, 상기 절연테이프를 상기 내부리이드의 상기 부분에 접착하여, 상기 절연테이프가 상기 내부리이드의 상기 부분의 아래면에 접착되는 반도체장치의 제조방법.
  14. 특허청구의 범위 제 11항에 있어서, 상기 리이드프레임은 상기 내부리이드의 끝부분의 두께가 상기 내부리이드의 다른부분의 두께보다 작게 형성되는 반도체장치의 제조방법.
  15. 특허청구의 범위 제11항에 있어서, 상기 중합체의 절연테이프는 중합체의 수지로 구성되는 반도체장치의 제조방법.
  16. 리이드프레임의 중심부를 향해서 안으로 확장되고 서로 일정한 간격을 갖는 내부리이드와 외부리이드를 갖는 리이드프레임, 끝부분의 간격을 유지하도록 상기 내부리이드의 끝부분에 접착된 중합체의 절연물질, 내부리이드의 상기 끝부분에 탑재되고, 칩의 주변부분과 끝부분의 평면이 겹쳐지도록 배치된 반도체 칩, 상기 내부리이드와 상기 반도체 칩상의 본딩패드를 전기적으로 연결하는 와이어, 외부리이드가 수지로 부터 바깥쪽으로 확장되고, 상기 와이어, 상기 반도체 칩 및 절연물질, 상기 내부 리이드를 봉지하는 수지를 포함하는 반도체장치.
  17. 특허청구의 범위 제16항에 있어서, 절연물질은 상기 반도체 칩의 평면과 상기 끝부분의 평면사이에 배치되고, 상기 칩을 접합재로 절연물질에 접착되는 반도체장치.
  18. 특허청구의 범위 제16항에 있어서, 절연물질은 상기 반도체 칩에 의하여 겹쳐지는 끝부분의 평면과 반대로 배치된 상기 끝부분의 평면에 접착되는 반도체 장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890002852A 1988-03-10 1989-03-08 반도체 장치의 제조방법 KR970011649B1 (ko)

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JP63-57902 1988-03-10
JP63057902A JP2564596B2 (ja) 1988-03-10 1988-03-10 半導体装置の製造方法
JP63-57520 1988-03-11
JP63057520A JP2564595B2 (ja) 1988-03-11 1988-03-11 半導体装置の製造方法

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