KR970030653A - 반도체 소자의 도전 배선 제조방법 - Google Patents

반도체 소자의 도전 배선 제조방법 Download PDF

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KR970030653A
KR970030653A KR1019950039701A KR19950039701A KR970030653A KR 970030653 A KR970030653 A KR 970030653A KR 1019950039701 A KR1019950039701 A KR 1019950039701A KR 19950039701 A KR19950039701 A KR 19950039701A KR 970030653 A KR970030653 A KR 970030653A
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South Korea
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layer
conductive wiring
silicide layer
contact hole
forming
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KR1019950039701A
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English (en)
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KR100341883B1 (ko
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김현수
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김주용
현대전자산업 주식회사
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Priority to KR1019950039701A priority Critical patent/KR100341883B1/ko
Publication of KR970030653A publication Critical patent/KR970030653A/ko
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Publication of KR100341883B1 publication Critical patent/KR100341883B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28052—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/7685—Barrier, adhesion or liner layers the layer covering a conductive structure
    • H01L21/76852—Barrier, adhesion or liner layers the layer covering a conductive structure the layer also covering the sidewalls of the conductive structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823475—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type interconnection or wiring or contact manufacturing related aspects

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 반도체소자의 도전배선 제조방법에 관한 것으로서, 콘택홀을 메워 하부 도전층과 접촉되는 부분을 W-실리사이드층으로 형성하고 절연막과 W-실리사이드층의 사이에는 다결정실리콘층을 개재시켜 W-실리사이드층의 접착력 약화에 의한 들뜸 현상을 방지하고, W-실리사이드층을 과포화 실리콘 상태로 형성하여 하측의 실리콘과의 반응을 방지하였으므로, 도전배선의 곤택 저항 및 면저항을 감소되어 소자의 동작 속도가 증가되고, 도전배선을 얇게 형성할 수 있어 후속 적층막의 단차피복성이 향상되며, 리소그래피 공정이 용이해져 공정수율 및 소자동작의 신뢰성을 향상시킬 수 있다.

Description

반도체 소자의 도전 배선 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 2a도 및 제 2b도는 본 발명의 일실시예에 따른 반도체소자의 도전배선 제조 공정도.

Claims (6)

  1. 소정 구조의 반도체기판상에 층간절연막을 형성하는 공정과, 상기 층간절연막상에 다결정 실리콘층을 형성하는 공정과, 상기 층간절역막에서 도전배선 콘택을 예정되어있는 부분 상측의 다결정실리콘층과 층간절연막을 순차적으로 제거하여 콘택홀을 형성하는 공정과, 상기 콘택홀을 통하여 하측 도전층과 접촉되는 W-실리사이드층을 다결정실리콘층 상에 형성하는 공정과 상기 W-실리사이드층과 다결정 실리콘층을 도전배선 마스크를 사용하여 순차적으로 패터닝하여 중첩되어있는 W-실리사이드층 패턴과 다결정실리콘층 패턴으로된 도전배선을 형성하는 공정을 구비하는 반도체소자의 도전배선 제조방법.
  2. 제 1항에 있어서, 상기 다결정실리콘층이 도핑되어 있거나 진성인 것을 특징으로하는 반도체소자의 도전배선 제조방법.
  3. 제 1항에 있어서, 상기 콘택홀에 의해 노출되는 하측 도전층이 소오스/그레인전극 부분인 것을 특징으로하는 반도체소자의 도전배선 제조방법.
  4. 제 1항에 있어서, 상기 콘택홀의 측벽에 다결정실리콘층으로된 스페이서를 추가로 형성하는 것을 특징으로하는 반도체소자의 도전배선 제조방법.
  5. 제 4항에 있어서, 상기 다결정실리콘 스페이서가 진성 또는 도핑된 다결정실리콘으로 형성되는 것을 특징으로 하는 반도체소자의 도전배선 제조방법.
  6. 제 1항에 있어서, 상기 W-실리사이드층(WSix)이 x가 2 이상으로 과포화 실리콘 상태로 형성되는 것을 특징으로 하는 반도체소자의 도전배선 제조방법.
    ※ 참고사항: 최초출원 내용에 의하여 공개하는 것임.
KR1019950039701A 1995-11-03 1995-11-03 반도체소자의도전배선제조방법 KR100341883B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950039701A KR100341883B1 (ko) 1995-11-03 1995-11-03 반도체소자의도전배선제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950039701A KR100341883B1 (ko) 1995-11-03 1995-11-03 반도체소자의도전배선제조방법

Publications (2)

Publication Number Publication Date
KR970030653A true KR970030653A (ko) 1997-06-26
KR100341883B1 KR100341883B1 (ko) 2002-11-07

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